JPH05244030A - Heterodyne receiver - Google Patents

Heterodyne receiver

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Publication number
JPH05244030A
JPH05244030A JP4277392A JP4277392A JPH05244030A JP H05244030 A JPH05244030 A JP H05244030A JP 4277392 A JP4277392 A JP 4277392A JP 4277392 A JP4277392 A JP 4277392A JP H05244030 A JPH05244030 A JP H05244030A
Authority
JP
Japan
Prior art keywords
frequency
signal
local oscillation
oscillator
intermediate frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP4277392A
Other languages
Japanese (ja)
Inventor
Yukihiro Moriyama
幸弘 森山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4277392A priority Critical patent/JPH05244030A/en
Publication of JPH05244030A publication Critical patent/JPH05244030A/en
Withdrawn legal-status Critical Current

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Abstract

PURPOSE:To simplify a circuit configuration while keeping a performance by providing a receiver with a reference oscillator generating a 2nd local oscillation signal and a frequency synthesis means generating a 1st local oscillation signal from the 2nd local oscillation signal with frequency synthesizing process. CONSTITUTION:A frequency synthesis means 17 applies frequency synthesizing process to a 2nd local oscillation signal generated by a reference oscillator 15 to generate a 1st local oscillation signal and it is fed to a 1st frequency conversion means 11. Moreover, the oscillator 15 applies directly the 2nd local oscillation signal to a 2nd frequency conversion means 13. The reception wave of higher frequencies of the two local oscillation signals is subjected to frequency conversion processing for two or more times and converted into a low intermediate frequency signal and then demodulated and a large value is obtained. Then the frequencies of the 1st and 2nd intermediate frequency signals are formed into an intermediate frequency suitable for the performance requested by the receiver by making the combination of the frequency of the oscillator 15 and the synthesis ratio of the means 17 proper. Thus, the circuit configuration is simplified while keeping the performance.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、無線通信システムにお
いて、受信波の周波数を2回以上に渡って変換して所定
の選択度および受信感度を得るヘテロダイン受信機に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heterodyne receiver that obtains a predetermined selectivity and reception sensitivity by converting the frequency of a received wave twice or more in a wireless communication system.

【0002】[0002]

【従来の技術】無線通信システムの受信機では、受信波
の周波数(以下、「受信周波数」という。)に周波数軸
上で近接する妨害波を効率的に排除して安定に所望の感
度を得るために、受信周波数を低い周波数に変換した後
に増幅および復調を行うヘテロダイン受信方式が用いら
れる。このような受信機では、受信周波数が上述した変
換により得られる中間周波信号の周波数(以下、「中間
周波数」という。)の数十倍以上である場合には、上述
した周波数変換の処理を行う回路に注入すべき局部発振
周波数に対して周波数軸上で受信周波数と反対方向に中
間周波数だけ隔たったイメージ妨害波は、初段に設けら
れた帯域フィルタあるいは低域フィルタの減衰特性のみ
では十分に抑圧されない。
2. Description of the Related Art In a receiver of a wireless communication system, an interfering wave that is close to the frequency of a received wave (hereinafter, referred to as "received frequency") on the frequency axis is efficiently eliminated to obtain a desired sensitivity in a stable manner. Therefore, a heterodyne reception system is used in which the reception frequency is converted to a low frequency and then amplification and demodulation are performed. In such a receiver, when the reception frequency is several tens of times or more of the frequency of the intermediate frequency signal obtained by the above conversion (hereinafter, referred to as “intermediate frequency”), the above frequency conversion processing is performed. An image interfering wave that is separated from the local oscillation frequency to be injected into the circuit by an intermediate frequency in the direction opposite to the receiving frequency on the frequency axis is sufficiently suppressed only by the attenuation characteristics of the bandpass filter or the low-pass filter provided in the first stage. Not done.

【0003】したがって、例えば、現用の移動通信シス
テムのように、VHF帯以上の高い周波数帯域に配置さ
れた狭帯域の無線チャネルを用いて通信を行うシステム
の受信機では、上述したイメージ妨害波を十分抑圧して
感度その他の所望の受信特性を得るためにダブルスーパ
ーヘテロダイン受信機が採用される。
Therefore, for example, in a receiver of a system which uses a narrow band radio channel arranged in a high frequency band of the VHF band or higher like a mobile communication system currently in use, the above-mentioned image interference wave is generated. A double superheterodyne receiver is adopted to sufficiently suppress and obtain desired reception characteristics such as sensitivity.

【0004】図3は、従来のダブルスーパーヘテロダイ
ン受信機の構成例を示す図である。図において、アンテ
ナ31は帯域フィルタ321 の入力に接続され、その出
力は高周波増幅部33および帯域フィルタ322 を介し
て第一周波数混合部(MIX1)34の入力に接続され
る。第一周波数混合部34の出力は第一中間周波フィル
タ35および第一中間周波増幅部36を介して第二周波
数混合部(MIX2)37の入力に接続され、その出力は
第二中間周波フィルタ38を介して後段の第二中間周波
増幅部および復調部に接続される。マイクロプロセッサ
(CPU)39の出力は周波数シンセサイザ部40の制
御入力に接続され、その発振出力は第一周波数混合部3
4の局発入力に接続される。水晶発振器(OSC)41
の発振制御入力には水晶振動子42を介して接地され、
水晶発振器41の発振出力は第二周波数混合部37の局
発入力に接続される。
FIG. 3 is a diagram showing a configuration example of a conventional double superheterodyne receiver. In the figure, an antenna 31 is connected to an input of a bandpass filter 32 1 , and its output is connected to an input of a first frequency mixing unit (MIX 1 ) 34 via a high frequency amplification unit 33 and a bandpass filter 32 2 . The output of the first frequency mixing unit 34 is connected to the input of the second frequency mixing unit (MIX 2 ) 37 via the first intermediate frequency filter 35 and the first intermediate frequency amplifying unit 36, and the output thereof is the second intermediate frequency filter. It is connected via 38 to the second intermediate frequency amplification unit and the demodulation unit in the subsequent stage. The output of the microprocessor (CPU) 39 is connected to the control input of the frequency synthesizer section 40, and its oscillation output is the first frequency mixing section 3
4 connected to the local oscillator input. Crystal oscillator (OSC) 41
The oscillation control input of is grounded via the crystal oscillator 42,
The oscillation output of the crystal oscillator 41 is connected to the local input of the second frequency mixer 37.

【0005】周波数シンセサイザ部40では、水晶発振
器(TCXO)43の出力が分周器441 を介して位相
比較器451 の一方の入力に接続され、その出力は低域
フィルタ(LPF)461 を介して電圧制御発振器(V
CO)471 の制御入力に接続される。電圧制御発振器
471 の発振出力は分周器481 の入力および第一周波
数混合部34の局発入力に接続される。分周器481
出力は可変分周器49を介して位相比較器451 の他方
の入力に接続される。可変分周器49の制御入力にはマ
イクロプロセッサ39の出力が接続される。水晶発振器
43の発振制御入力は、水晶振動子50を介して接地さ
れる。
In the frequency synthesizer section 40, the output of a crystal oscillator (TCXO) 43 is connected to one input of a phase comparator 45 1 via a frequency divider 44 1 , and its output is a low pass filter (LPF) 46 1. Via a voltage controlled oscillator (V
CO) 47 1 connected to the control input. The oscillation output of the voltage controlled oscillator 47 1 is connected to the input of the frequency divider 48 1 and the local oscillation input of the first frequency mixer 34. The output of the frequency divider 48 1 is connected to the other input of the phase comparator 45 1 via the variable frequency divider 49. The output of the microprocessor 39 is connected to the control input of the variable frequency divider 49. The oscillation control input of the crystal oscillator 43 is grounded via the crystal oscillator 50.

【0006】このような構成の受信機では、帯域フィル
タ321 はアンテナ31から与えられる信号からイメー
ジ妨害波を抑圧し、かつ高周波増幅部33および帯域フ
ィルタ322 を介して第一周波数混合部34に与える。
In the receiver having such a structure, the bandpass filter 32 1 suppresses the image interference wave from the signal given from the antenna 31, and the first frequency mixing unit 34 passes through the high frequency amplification unit 33 and the bandpass filter 32 2. Give to.

【0007】マイクロプロセッサ39は、受信周波数F
r に応じた分周比を可変分周器49に設定する。位相比
較器451 は、このような分周比に応じて分周器481
および可変分周器49を介して与えられる電圧制御発振
器471 の発振出力信号と、分周器441 を介して水晶
発振器43から与えられる信号との位相差を検出し、か
つその位相差に応じて低域フィルタ461 を介して電圧
制御発振器471 の発振周波数を増減する。このように
して電圧制御発振器471 は、スワローカウンタ方式の
PLLの制御の下で受信周波数に対応した周波数Fl1
第一局発信号を生成して第一周波数混合部34に注入す
る。
The microprocessor 39 receives the reception frequency F
The frequency division ratio corresponding to r is set in the variable frequency divider 49. The phase comparator 45 1 divides the frequency by the frequency divider 48 1 according to such a frequency division ratio.
And the phase difference between the oscillation output signal of the voltage controlled oscillator 47 1 given via the variable frequency divider 49 and the signal given from the crystal oscillator 43 via the frequency divider 44 1 is detected, and the phase difference is detected. Accordingly, the oscillation frequency of the voltage controlled oscillator 47 1 is increased or decreased via the low pass filter 46 1 . In this way, the voltage controlled oscillator 47 1 generates a first local oscillator signal of frequency F l1 corresponding to the reception frequency under the control of the swallow counter type PLL and injects it into the first frequency mixer 34.

【0008】第一周波数混合部34および第一中間周波
フィルタ35は、受信波に第一局発信号に基づく周波数
変換処理を施して、周波数がFi1(=Fr ±Fl1)(以
下、「第一中間周波数」という。)の第一中間周波信号
を生成する。第一中間周波信号は、第一中間周波増幅部
36によって増幅されて第二周波数混合部37に与えら
れる。
The first frequency mixing section 34 and the first intermediate frequency filter 35 perform a frequency conversion process on the received wave based on the first local oscillation signal so that the frequency is F i1 (= F r ± F l1 ) (hereinafter, A first intermediate frequency signal of "first intermediate frequency") is generated. The first intermediate frequency signal is amplified by the first intermediate frequency amplifying unit 36 and given to the second frequency mixing unit 37.

【0009】第二周波数混合部37および第二中間周波
フィルタ38は、第一中間周波信号に水晶発振器41か
ら出力される周波数Fl2の第二局発信号に応じた周波数
変換処理を施して、その中間周波数より低い周波数Fi2
(=Fi1±Fl2)(以下、「第二中間周波数」とい
う。)の第二中間周波信号を生成し、かつ後段に与え
る。
[0009] The second frequency mixer 37 and the second intermediate-frequency filter 38 is subjected to a frequency conversion process according to the second station oscillation signal of frequency F l2 output from the crystal oscillator 41 to the first intermediate frequency signal, Frequency F i2 lower than the intermediate frequency
A second intermediate frequency signal of (= F i1 ± F l2 ) (hereinafter referred to as “second intermediate frequency”) is generated and given to the subsequent stage.

【0010】すなわち、受信周波数に対して周波数比の
小さい第一中間周波信号に受信波を一旦変換して初段の
帯域フィルタ321 によりイメージ妨害波を十分に抑圧
し、かつその第一中間周波信号をさらに低い周波数の第
二中間周波信号に変換して増幅および復調が行われるの
で、所望の選択度や感度が得られる。
That is, the received wave is once converted into a first intermediate frequency signal having a small frequency ratio with respect to the received frequency, and the image interference wave is sufficiently suppressed by the first stage bandpass filter 32 1. Is converted into a second intermediate frequency signal of a lower frequency for amplification and demodulation, so that desired selectivity and sensitivity can be obtained.

【0011】また、上述したダブルスーパーヘテロダイ
ン受信機では、受信周波数を決定する第一局発信号およ
び第二局発信号の周波数を安定化して通信品質を良好に
保つために、水晶発振器43として温度補償型の水晶発
振器を採用し、かつ水晶発振器41には所定の温度範囲
その他の動作環境条件において発振周波数の偏差が小さ
いものが要求されていた。
Further, in the above-mentioned double superheterodyne receiver, in order to stabilize the frequencies of the first station-originated signal and the second station-originated signal that determine the reception frequency and maintain good communication quality, the crystal oscillator 43 is used as a temperature controller. It has been demanded that a compensation type crystal oscillator is adopted and that the crystal oscillator 41 has a small deviation in oscillation frequency in a predetermined temperature range and other operating environment conditions.

【0012】しかし、このような2つの高安定の発振器
を搭載することは受信機の低廉・小型化の妨げとなるの
で、このような問題点を改善するために、例えば、図4
に示すように、水晶発振器41に代えて水晶発振器43
を共用する周波数シンセサイザ部60を備えた受信機が
提案されている(特開昭62−90037公報)。ここ
に、周波数シンセサイザ部60の構成要素の内、図3に
示す周波数シンセサイザ部40の構成要素と機能が同じ
ものについては、添え番号を「2 」とした同じ参照番号
を付与して示し、ここではその説明を省略する。なお、
周波数シンセサイザ部60では、第一中間周波数と第二
中間周波数との差が一定であるから、図3に示す可変分
周器49に相当する分周器は分周器482 に併合されて
いる。
However, since mounting such two highly stable oscillators hinders cost reduction and downsizing of the receiver, in order to improve such problems, for example, FIG.
, A crystal oscillator 43 is used instead of the crystal oscillator 41.
A receiver provided with a frequency synthesizer section 60 for sharing the same has been proposed (JP-A-62-90037). Here, among the components of the frequency synthesizer unit 60, those having the same functions as those of the components of the frequency synthesizer unit 40 shown in FIG. 3 are indicated by giving the same reference number with the subscript “ 2 ”. Then, the explanation is omitted. In addition,
In the frequency synthesizer unit 60, since the difference between the first intermediate frequency and the second intermediate frequency is constant, the frequency divider corresponding to the variable frequency divider 49 shown in FIG. 3 is combined with the frequency divider 48 2 . ..

【0013】[0013]

【発明が解決しようとする課題】ところで、このような
先願にかかわる受信機では、2つの周波数シンセサイザ
部が単一の水晶発振器の出力を共用するので、受信周波
数の安定性を向上する点で多大の効果はあるが、第二局
発信号を生成するために新たに周波数シンセサイザ部が
必要であるために、上述した低廉化および小型化につい
ては十分な効果が得られなかった。
By the way, in such a receiver according to the prior application, since the two frequency synthesizer sections share the output of a single crystal oscillator, the stability of the receiving frequency is improved. Although there is a great effect, a new frequency synthesizer unit is required to generate the second local oscillator signal, so that the above-described cost reduction and size reduction cannot be sufficiently achieved.

【0014】本発明は、性能を保持しつつ回路構成を簡
略化できるヘテロダイン受信機を提供することを目的と
する。
An object of the present invention is to provide a heterodyne receiver capable of simplifying the circuit structure while maintaining the performance.

【0015】[0015]

【課題を解決するための手段】図1は、本発明の原理ブ
ロック図である。本発明は、受信波とその周波数に対応
した第一の局発信号とを乗算し、かつその乗算結果から
受信波を周波数軸上でシフトさせた第一の中間周波信号
を抽出する第一の周波数変換手段11と、第一の中間周
波信号と所定周波数の第二の局発信号とを乗算し、かつ
その乗算結果から第一の中間周波信号を周波数軸上でシ
フトさせた第二の中間周波信号を抽出して復調対象とす
る第二の周波数変換手段13とを備えたヘテロダイン受
信機において、第二の局発信号を生成する基準発振器1
5と、第二の局発信号から周波数合成処理により第一の
局発信号を生成する周波数合成手段17とを備えたこと
を特徴とする。
FIG. 1 is a block diagram showing the principle of the present invention. The present invention multiplies a received wave and a first local oscillation signal corresponding to the frequency, and extracts a first intermediate frequency signal obtained by shifting the received wave on the frequency axis from the multiplication result. A second intermediate obtained by multiplying the frequency conversion means 11, the first intermediate frequency signal and the second local oscillation signal of a predetermined frequency, and shifting the first intermediate frequency signal on the frequency axis from the multiplication result. A reference oscillator 1 for generating a second local oscillation signal in a heterodyne receiver including a second frequency conversion unit 13 for extracting a frequency signal and subjecting it to demodulation.
5 and frequency synthesizing means 17 for generating the first local oscillator signal by frequency synthesis processing from the second local oscillator signal.

【0016】[0016]

【作用】本発明では、周波数合成手段17は基準発振器
15が生成する第二の局発信号から周波数合成処理によ
り第一の局発信号を生成して第一の周波数変換手段11
に与え、かつ基準発振器15は上述した第二の局発信号
を第二の周波数変換手段13に直接与える。
In the present invention, the frequency synthesizing means 17 generates the first local oscillator signal by the frequency synthesizing process from the second local oscillator signal generated by the reference oscillator 15 to generate the first frequency converting means 11.
And the reference oscillator 15 directly supplies the above-mentioned second local oscillation signal to the second frequency conversion means 13.

【0017】これらの2つの局発信号の周波数の比は、
高い周波数の受信波を2回以上の周波数変換処理により
低い周波数の中間周波信号に変換して復調するヘテロダ
イン受信機では大きな値となるので、第一の中間周波信
号および第二の中間周波信号の周波数は、基準発振器1
5の発振周波数と上述した周波数合成処理の合成比との
組み合わせを適性に設定することにより、受信機に要求
される性能に応じて決定される2つの中間周波数に対し
てそれぞれ精度よく合致した値となる。
The ratio of the frequencies of these two local oscillator signals is
In a heterodyne receiver that converts a high-frequency received wave into a low-frequency intermediate-frequency signal by performing frequency conversion processing two or more times and demodulates it, the value becomes large, so that the first intermediate-frequency signal and the second intermediate-frequency signal The frequency is the reference oscillator 1
By appropriately setting the combination of the oscillating frequency of 5 and the synthesis ratio of the above-described frequency synthesis processing, values that accurately match the two intermediate frequencies determined according to the performance required for the receiver are obtained. Becomes

【0018】[0018]

【実施例】以下、図面に基づいて本発明の実施例につい
て詳細に説明する。図2は、本発明の一実施例を示す図
である。
Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 2 is a diagram showing an embodiment of the present invention.

【0019】図において、図4に示すものと機能および
構成が同じものについては、同じ参照番号を付与して示
し、ここではその説明を省略する。本実施例と図4に示
す従来例との構成上の相違点は、周波数シンセサイザ部
60を搭載せず、かつ第二周波数混合部37の局発入力
に水晶発振器43の出力を直結した点にある。
In the figure, parts having the same functions and configurations as those shown in FIG. 4 are designated by the same reference numerals, and the description thereof will be omitted here. The difference between the present embodiment and the conventional example shown in FIG. 4 is that the frequency synthesizer unit 60 is not mounted and the output of the crystal oscillator 43 is directly connected to the local oscillator input of the second frequency mixing unit 37. is there.

【0020】なお、本実施例と図1に示すブロック図と
の対応関係については、帯域フィルタ321 、322
高周波増幅部33、第一周波数混合部34および第一中
間周波フィルタ35は第一の周波数変換手段11に対応
し、第一中間周波増幅器36、第二周波数混合部37お
よび第二中間周波フィルタ38は第二の周波数変換手段
13に対応し、水晶振動子50および水晶発振器43は
基準発振器15に対応し、位相比較器451 、低域フィ
ルタ461 、電圧制御発振器471 、分周器481 、可
変分周器49およびマイクロプロセッサ39は周波数合
成手段17に対応する。
Regarding the correspondence between this embodiment and the block diagram shown in FIG. 1, the band filters 32 1 , 32 2 ,
The high frequency amplifier 33, the first frequency mixer 34, and the first intermediate frequency filter 35 correspond to the first frequency converter 11, and the first intermediate frequency amplifier 36, the second frequency mixer 37, and the second intermediate frequency filter 38. Corresponds to the second frequency converting means 13, the crystal oscillator 50 and the crystal oscillator 43 correspond to the reference oscillator 15, and the phase comparator 45 1 , the low-pass filter 46 1 , the voltage controlled oscillator 47 1 , and the frequency divider 48. 1 , the variable frequency divider 49 and the microprocessor 39 correspond to the frequency synthesizing means 17.

【0021】以下、図2を参照して本実施例の動作を説
明する。本実施例のダブルスーパーヘテロダイン受信機
としての基本構成は従来例と同じであるから、受信波の
周波数が2度に渡って変換され、かつ増幅されて復調器
に与えられる動作についてはその説明を省略する。
The operation of this embodiment will be described below with reference to FIG. Since the basic configuration of the double super-heterodyne receiver of this embodiment is the same as that of the conventional example, the description of the operation in which the frequency of the received wave is converted twice and amplified and given to the demodulator will be described. Omit it.

【0022】周波数シンセサイザ部40から出力される
第一局発信号の周波数Fl1は、受信周波数Fr および第
一中間周波数Fi1に応じて Fl1=Fr ±Fi1 … の式で示され、かつ第一中間周波数Fi1は、水晶発振器
43の発振周波数Fs および第二中間周波数Fi2に応じ
て Fi1=Fs ±Fi2 … の式で示されるが、ここで、分周器441 の分周比をR
とすると、第二中間周波数Fi2は、その分周器の出力信
号の周波数(=Fs /R)および任意の比例定数Aに応
じて Fi2=A(Fs /R) … の式で示されるので、上式は Fi1=Fs ±A(Fs /R) …′ と変形される。また、第一局発信号の周波数Fl1は、周
波数シンセサイザ部40の合成比をNとすると、 Fl1=N(Fs /R) …′ の式で示される。ここで、上式、′からFl1を消去
すると、合成比Nは、 N=(R/Fs)(Fr ±Fi1) … の式で示される。さらに、上式に上式′を代入する
と N=R((Fr/Fs) ±1 ±(A/R)) …′ となる。
The frequency F l1 of the first local oscillator signal output from the frequency synthesizer unit 40 is expressed by the formula F l1 = F r ± F i1 according to the reception frequency F r and the first intermediate frequency F i1. , And the first intermediate frequency F i1 is represented by the formula F i1 = F s ± F i2 according to the oscillation frequency F s of the crystal oscillator 43 and the second intermediate frequency F i2 . The division ratio of 44 1 is R
Then, the second intermediate frequency F i2 is expressed by the formula F i2 = A (F s / R) ... According to the frequency (= F s / R) of the frequency divider output signal and an arbitrary proportional constant A. As shown, the above equation is transformed into F i1 = F s ± A (F s / R) ... ′. Further, the frequency F l1 of the first local oscillator signal is represented by the formula F l1 = N (F s / R) ... ′ When the synthesis ratio of the frequency synthesizer unit 40 is N. Here, when F l1 is deleted from the above equation, ′, the synthesis ratio N is represented by the equation N = (R / F s ) (F r ± F i1 ). Further, by substituting the above equation 'into the above equation, N = R ((F r / F s ) ± 1 ± (A / R)).

【0023】ところで、周波数シンセサイザ部40で
は、マイクロプロセッサ39の制御の下で第一局発信号
を生成して受信周波数を切り替え設定するために、分周
器44 1 の分周比Rは、その第一局発信号の周波数Fl1
の切り替えステップ幅(=Fs/R)が所望の最小チャ
ネル間隔(例えば、25kHz)に等しくなる値に設定さ
れる。したがって、例えば、上式′の第一項の値は整
数値となり、かつ分周器441 の分周比Rおよび上述し
た合成比Nも本実施例の回路構成から整数値となるか
ら、比例定数Aも整数値となる。
In the frequency synthesizer section 40,
Is a first local signal under the control of the microprocessor 39.
To generate and switch the receive frequency
Bowl 44 1Is the frequency division ratio R of the frequency F of the first local oscillator signal.l1
Switching step width (= Fs/ R) is the desired minimum char
Set to a value equal to the channel spacing (eg 25 kHz).
Be done. Therefore, for example, the value of the first term in equation
Numerical value and frequency divider 441The division ratio R of
Is the combined ratio N also an integer value from the circuit configuration of this embodiment?
Therefore, the proportional constant A also becomes an integer value.

【0024】このように本実施例によれば、上式′、
に示すように、第一中間周波数F i1および第二中間周
波数Fi2が水晶発振器43の発振周波数Fs 、分周器4
1の分周比Rおよび整数Aによって制限されるが、マ
イクロプロセッサ39の制御の下で可変分周器49の分
周比を上式′に示す合成比Nに設定することにより、
従来例と同様に受信周波数Fr を切り替えて受信するこ
とができ、第二局発信号を生成する専用の周波数シンセ
サイザ部を用いずに構成されるので、従来例に比べて回
路構成が簡略化される。
As described above, according to this embodiment, the above equation ',
As shown in, the first intermediate frequency F i1And the second middle lap
Wave number Fi2Is the oscillation frequency F of the crystal oscillator 43s, Divider 4
Four1Limited by the division ratio R and the integer A of
Under the control of the icroprocessor 39, the variable divider 49
By setting the circumference ratio to the composite ratio N shown in the above equation,
Reception frequency F as in the conventional examplerCan be switched to receive
And a dedicated frequency synthesizer that generates a second local oscillator signal.
Since it is configured without using the sizer,
The road structure is simplified.

【0025】また、本実施例では、上述したように2つ
の中間周波数の設定値に制限があるが、例えば、従来の
第一中間周波数(例えば、10.7MHz)に近い値(例え
ば、10.25 MHz)に水晶発振器43の発振周波数Fs
設定すると、その発振周波数に応じて整数Aの値を適性
値(例えば、「18」)に設定することより、第二中間
周波数Fi2は従来の第二中間周波数(= 455kHz)の近
似値(= 450kHz)に設定され、かつ上述した水晶発振
器43の発振周波数Fs に応じて分周比Rの値を適性値
(例えば、「410」)に設定することにより、第一中
間周波数Fi1は従来の第一中間周波数と同じ値に設定さ
れる。
In the present embodiment, the set values of the two intermediate frequencies are limited as described above, but for example, a value (eg, 10.25 MHz) close to the conventional first intermediate frequency (eg, 10.7 MHz) is set. When the oscillation frequency F s of the crystal oscillator 43 is set to, the value of the integer A is set to an appropriate value (for example, “18”) according to the oscillation frequency, so that the second intermediate frequency F i2 It is set to an approximate value (= 450 kHz) of the intermediate frequency (= 455 kHz), and the value of the frequency division ratio R is set to an appropriate value (for example, "410") according to the oscillation frequency F s of the crystal oscillator 43 described above. As a result, the first intermediate frequency F i1 is set to the same value as the conventional first intermediate frequency.

【0026】すなわち、受信周波数Fr と第一中間周波
数Fi1との比およびその中間周波数と第二中間周波数F
i2との比は、水晶発振器43の発振周波数Fs 、整数A
の値、分周器441 の分周比Rの設定値に応じて従来例
とほぼ同じ値あるいは全く同じ値とすることができるか
ら、イメージ選択度その他の受信特性が従来例に比べて
大きく劣化することはない。
That is, the ratio between the reception frequency F r and the first intermediate frequency F i1 and the intermediate frequency and the second intermediate frequency F i
The ratio with i2 is the oscillation frequency F s of the crystal oscillator 43, an integer A
Value, because it can be a conventional example according to the set value of the division ratio R of the frequency divider 44 1 and substantially the same value or no same value, images selectivity other reception characteristics greatly as compared with the prior art It does not deteriorate.

【0027】なお、本実施例では、ダブルスーパーヘテ
ロダイン受信機に本発明を適用した一例について述べた
が、本発明は、このような構成の受信機に限定されず、
例えば、トリプルスーパーヘテロダイン方式の受信機に
ついても同様に適用可能である。
In the present embodiment, an example in which the present invention is applied to a double superheterodyne receiver has been described, but the present invention is not limited to a receiver having such a configuration,
For example, the same can be applied to a triple superheterodyne receiver.

【0028】また、本実施例では、周波数軸上に等間隔
で配置された複数の無線チャネルの何れか1つに対応し
た周波数に周波数シンセサイザ部40の発振周波数を設
定するために、上述した定数Aとして整数値を設定した
が、本発明は、このような値に限定されず、例えば、周
波数シンセサイザ部40の回路構成によりその合成比N
が整数値に限定されても上述した分周比Rに応じて上式
′の括弧内の値が整数値になれば十分であり、また、
周波数シンセサイザ部40が反復合成型の周波数合成処
理を行うために合成比Nが非整数値となる場合には、定
数Aとして整数値を設定する必要はない。
Further, in this embodiment, in order to set the oscillation frequency of the frequency synthesizer unit 40 to a frequency corresponding to any one of a plurality of radio channels arranged at equal intervals on the frequency axis, the above-mentioned constants are set. Although an integer value is set as A, the present invention is not limited to such a value, and for example, the synthesis ratio N is determined by the circuit configuration of the frequency synthesizer unit 40.
Is limited to an integer value, it suffices that the value in parentheses of the above formula 'becomes an integer value in accordance with the above-mentioned frequency division ratio R, and
When the synthesis ratio N has a non-integer value because the frequency synthesizer unit 40 performs the iterative synthesis type frequency synthesis processing, it is not necessary to set the integer value as the constant A.

【0029】さらに、本実施例では、最小チャネル間隔
に基づいて定数Aの設定値を決定しているが、本発明で
は、例えば、単一の無線チャネルを介して通信を行うシ
ステムでは、定数Aの設定値にこのような制限は伴わな
い。
Further, in the present embodiment, the setting value of the constant A is determined based on the minimum channel interval. However, in the present invention, for example, in the system which communicates via a single radio channel, the constant A is set. There is no such limitation in the setting value of.

【0030】[0030]

【発明の効果】以上説明したように本発明では、周波数
合成手段に周波数基準を与える基準発振器に第二の局発
信号を直接生成させ、かつ周波数合成手段の合成比を適
性に設定することにより、第一の中間周波信号および第
二の中間周波信号の周波数が、受信機に要求される性能
に応じて決定される2つの中間周波数に対して大きな誤
差を伴わずに設定される。
As described above, according to the present invention, the second oscillator signal is directly generated by the reference oscillator which gives the frequency reference to the frequency synthesizing means, and the synthesizing ratio of the frequency synthesizing means is appropriately set. , The frequencies of the first intermediate frequency signal and the second intermediate frequency signal are set without a large error with respect to the two intermediate frequencies determined according to the performance required of the receiver.

【0031】したがって、受信波に対する周波数変換が
2回以上行われる受信機では、従来例と同等の性能を保
持しつつ回路構成が簡略化されて小型化、低廉化および
高信頼化がはかられる。
Therefore, in the receiver in which the frequency conversion with respect to the received wave is performed twice or more, the circuit configuration is simplified, the size is reduced, the cost is reduced, and the reliability is improved while maintaining the performance equivalent to that of the conventional example. ..

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の原理ブロック図である。FIG. 1 is a principle block diagram of the present invention.

【図2】本発明の一実施例を示す図である。FIG. 2 is a diagram showing an embodiment of the present invention.

【図3】従来のダブルスーパーヘテロダイン受信機の構
成例を示す図である。
FIG. 3 is a diagram showing a configuration example of a conventional double super heterodyne receiver.

【図4】先願にかかわるダブルスーパーヘテロダイン受
信機の構成を示す図である。
FIG. 4 is a diagram showing the configuration of a double superheterodyne receiver according to the prior application.

【符号の説明】[Explanation of symbols]

11 第一の周波数変換手段 13 第二の周波数変換手段 15 基準発振器 17 周波数合成手段 31 アンテナ 32 帯域フィルタ 33 高周波増幅部 34 第一周波数混合部(MIX1) 35 第一中間周波フィルタ 36 第一中間周波増幅部 37 第二周波数混合部(MIX2) 38 第二中間周波フィルタ 39 マイクロプロセッサ(CPU) 40,60 周波数シンセサイザ部 41 水晶発振器(OSC) 42,50 水晶振動子 43 水晶発振器(TCXO) 44,48 分周器 45 位相比較器 46 低域フィルタ(LPF) 47 電圧制御発振器(VCO) 49 可変分周器11 First Frequency Converting Means 13 Second Frequency Converting Means 15 Reference Oscillator 17 Frequency Synthesizing Means 31 Antennas 32 Bandpass Filters 33 High Frequency Amplifiers 34 First Frequency Mixers (MIX 1 ) 35 First Intermediate Frequency Filters 36 First Intermediates Frequency amplification unit 37 Second frequency mixing unit (MIX 2 ) 38 Second intermediate frequency filter 39 Microprocessor (CPU) 40, 60 Frequency synthesizer unit 41 Crystal oscillator (OSC) 42, 50 Crystal oscillator 43 Crystal oscillator (TCXO) 44 , 48 frequency divider 45 phase comparator 46 low pass filter (LPF) 47 voltage controlled oscillator (VCO) 49 variable frequency divider

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 受信波とその周波数に対応した第一の局
発信号とを乗算し、かつその乗算結果から前記受信波を
周波数軸上でシフトさせた第一の中間周波信号を抽出す
る第一の周波数変換手段(11)と、 前記第一の中間周波信号と所定周波数の第二の局発信号
とを乗算し、かつその乗算結果から前記第一の中間周波
信号を周波数軸上でシフトさせた第二の中間周波信号を
抽出して復調対象とする第二の周波数変換手段(13)
とを備えたヘテロダイン受信機において、 前記第二の局発信号を生成する基準発振器(15)と、 前記第二の局発信号から周波数合成処理により前記第一
の局発信号を生成する周波数合成手段(17)とを備え
たことを特徴とするヘテロダイン受信機。
1. A first intermediate frequency signal obtained by multiplying a received wave and a first local oscillation signal corresponding to the frequency, and extracting the first intermediate frequency signal obtained by shifting the received wave on the frequency axis from the multiplication result. One frequency conversion means (11), the first intermediate frequency signal and the second local oscillation signal of a predetermined frequency are multiplied, and the first intermediate frequency signal is shifted on the frequency axis from the multiplication result. Second frequency conversion means (13) for extracting the second intermediate frequency signal and subjecting it to demodulation
A heterodyne receiver comprising: a reference oscillator (15) for generating the second local oscillator signal; and a frequency synthesizer for generating the first local oscillator signal by frequency synthesis processing from the second local oscillator signal. A heterodyne receiver comprising means (17).
JP4277392A 1992-02-28 1992-02-28 Heterodyne receiver Withdrawn JPH05244030A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4277392A JPH05244030A (en) 1992-02-28 1992-02-28 Heterodyne receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4277392A JPH05244030A (en) 1992-02-28 1992-02-28 Heterodyne receiver

Publications (1)

Publication Number Publication Date
JPH05244030A true JPH05244030A (en) 1993-09-21

Family

ID=12645293

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4277392A Withdrawn JPH05244030A (en) 1992-02-28 1992-02-28 Heterodyne receiver

Country Status (1)

Country Link
JP (1) JPH05244030A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009529840A (en) * 2006-03-13 2009-08-20 クリア セミコンダクター コーポレイション RF-baseband receiver architecture

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009529840A (en) * 2006-03-13 2009-08-20 クリア セミコンダクター コーポレイション RF-baseband receiver architecture

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