JPH05243446A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH05243446A JPH05243446A JP4044198A JP4419892A JPH05243446A JP H05243446 A JPH05243446 A JP H05243446A JP 4044198 A JP4044198 A JP 4044198A JP 4419892 A JP4419892 A JP 4419892A JP H05243446 A JPH05243446 A JP H05243446A
- Authority
- JP
- Japan
- Prior art keywords
- frame
- lead
- semiconductor device
- resin
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明はプラスチックパッケージ
を用いた半導体装置の製造方法に関する。高度情報処理
社会はますます発達しており，より高速なコンピュータ
の存在が必要となる。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device using a plastic package. The advanced information processing society is developing more and more, and the existence of faster computers is required.
【０００２】この為にはコンピュータの基本部品である
集積回路素子の多層化，微細化にともない，これら集積
回路素子を組み込むプラスチックパッケージも精密度を
大幅に向上させる必要がある。For this reason, with the multi-layering and miniaturization of integrated circuit elements, which are the basic parts of computers, it is necessary to greatly improve the precision of plastic packages incorporating these integrated circuit elements.
【０００３】[0003]
【従来の技術】図３は従来例の説明図である。図におい
て，１はフラットリードフレーム，２はステージ，３は
インナーリード，４は枠，５はチップ，６はカバー樹
脂，７はモールド樹脂，８はワイヤ，９はリードクラン
パ，10は石英ガラス, 11は近赤外線ヒータ，12はリード
フレーム, 13はリード, 14はヒーターブロックである。2. Description of the Related Art FIG. 3 is an explanatory view of a conventional example. In the figure, 1 is a flat lead frame, 2 is a stage, 3 is an inner lead, 4 is a frame, 5 is a chip, 6 is a cover resin, 7 is a mold resin, 8 is a wire, 9 is a lead clamper, 10 is quartz glass, 11 is a near infrared heater, 12 is a lead frame, 13 is a lead, and 14 is a heater block.
【０００４】従来技術の金(Au)線によるネールヘッドボ
ンディングにおいては, 図３（ａ）に示すような多ピン
のリードフレーム12が使用されているが, 耐湿性を保つ
ために，ステージ２がリード13より一段下がった，ディ
プレス段差のあるリードフレーム12を使用してワイヤボ
ンディングを行っていた。In the prior art nail head bonding with gold (Au) wire, a multi-pin lead frame 12 as shown in FIG. 3 (a) is used, but in order to keep moisture resistance, the stage 2 is Wire bonding was performed using a lead frame 12 having a depressed step, which is one step lower than the lead 13.
【０００５】[0005]
【発明が解決しようとする課題】ところが，各品種毎に
段差の大きさ，及びインナーリードパターンが異なるた
めに，ボンディングパターンに合わせて，各々のヒータ
ーブロック14やリードクランパ９を製作し，ボンディン
グ品種が変わる度に，これらヒーターブロック14やリー
ドクランパ９の交換を必要としていた。However, since the size of the step and the inner lead pattern are different for each type, each heater block 14 and the lead clamper 9 are manufactured in accordance with the bonding pattern, and the bonding type is changed. Each time, the heater block 14 and the lead clamper 9 had to be replaced.
【０００６】本発明は，これらワイヤボンディング時に
使用するヒーターブロック14やリードクランパ９の汎用
化と，ワンヤボンディングやモールド封じに伴う諸問題
の改善を目的として提供される。The present invention is provided for the purpose of generalizing the heater block 14 and the lead clamper 9 used at the time of wire bonding and improving various problems associated with one-way bonding and mold sealing.
【０００７】[0007]
【課題を解決するための手段】図１は本発明の原理説明
図，図２は本発明の一実施例の説明図である。図におい
て，１はフラットリードフレーム，２はステージ，３は
インナーリード，４は枠，５はチップ，６はカバー樹
脂，７はモールド樹脂，８はワイヤ，９はリードクラン
パ，10は石英ガラス, 11は近赤外線ヒータ, 12はリード
フレームである。FIG. 1 is an explanatory view of the principle of the present invention, and FIG. 2 is an explanatory view of an embodiment of the present invention. In the figure, 1 is a flat lead frame, 2 is a stage, 3 is an inner lead, 4 is a frame, 5 is a chip, 6 is a cover resin, 7 is a mold resin, 8 is a wire, 9 is a lead clamper, 10 is quartz glass, Reference numeral 11 is a near infrared heater, and 12 is a lead frame.
【０００８】図１, 図２により，問題点を解決するため
の手段を示す。図１（ｂ）に，図１（ａ）に斜視図で示
すフラットリードフレームのＢ−Ｂ’ラインでカットし
た断面図で示すように，先ず，フラットリードフレーム
１を用いて，その段差をなくし，インナーリード３先端
から離れた一定の位置に，プラスチックや黒色セラミッ
クのような絶縁物からなり，ワイヤボンディング時のイ
ンナーリード３のばたつきを防ぐような構造を有する器
状の枠４を設ける。1 and 2 show means for solving the problem. As shown in FIG. 1B, which is a cross-sectional view of the flat lead frame shown in FIG. 1A cut along the line BB ′, first, the flat lead frame 1 is used to eliminate the step. At a certain position away from the tips of the inner leads 3, a container-shaped frame 4 made of an insulating material such as plastic or black ceramic and having a structure for preventing the inner leads 3 from fluttering during wire bonding is provided.
【０００９】そして，ＩＣ等のチップ５とインナーリー
ド３との間のワイヤボンディングを行う場合には，枠４
を汎用性のリードクランパ９で保持して，ステージ２の
裏面に固着した枠４の底部のみを石英ガラス10からなる
ヒーターブロックに接触させて, 近赤外線ヒータにより
局部加熱する。When wire bonding is performed between the chip 5 such as an IC and the inner lead 3, the frame 4 is used.
Is held by a versatile lead clamper 9, only the bottom of the frame 4 fixed to the back surface of the stage 2 is brought into contact with a heater block made of quartz glass 10 and locally heated by a near infrared heater.
【００１０】これにより，ヒーターブロックやリードク
ランパ９の汎用性を図れる。また，枠をセラミック素材
を含む樹脂素材とし，近赤外線ヒータ11で加熱すること
で，枠の内部リードのみの局所加熱が可能となり，外リ
ードの酸化を防ぐことができる。As a result, the versatility of the heater block and the lead clamper 9 can be achieved. Further, by making the frame a resin material containing a ceramic material and heating it by the near infrared heater 11, only the inner leads of the frame can be locally heated and the outer leads can be prevented from being oxidized.
【００１１】更に，枠４を器状とすることで，エッジシ
ョート，モールド封止め時のワイヤフロー等の対策とし
て，器状の枠４内とカバー樹脂６の粘度や種類を変えた
塗布が可能となる。Further, by making the frame 4 into a vessel shape, as a countermeasure against edge short-circuiting, wire flow at the time of mold sealing, etc., coating in the vessel-shaped frame 4 and the cover resin 6 with different viscosities and types is possible. Becomes
【００１２】即ち，本発明の目的は，図１（ａ）に斜視
図で示すような，プラスチックパッケージ用フラットリ
ードフレーム１に，図１（ａ）のＢ−Ｂ’ラインでカッ
トした断面図を図１（ｂ）に示すように，あらかじめ，
各インナーリード３の先端より離れた位置を固着する枠
４を設け，枠４をリードクランパ９により押さて，イン
ナーリード３とチップ５のワイヤボンディングを行うこ
とにより，そして，前記枠４がステージ２裏面に接した
底部を有する器状であることにより，また，前記インナ
ーリード３とチップ５のワイヤボンディングに際して,
図２に示すように，前記枠４のみを，裏面より加熱する
ことにより，更に，前記枠４にカバー樹脂６を封入し，
続いてモールド樹脂７により前記フラットリードフレー
ム１のモールドを行うことにより達成される。That is, an object of the present invention is to provide a flat lead frame 1 for a plastic package, as shown in a perspective view in FIG. 1 (a), with a sectional view taken along line BB 'in FIG. 1 (a). As shown in FIG. 1 (b),
A frame 4 is provided to fix the inner lead 3 at a position apart from the tip of the inner lead 3, and the frame 4 is pressed by a lead clamper 9 to wire-bond the inner lead 3 and the chip 5. Due to the container-like shape having the bottom portion in contact with the back surface, and in the wire bonding of the inner lead 3 and the chip 5,
As shown in FIG. 2, by heating only the frame 4 from the back surface, a cover resin 6 is further enclosed in the frame 4,
This is achieved by subsequently molding the flat lead frame 1 with the molding resin 7.
【００１３】[0013]
【作用】以上説明した問題点を解決する手段により，汎
用性のリードクランプを用いて枠を押さえて，ワイヤボ
ンディング時のリードのばたつきを防止できる。By the means for solving the problems described above, it is possible to prevent the flapping of the leads at the time of wire bonding by pressing the frame by using a versatile lead clamp.
【００１４】また，器状の枠を使用し，ステージ背面に
固着した枠の底部のみをヒーターブロックにより加熱す
ることで，均一，且つ，局所的に効率の良い加熱がで
き，外側リードの酸化を防げる。Further, by using a vessel-shaped frame and heating only the bottom of the frame fixed to the back surface of the stage by the heater block, uniform and local efficient heating can be performed, and oxidation of the outer leads can be prevented. You can prevent it.
【００１５】更に，器状の枠内に速乾性のカバー樹脂を
封入することにより，モールド樹脂注入時のワイヤーフ
ローが皆無となり，また，耐湿製のあるカバー樹脂を使
用することで耐湿性が向上する。Further, by enclosing a quick-drying cover resin in a vessel-shaped frame, there is no wire flow at the time of injecting the mold resin, and the moisture resistance is improved by using the moisture-proof cover resin. To do.
【００１６】[0016]
【実施例】図１は本発明の原理説明図，図２は本発明の
一実施例の説明図である。先ず, 本発明を図３（ａ）の
２０ピンプラスチックパッケージに適用した実施例につ
いて，図１，及び図２により説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is an explanatory view of the principle of the present invention, and FIG. 2 is an explanatory view of an embodiment of the present invention. First, an embodiment in which the present invention is applied to the 20-pin plastic package of FIG. 3A will be described with reference to FIGS.
【００１７】図１（ａ）に示すように，薄型の樹脂封止
半導体装置の製造プロセスに，フラットリードフレーム
１を採用し，インナーリード３先端からワイヤボンディ
ング領域を含む所定の位置に，枠４を設けてインナーリ
ード３を固着する。As shown in FIG. 1 (a), a flat lead frame 1 is adopted in a manufacturing process of a thin resin-sealed semiconductor device, and a frame 4 is provided at a predetermined position including a tip of the inner lead 3 and a wire bonding region. To fix the inner lead 3.
【００１８】ただ，インナーリード３を枠で固着するだ
けでも，ワイヤボンディング時のインナーリード３のば
たつきがなくなり，リードクランパも汎用化が図れる。
本発明では，更に，図１（ｂ）に示すように，この枠４
にステージ２の裏面に固着した底部を設けて器状の枠４
を形成する。そして，枠４の内側のインナーリード３を
枠４で固着する。However, even if the inner leads 3 are simply fixed by a frame, the fluttering of the inner leads 3 at the time of wire bonding is eliminated, and the lead clamper can be generalized.
In the present invention, as shown in FIG.
The bottom fixed to the back surface of the stage 2 is provided to the frame 4
To form. Then, the inner leads 3 inside the frame 4 are fixed to the frame 4.
【００１９】この器状の枠４はセラミック素材を含む黒
体に近い樹脂を用い，ヒーターブロックとして，図２に
示すように平坦な石英ガラス10を介した近赤外線ヒータ
11を用いて加熱することで，ワィヤボンディング部分の
局所加熱が可能となり，外側リードの酸化を防ぐことが
可能となる。The container-shaped frame 4 is made of a resin that is close to a black body and contains a ceramic material. As a heater block, a near-infrared heater is provided through a flat quartz glass 10 as shown in FIG.
By heating with 11, it is possible to locally heat the wire bonding portion and prevent oxidation of the outer leads.
【００２０】更に，図１（ｃ）に示すように，従来は，
リードフレーム12をモールド樹脂７でそのまま封止成形
していたものを，本発明では，図１（ｄ）に示すよう
に，ワイヤボンディング後，枠４内に，即乾性樹脂で吸
湿しにくいカバー樹脂６を注入塗布し，リフロー硬化さ
せて，その後のモールド樹脂７による封止成形時のワイ
ヤフローを防止できる。Further, as shown in FIG. 1 (c), conventionally,
In the present invention, as shown in FIG. 1 (d), the lead frame 12 which has been encapsulated and molded by the mold resin 7 is covered with the cover resin which is hard to absorb moisture by the immediate dry resin after the wire bonding. It is possible to prevent the wire flow at the time of encapsulation molding by the molding resin 7 after the injection coating and the reflow hardening.
【００２１】[0021]
【発明の効果】以上説明したように，本発明によれば，
第１に枠をクランプすることで，インナーリードを押さ
え，器状の枠を使用し，枠の裏側を接触加熱することで
リードクランパ，ヒーターブロック等の治具の汎用化が
図れ，近赤外線ヒータにて，枠を加熱することで，均
一，且つ，局所的に効率の良い加熱がてき，外側リード
の加熱を防げる。As described above, according to the present invention,
First, by clamping the frame, the inner lead is held down, and a vessel-shaped frame is used. By heating the back side of the frame by contact heating, jigs such as the lead clamper and heater block can be generalized, and the near infrared heater By heating the frame, uniform and local efficient heating can be achieved, and heating of the outer leads can be prevented.
【００２２】ボンディングワイヤの場合リードが確実に
枠で固着されているため，ボンディング性の向上が図れ
る。器状の枠を設け，枠内に速乾性のカバー樹脂にて保
護することにより，モールド樹脂注入時のワイヤーフロ
ーが皆無となり，水分侵入を防ぐことができる。In the case of the bonding wire, the lead is securely fixed to the frame, so that the bonding property can be improved. By providing a vessel-shaped frame and protecting the frame with a quick-drying cover resin, there is no wire flow when injecting the mold resin, and it is possible to prevent water from entering.
【００２３】この結果，本発明は，プラスチックパッケ
ージにおいて，薄型パッケージ，または，耐湿性向上の
ための高粘度モールド樹脂を用いた製造技術の向上に寄
与するところが大きい。As a result, the present invention greatly contributes to the improvement of the manufacturing technology of a thin package or a high-viscosity mold resin for improving the moisture resistance in the plastic package.
【図１】 本発明の原理説明図FIG. 1 is an explanatory view of the principle of the present invention.
【図２】 本発明の一実施例の説明図FIG. 2 is an explanatory diagram of an embodiment of the present invention.
【図３】 従来例の説明図FIG. 3 is an explanatory diagram of a conventional example.
図において， １ フラットリードフレーム ２ ステージ ３ インナーリード ４ 枠 ５ チップ ６ カバー樹脂 ７ モールド樹脂 ８ ワイヤ ９ リードクランパ 10 石英ガラス 11 近赤外線ヒータ 12 リードフレーム In the figure, 1 flat lead frame 2 stage 3 inner lead 4 frame 5 chip 6 cover resin 7 mold resin 8 wire 9 lead clamper 10 quartz glass 11 near infrared heater 12 lead frame
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 23/31 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Internal reference number FI technical display location H01L 23/31
Claims (4)
ドフレーム(1) に，あらかじめ，各インナーリード(3)
の先端より離れた位置を固着する枠(4) を設け，該枠
(4) をリードクランパ(9) により押さえて，該インナー
リード(3) とチップ(5) のワイヤボンディングを行うこ
とを特徴とする半導体装置の製造方法。1. A flat lead frame (1) for a plastic package is provided with each inner lead (3) in advance.
A frame (4) for fixing the position apart from the tip of the
A method for manufacturing a semiconductor device, characterized in that (4) is pressed by a lead clamper (9) to wire-bond the inner lead (3) and the chip (5).
底部を有する器状であることを特徴とする請求項１記載
の半導体装置の製造方法。2. The method for manufacturing a semiconductor device according to claim 1, wherein the frame (4) has a container shape having a bottom portion in contact with the back surface of the stage (2).
ワイヤボンディングに際して, 前記枠(4) のみを裏面よ
り加熱することを特徴とする請求項１或いは２記載の半
導体装置の製造方法。3. The method of manufacturing a semiconductor device according to claim 1, wherein only the frame (4) is heated from the back surface when wire-bonding the inner lead (3) and the chip (5).
し，続いてモールド樹脂(7) により前記フラットリード
フレーム(1) のモールドを行うことを特徴とする請求項
１或いは２，３記載の半導体装置の製造方法。4. The flat lead frame (1) is molded with a cover resin (6) enclosed in the frame (4) and subsequently with a mold resin (7). 3. A method for manufacturing a semiconductor device according to claim 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4044198A JPH05243446A (en) | 1992-03-02 | 1992-03-02 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4044198A JPH05243446A (en) | 1992-03-02 | 1992-03-02 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05243446A true JPH05243446A (en) | 1993-09-21 |
Family
ID=12684877
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4044198A Withdrawn JPH05243446A (en) | 1992-03-02 | 1992-03-02 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05243446A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7556987B2 (en) * | 2006-06-30 | 2009-07-07 | Stats Chippac Ltd. | Method of fabricating an integrated circuit with etched ring and die paddle |
| US7671463B2 (en) | 2006-03-30 | 2010-03-02 | Stats Chippac Ltd. | Integrated circuit package system with ground ring |
-
1992
- 1992-03-02 JP JP4044198A patent/JPH05243446A/en not_active Withdrawn
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7671463B2 (en) | 2006-03-30 | 2010-03-02 | Stats Chippac Ltd. | Integrated circuit package system with ground ring |
| US7556987B2 (en) * | 2006-06-30 | 2009-07-07 | Stats Chippac Ltd. | Method of fabricating an integrated circuit with etched ring and die paddle |
| US7863108B2 (en) | 2006-06-30 | 2011-01-04 | Stats Chippac Ltd. | Integrated circuit packaging system with etched ring and die paddle and method of manufacture thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19990518 |