JPH05235248A - Lead frame - Google Patents
Lead frameInfo
- Publication number
- JPH05235248A JPH05235248A JP4033637A JP3363792A JPH05235248A JP H05235248 A JPH05235248 A JP H05235248A JP 4033637 A JP4033637 A JP 4033637A JP 3363792 A JP3363792 A JP 3363792A JP H05235248 A JPH05235248 A JP H05235248A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- die pad
- support bar
- pad
- extension line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、リ―ドフレ―ムおよび
その製造方法に係り、特に、ダイパッドの形状およびそ
の形成に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame and a method for manufacturing the same, and more particularly to the shape of a die pad and its formation.
【０００２】[0002]
【従来の技術】ＩＣ、ＬＳＩ等の半導体装置においては
高集積化に伴いチップサイズが大型化しており、この結
果パッケージ寸法に対するパッドサイズの占有面積が大
きくなってきている。このため、パッケージを構成する
モールド樹脂とパッド裏面との密着性の低下が問題とな
っている。2. Description of the Related Art In semiconductor devices such as ICs and LSIs, the chip size has become larger with higher integration, and as a result, the area occupied by the pad size with respect to the package size has become larger. Therefore, there is a problem that the adhesiveness between the mold resin forming the package and the back surface of the pad is lowered.
【０００３】そこでモールド樹脂とパッド裏面との密着
性を向上させるためにパッド裏面に凹部を設けモールド
樹脂との接触面積を高める方法が提案されている。Therefore, in order to improve the adhesion between the mold resin and the back surface of the pad, a method has been proposed in which a recess is provided on the back surface of the pad to increase the contact area with the mold resin.
【０００４】ところで通常、リ―ドフレ―ム１は、図４
に示す如く、半導体集積回路チップ（以下半導体チッ
プ）を搭載するダイパッド１１と、ダイパッドを取り囲
むように配設せしめられた複数のインナ―リ―ド１２と
インナ―リ―ド１２を一体的に連結するタイバ―１３
と、各インナ―リ―ドに連結せしめられタイバ―の外側
に伸張するアウタ―リ―ド１４と、タイバ―１３を両サ
イドから支持するサイドバ―１５，１６と、ダイパッド
１１を支持するサポ―トバ―１７とから構成されてい
る。そして上述したようにモールド樹脂との密着性を高
めるために、ダイパッド１１の裏面全体にディンプル加
工によって形成された凹部ｈが多数形成されている。Normally, the lead frame 1 is shown in FIG.
As shown in FIG. 1, a die pad 11 on which a semiconductor integrated circuit chip (hereinafter referred to as a semiconductor chip) is mounted, a plurality of inner leads 12 and inner leads 12 arranged so as to surround the die pad are integrally connected. Taiba 13
And an outer lead 14 which is connected to each inner lead and extends outside the tie bar, side bars 15 and 16 for supporting the tie bar 13 from both sides, and a support for supporting the die pad 11. It consists of Tober-17. As described above, in order to improve the adhesion to the mold resin, a large number of recesses h formed by dimple processing are formed on the entire back surface of the die pad 11.
【０００５】このようなリ―ドフレ―ムを用いて実装せ
しめられる半導体装置は図５に示す如くであり、リ―ド
フレ―ム１のダイパッド１１上に、半導体チップ２を搭
載し、この半導体チップのボンディングパッドとリ―ド
フレ―ムのインナ―リ―ド１２とを金線あるいはアルミ
線のボンディングワイヤ３によって結線し、更にこれら
を樹脂４で封止した後、タイバ―やサイドバ―を切断
し、アウタ―リ―ドを所望の形状に折り曲げて完成せし
められる。A semiconductor device mounted by using such a lead frame is as shown in FIG. 5, in which the semiconductor chip 2 is mounted on the die pad 11 of the lead frame 1 and the semiconductor chip 2 is mounted on the die pad 11. The bonding pad and the inner frame 12 of the lead frame are connected by a bonding wire 3 of a gold wire or an aluminum wire, which is further sealed with resin 4, and then the tie bar and the side bar are cut. , The outer lead is bent into a desired shape to complete.
【０００６】このようにダイパッド裏面に凹部を形成す
ることにより、モールド樹脂がこの凹部の中に充填さ
れ、密着性は向上する。By thus forming the concave portion on the back surface of the die pad, the mold resin is filled in the concave portion, and the adhesion is improved.
【０００７】しかしながらスタンピングによって形状加
工を行う場合には、パッド裏面に凹部を設けた場合、パ
ッドに伸びが生じ、この伸びによってサポートバーが押
され、パッドの水平位置が変位してしまうという問題が
あった。However, in the case of performing shape processing by stamping, when a recess is provided on the back surface of the pad, the pad is stretched, and the support bar is pushed by this stretch, and the horizontal position of the pad is displaced. there were.
【０００８】この問題を解決するため、凹部の形成だけ
をエッチングによって行う等の方法も提案されている
が、工程が複雑となり、製造コストの高騰を招く結果と
なり、実用的でないという問題があった。In order to solve this problem, a method has been proposed in which only the formation of the recess is performed by etching, but the process becomes complicated and the manufacturing cost rises, which is not practical. ..
【０００９】[0009]
【発明が解決しようとする課題】このように、ダイパッ
ド裏面に凹部を形成することによって、パッケージとダ
イパッドとの密着性は向上するが、リードフレームの形
状加工にスタンピングを用いる場合には、パッド裏面に
凹部を設ける際に、パッドに伸びが生じ、この伸びによ
ってサポートバーが押され、パッドの水平位置が変位し
てしまうという問題がある。As described above, by forming the concave portion on the back surface of the die pad, the adhesion between the package and the die pad is improved. However, when stamping is used to shape the lead frame, the back surface of the pad is reduced. There is a problem that when the recess is formed in the pad, the pad is stretched, and the stretch pushes the support bar to displace the horizontal position of the pad.
【００１０】本発明は、前記実情に鑑みてなされたもの
で、高密度化に際し、封止樹脂との密着性が高く、信頼
性の高いリ−ドフレ−ムを提供することを目的とする。The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a highly reliable lead frame having high adhesion with a sealing resin when the density is increased.
【００１１】[0011]
【課題を解決するための手段】そこで本発明の第１で
は、ダイパッドのサポートバーの延長線上を除く領域に
複数の凹部を配設している。Therefore, according to the first aspect of the present invention, a plurality of recesses are provided in a region of the die pad other than the extension line of the support bar.
【００１２】また本発明の第２では、ダイパッドに凹部
を配設したリードフレームにおいて、ダイパッドのサポ
ートバーの延長線上の少なくとも一部に貫通孔を形成し
ている。According to the second aspect of the present invention, in the lead frame in which the recess is provided in the die pad, the through hole is formed in at least a part of the extension line of the support bar of the die pad.
【００１３】[0013]
【作用】上記第１の構造によれば、ダイパッドに設けら
れる凹部はサポートバーの延長線上を除く領域に設けら
れるため、スタンピングによる加工を行っても直接的に
サポートバー方向の伸びの発生を避けることができ、こ
れによるダイパッド水平位置のずれを避けることががで
きる。この凹部は通常ダイパッドの半導体チップ非搭載
面側に設けられるが、搭載面側に設けてもよい。According to the first structure described above, since the recess provided in the die pad is provided in a region other than the extension line of the support bar, even if the stamping process is performed, the expansion in the support bar direction is directly avoided. Therefore, it is possible to avoid the displacement of the horizontal position of the die pad. This recess is normally provided on the semiconductor chip non-mounting surface side of the die pad, but it may be provided on the mounting surface side.
【００１４】また第２の構造によれば、ダイパッドのサ
ポートバーの延長線上の少なくとも一部に貫通孔を形成
しているため、凹部の形成によってサポートバー方向に
伸びが生じてもこの貫通孔によって吸収されるため、サ
ポートバー方向の寸法精度の低下を招くこともない。Further, according to the second structure, since the through hole is formed in at least a part of the extension line of the support bar of the die pad, even if the through hole is formed in the direction of the support bar due to the formation of the recess, the through hole causes the through hole. Since it is absorbed, the dimensional accuracy in the support bar direction does not deteriorate.
【００１５】望ましくは、この貫通孔は輪郭が波型また
はジグザグ形状をなすように構成したり、貫通孔の断面
に段差を設けることにより、さらに表面積を大きくする
ことができ、樹脂との密着性を良好にすることが可能と
なる。Desirably, the surface area of the through-hole can be further increased by forming the through-hole so that its contour is wavy or zigzag, or by providing a step in the cross-section of the through-hole. Can be improved.
【００１６】[0016]
【実施例】以下、本発明の実施例について、図面を参照
しつつ詳細に説明する。Embodiments of the present invention will now be described in detail with reference to the drawings.
【００１７】このリ―ドフレ―ムは、図１(a) に１ユニ
ットを示す平面図、図１(b) に要部拡大図を示すよう
に、ダイパッドの半導体チップ非搭載面側すなわち裏面
側のサポートバーの延長線上を除く領域にディンプル加
工を行い多数の凹部ｈを設けたことを特徴とするもので
ある。他の部分については、図３に示した従来のリード
フレームと同様に形成されている。As shown in FIG. 1 (a), which is a plan view showing one unit, and in FIG. 1 (b), which is an enlarged view of an essential part, this lead frame has a semiconductor chip non-mounting surface side of the die pad, that is, a back surface side. Is characterized in that a large number of concave portions h are formed by performing dimple processing in a region other than the extension line of the support bar. Other parts are formed similarly to the conventional lead frame shown in FIG.
【００１８】すなわち、半導体チップを搭載するダイパ
ッド１１と、ダイパッドを取り囲むように配設せしめら
れた複数のインナ―リ―ド１２とインナ―リ―ド１２を
一体的に連結するタイバ―１３と、各インナ―リ―ドに
連結せしめられタイバ―の外側に伸長するアウタ―リ―
ド１４と、タイバ―１３を両サイドから支持するサイド
バ―１５，１６と、ダイパッド１１を支持するサポ―ト
バ―１７とから構成されている。That is, a die pad 11 on which a semiconductor chip is mounted, a plurality of inner leads 12 arranged so as to surround the die pad, and a tie bar 13 for integrally connecting the inner leads 12 together, An outer reel connected to each inner lead and extending outside the tie bar.
It is composed of a board 14, side bars 15 and 16 for supporting the tie bar 13 from both sides, and a support bar 17 for supporting the die pad 11.
【００１９】次に、このリ−ドフレ−ムの製造方法につ
いて説明する。Next, a method of manufacturing this lead frame will be described.
【００２０】まず、通常の方法で、帯状材料を順送り金
型に設置し、リード間領域の打ち抜きを行い、インナ―
リ―ド１２およびアウターリード１４の側縁をパタ―ニ
ングする。First, a strip-shaped material is set in a progressive die by a usual method, a region between leads is punched, and an inner layer is formed.
The side edges of the lead 12 and the outer lead 14 are patterned.
【００２１】続いて、インナーリード先端に連結片を残
して、インナーリード先端とダイパッドの間のキャビテ
イ領域の打ち抜きを行う。Then, the cavity region between the tip of the inner lead and the die pad is punched out, leaving the connecting piece at the tip of the inner lead.
【００２２】そして、連結片を除去し、最後にディンプ
ル加工をおこない裏面側のサポートバーの延長線上を除
く領域に多数の凹部ｈを形成する。Then, the connecting piece is removed, and finally dimple processing is performed to form a large number of recesses h in the region except the extension line of the support bar on the back surface side.
【００２３】このようにしてステンピング加工が完了す
ると順送り金型から取り出し、さらに必要に応じてメッ
キ工程等を経て図１に示したようなリ−ドフレ−ムが形
成される。When the stamping process is completed in this manner, the lead frame as shown in FIG. 1 is formed by taking it out from the progressive die and further performing a plating process and the like if necessary.
【００２４】このようにして形成されたリ―ドフレ―ム
は、図５に示した従来の半導体装置と同様にリ―ドフレ
―ム１のダイパッド１１上に、半導体チップ２を搭載
し、この半導体チップのボンディングパッドとリ―ドフ
レ―ムのインナ―リ―ド１２とを金線あるいはアルミ線
のボンディングワイヤ３によって結線し、更にこれらを
樹脂４で封止した後、タイバ―やサイドバ―を切断し、
アウタ―リ―ドを所望の形状に折り曲げて完成せしめら
れるが、ディンプル加工による凹部を有していながらサ
ポートバーの位置ずれがなく寸法精度を高く維持してい
るため、樹脂封止に際して、密着性が良好で、信頼性の
高いものとなる。The lead frame thus formed has the semiconductor chip 2 mounted on the die pad 11 of the lead frame 1 as in the conventional semiconductor device shown in FIG. The bonding pad of the chip and the inner lead 12 of the lead frame are connected by the bonding wire 3 of the gold wire or the aluminum wire, which is further sealed with the resin 4, and then the tie bar and the side bar are cut. Then
It can be completed by bending the outer lead into the desired shape.However, since the support bar does not shift and the dimensional accuracy is kept high even though it has a dimple-processed recess, it is possible to achieve a close contact during resin sealing. Is good and highly reliable.
【００２５】なお、実施例では、順送り金型を用いて、
プレスを行ったが、１つの金型で一度に全体の形状を形
成するようにしてもよい。In the embodiment, a progressive die is used,
Although the pressing is performed, the entire shape may be formed at once with one mold.
【００２６】また、ディンプル加工による凹部はチップ
非搭載面側のみならずチップ搭載面側に形成しても良い
ことはいうまでもない。Needless to say, the concave portion formed by the dimple processing may be formed not only on the chip non-mounting surface side but also on the chip mounting surface side.
【００２７】さらにまた、成型順序についても、実施例
に限定されることなく、適宜変更可能である。Furthermore, the molding order is not limited to the embodiment, and can be changed appropriately.
【００２８】次に本発明の第２の実施例として、ダイパ
ッドのサポートバーの延長線上に貫通孔１０を形成した
ものについて説明する。Next, a second embodiment of the present invention will be described in which the through hole 10 is formed on the extension line of the support bar of the die pad.
【００２９】この例では図２(a) および図２(b) に示す
ように、ダイパッドのサポートバーの延長線上に貫通孔
１０を形成するとともに、チップ搭載面の裏面全体にデ
ィンプル加工による凹部ｈを多数配設したことを特徴と
するものである。In this example, as shown in FIGS. 2 (a) and 2 (b), a through hole 10 is formed on the extension line of the support bar of the die pad, and a recess h is formed on the entire back surface of the chip mounting surface by dimple processing. It is characterized in that a large number of are arranged.
【００３０】他の部分については図１に示した実施例１
のリードフレームとまったく同様に形成する。The other parts are the same as those of the first embodiment shown in FIG.
The lead frame is formed in exactly the same way.
【００３１】製造に際し、ディンプル加工による凹部ｈ
の形成に先立ち、貫通孔１０を形成する他は実施例１と
同様である。At the time of manufacture, the concave portion h formed by dimple processing
This is the same as the first embodiment except that the through hole 10 is formed prior to the formation of.
【００３２】このようにダイパッドのサポートバーの延
長線上に貫通孔１０を形成していることににより、チッ
プ搭載面の裏面全体にディンプル加工をおこなっても、
サポートバー方向の伸びはダイパッド内で吸収され、残
留歪もなく、位置ずれを生じたりすることもない。By forming the through hole 10 on the extension line of the support bar of the die pad as described above, even if the entire back surface of the chip mounting surface is dimple-processed,
The extension in the support bar direction is absorbed in the die pad, there is no residual strain, and there is no displacement.
【００３３】このリードフレームによれば実施例１のリ
ードフレームと同様、ディンプル加工による凹部を有し
ていながらサポートバーの位置ずれがなく寸法精度を高
く維持しているため、樹脂封止に際し、密着性が良好
で、信頼性の高いものとなる。なおこの貫通孔の形状お
よび個数については実施例に限定されることなく必要に
応じて適宜変更可能である。According to this lead frame, similarly to the lead frame of the first embodiment, since the support bar has no recessed portion due to the dimple processing and the dimensional accuracy is kept high, the resin frame is closely adhered during resin sealing. It has good performance and high reliability. The shape and number of the through holes are not limited to those in the embodiment, and can be changed as needed.
【００３４】また、この例においても凹部はチップ搭載
面側にも形成しても良いことはいうまでもない。Also in this example, it goes without saying that the recess may also be formed on the chip mounting surface side.
【００３５】本発明の他の実施例として、図３(a) 乃至
(c) に示すように、４方向からサポートバーが形成され
ているものにも適用可能である。As another embodiment of the present invention, FIG.
As shown in (c), it is also applicable to the case where the support bar is formed from four directions.
【００３６】[0036]
【発明の効果】以上説明してきたように、本発明の第１
によれば、リードフレームのダイパッドのサポートバー
延長線上を除いてディンプル加工をおこなうようにして
いるため、サポートバー方向の伸びによる位置ずれもな
く、樹脂との密着性が良好で信頼性の高い半導体装置を
得ることができる。As described above, the first aspect of the present invention
According to the method, since the dimple processing is performed except on the extension line of the support bar of the die pad of the lead frame, there is no misalignment due to the extension in the support bar direction, and a highly reliable semiconductor with good adhesion to resin The device can be obtained.
【００３７】また、本発明の第２によれば、リードフレ
ームのダイパッドのサポートバー延長線上に貫通孔を形
成し、ディンプル加工をおこなうようにしているため、
サポートバー方向の伸びによる位置ずれもなく、樹脂と
の密着性が良好で信頼性の高い半導体装置を得ることが
できる。According to the second aspect of the present invention, since the through hole is formed on the extension line of the support bar of the die pad of the lead frame and the dimple processing is performed,
It is possible to obtain a highly reliable semiconductor device having good adhesiveness with a resin without causing positional displacement due to extension in the support bar direction.
【図面の簡単な説明】[Brief description of drawings]
【図１】本発明の第１の実施例のリードフレームを示す
図FIG. 1 is a diagram showing a lead frame according to a first embodiment of the present invention.
【図２】本発明の第２の実施例のリードフレームを示す
図FIG. 2 is a diagram showing a lead frame according to a second embodiment of the present invention.
【図３】本発明の他の実施例のリードフレームを示す図FIG. 3 is a diagram showing a lead frame according to another embodiment of the present invention.
【図４】従来例のリードフレームを示す図FIG. 4 is a diagram showing a conventional lead frame.
【図５】従来例のリードフレームを用いた半導体装置を
示す図FIG. 5 is a diagram showing a semiconductor device using a conventional lead frame.
１ リードフレーム ２ 半導体チップ ３ ワイヤ ４ 封止材料、 ｈ 凹部 １０ 貫通孔 １１ ダイパッド １２ インナーリード １３ タイバー １４ アウターリード １５ サイドバー １６ サイドバー １７ サポートバー 1 Lead Frame 2 Semiconductor Chip 3 Wire 4 Encapsulating Material, h Recess 10 Through Hole 11 Die Pad 12 Inner Lead 13 Tie Bar 14 Outer Lead 15 Side Bar 16 Side Bar 17 Support Bar
Claims (2)
ルにそれぞれサポートバーを介して取り付けられ、半導
体チップを搭載するダイパッドと、前記ダイパッドを取
り囲むように形成された複数のリ−ドとを具備したリー
ドフレームにおいて、 前記ダイパッドが、前記サポートバーの延長線上を除く
領域に複数の凹部を具備したことを特徴とするリードフ
レーム。1. A semiconductor device comprising: two side rails; a die pad mounted on each of the side rails via a support bar to mount a semiconductor chip; and a plurality of leads formed so as to surround the die pad. In the lead frame described above, the die pad is provided with a plurality of recesses in a region other than an extension line of the support bar.
ルにそれぞれサポートバーを介して取り付けられ、半導
体チップを搭載するダイパッドと、前記ダイパッドを取
り囲むように形成された複数のリ−ドとを具備したリー
ドフレームにおいて、 前記ダイパッドが、複数の凹部を具備すると共に、前記
サポートバーの延長線上の少なくとも一部に貫通孔を有
することを特徴とするリードフレーム。2. A pair of side rails, a die pad mounted on each of the side rails via a support bar for mounting a semiconductor chip, and a plurality of leads formed so as to surround the die pad. In the lead frame described above, the die pad has a plurality of recesses and has a through hole at least at a part of an extension line of the support bar.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4033637A JP3018211B2 (en) | 1992-02-20 | 1992-02-20 | Lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4033637A JP3018211B2 (en) | 1992-02-20 | 1992-02-20 | Lead frame |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05235248A true JPH05235248A (en) | 1993-09-10 |
| JP3018211B2 JP3018211B2 (en) | 2000-03-13 |
Family
ID=12391971
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4033637A Expired - Fee Related JP3018211B2 (en) | 1992-02-20 | 1992-02-20 | Lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3018211B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7964942B2 (en) | 2003-05-28 | 2011-06-21 | Yamaha Corporation | Lead frame having a die stage smaller than a semiconductor device and a semiconductor device using the same |
-
1992
- 1992-02-20 JP JP4033637A patent/JP3018211B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7964942B2 (en) | 2003-05-28 | 2011-06-21 | Yamaha Corporation | Lead frame having a die stage smaller than a semiconductor device and a semiconductor device using the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3018211B2 (en) | 2000-03-13 |
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