JPH05234944A - Wafer temperature control method and equipment - Google Patents

Wafer temperature control method and equipment

Info

Publication number
JPH05234944A
JPH05234944A JP4031794A JP3179492A JPH05234944A JP H05234944 A JPH05234944 A JP H05234944A JP 4031794 A JP4031794 A JP 4031794A JP 3179492 A JP3179492 A JP 3179492A JP H05234944 A JPH05234944 A JP H05234944A
Authority
JP
Japan
Prior art keywords
wafer
temperature
electrostatic attraction
control method
temperature control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4031794A
Other languages
Japanese (ja)
Inventor
Yoichi Ito
陽一 伊藤
Yutaka Kakehi
豊 掛樋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4031794A priority Critical patent/JPH05234944A/en
Publication of JPH05234944A publication Critical patent/JPH05234944A/en
Pending legal-status Critical Current

Links

Landscapes

  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To uniform the temperature distribution of a wafer which is etched by using plasma. CONSTITUTION:Ring type trenches 18, 19 and radial trenches 20 connecting the trenches 18, 19 are formed on the surface of an electrostatic attraction electrode 2 for retaining a wafer to be etched by using plasma. A ring type part 22 where a trench is not formed is arranged between an He gas introducing hole 21 at the center of the electrostatic attraction electrode 2 and the ring type trench 18. Thereby the pressure of the He gas on the rear of the wafer can be made high at the central part as compared with the outer periphery of the wafer, so that ununiformity of temperature distribution caused by the gap between the wafer and a pushing-up mechanism and the temperature difference between the electrostatic attraction electrode 2 and the push-up mechanism is corrected, and the temperature distribution of the wafer during etching can be made uniform.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、マイクロ波プラズマエ
ッチング装置等のウエハ温度制御方法及び装置に係り、
半導体素子基板(ウエハ)等の試料の処理の均一化を図
るのに好適なウエハ温度制御方法及び装置に関するもの
である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wafer temperature control method and apparatus such as a microwave plasma etching apparatus,
The present invention relates to a wafer temperature control method and apparatus suitable for uniforming processing of a sample such as a semiconductor element substrate (wafer).

【0002】[0002]

【従来の技術】従来のウエハ温度制御技術は、例えば特
開昭62−120931号公報に記載のように、真空中
でウエハを電極上に載置し、ウエハと電極間に冷却ガス
を流しウエハの温度を制御するようになっている。ま
た、ウエハの搬送用の押し上げ機構には冷却手段を設け
ていなかった。
2. Description of the Related Art A conventional wafer temperature control technique is disclosed in, for example, Japanese Patent Application Laid-Open No. 62-120931, in which a wafer is placed on an electrode in a vacuum and a cooling gas is passed between the wafer and the electrode. It is designed to control the temperature of. Further, the push-up mechanism for transferring the wafer is not provided with the cooling means.

【0003】[0003]

【発明が解決しようとする課題】上記従来技術では、電
極中央の押し上げ機構が挿入される部分ではギャップが
広く、しかも、処理中に電極との間に温度差を生じるた
めにウエハ中央の温度が高くなり、処理の均一化が不十
分であるという課題があった。
In the above prior art, the gap in the center of the electrode into which the pushing-up mechanism is inserted is wide, and a temperature difference occurs between the electrode and the electrode during processing. There is a problem that the cost becomes high and the uniformity of the treatment is insufficient.

【0004】本発明の目的は、ウエハを処理する温度を
より均一にするウエハ温度制御方法及び装置を提供する
ことにある。
An object of the present invention is to provide a wafer temperature control method and apparatus for making a wafer processing temperature more uniform.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するため
に、電極表面に複数のリング状の溝とこの溝を互いに連
結する放射状の溝を設け、さらに、一番内側のリング状
の溝と電極中央の冷却ガス導入孔の間に溝の形成されて
いない部分を設けたものである。
To achieve the above object, a plurality of ring-shaped grooves and radial grooves connecting the grooves to each other are provided on the surface of the electrode, and further, the innermost ring-shaped groove is formed. A portion in which no groove is formed is provided between the cooling gas introduction holes at the center of the electrode.

【0006】[0006]

【作用】ウエハ中央から外周に向かって、熱通過率に関
係するウエハ裏面の冷却ガスの圧力に分布を与えること
が可能となるので、ギャップおよび温度の違いによって
生じるウエハ内の温度分布の不均一を補正することがで
きる。
Since the pressure of the cooling gas on the back surface of the wafer, which is related to the heat transfer rate, can be distributed from the center of the wafer to the outer circumference, the temperature distribution in the wafer becomes uneven due to the difference in the gap and the temperature. Can be corrected.

【0007】[0007]

【実施例】以下、本発明の一実施例を適用したいわゆる
有磁場マイクロ波エッチング装置の構成を図1から図4
により説明する。図1は装置の全体構成、図2,図3は
静電吸着電極の形状、図4はウエハ裏面のHeガスの圧
力分布を示したものである。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of a so-called magnetic field microwave etching apparatus to which an embodiment of the present invention is applied will be described below with reference to FIGS.
Will be explained. 1 shows the overall structure of the apparatus, FIGS. 2 and 3 show the shape of the electrostatic adsorption electrode, and FIG. 4 shows the pressure distribution of He gas on the back surface of the wafer.

【0008】エッチング処理されるウエハ1は、搬送装
置(図示省略)によりエッチング処理室の静電吸着電極
2上に載置される。その後、ウエハ1のエッチング処理
は放電管3内に導入したプロセスガス4をマイクロ波5
とソレノイド6の相互作用によりプラズマ7化し、さら
に、静電吸着電極2を固定している下部電極8に高周波
電源9により高周波を印加してウエハ1に入射するイオ
ンのエネルギーを制御しながら行う。
The wafer 1 to be etched is placed on the electrostatic attraction electrode 2 in the etching chamber by a transfer device (not shown). After that, in the etching process of the wafer 1, the process gas 4 introduced into the discharge tube 3 is introduced into the microwave 5
Plasma 7 is formed by the interaction of the solenoid 6 and the solenoid 6, and a high frequency power is applied to the lower electrode 8 fixing the electrostatic attraction electrode 2 by a high frequency power source 9 to control the energy of the ions incident on the wafer 1.

【0009】一方、エッチングされるウエハ1の冷却
は、スイッチ10をオンして静電吸着電極2表面に設け
た絶縁膜11に直流電源12により直流電圧を印加した
後、前記した方法によりプラズマ7を発生させてウエハ
1をプラズマ7を介して接地することにより、絶縁膜1
1とウエハ1の間に生ずる静電吸着力によりウエハ1を
支持した状態でマスフローコントロラー13を開いてH
eガス14をウエハ1裏面に導入することにより行われ
る。また、下部電極8はサーキュレーター15により冷
媒16を循環させることにより温度調節されている。
On the other hand, the wafer 1 to be etched is cooled by applying a DC voltage from the DC power supply 12 to the insulating film 11 provided on the surface of the electrostatic attraction electrode 2 by turning on the switch 10 and then plasma 7 by the method described above. Is generated and the wafer 1 is grounded via the plasma 7,
1 and the wafer 1 is supported by the electrostatic attraction force generated between the wafer 1 and the wafer 1, and the mass flow controller 13 is opened to move the H
This is performed by introducing the e-gas 14 into the back surface of the wafer 1. The temperature of the lower electrode 8 is adjusted by circulating the coolant 16 by the circulator 15.

【0010】そして、エッチング処理が終了したウエハ
1は、スイッチ10をオフして押し上げ機構17を上昇
することにより静電吸着電極2から取り外され、搬送装
置(図示省略)により他の処理室等に搬送される。
After the etching process is completed, the wafer 1 is removed from the electrostatic attraction electrode 2 by turning off the switch 10 and raising the push-up mechanism 17, and then transferred to another processing chamber or the like by a transfer device (not shown). Be transported.

【0011】図2,図3により本発明に使用する静電吸
着電極2の形状について説明する。静電吸着電極2表面
には、処理中のウエハ1の温度分布の均一化を図るため
に2本のリング状の溝18,19と、この溝18,19
を結ぶ放射状の溝20が設けてあり、Heガス14の導
入孔21とリング状の溝18の間には溝の形成されてな
い円環状部22がある。また、表面にはウエハ1を静電
吸着するためにアルミナ等の絶縁膜11がコーテイング
されている。
The shape of the electrostatic attraction electrode 2 used in the present invention will be described with reference to FIGS. On the surface of the electrostatic attraction electrode 2, two ring-shaped grooves 18 and 19 are provided in order to make the temperature distribution of the wafer 1 being processed uniform, and these grooves 18 and 19 are provided.
A radial groove 20 connecting the two is provided, and an annular portion 22 in which no groove is formed is provided between the introduction hole 21 of the He gas 14 and the ring-shaped groove 18. An insulating film 11 made of alumina or the like is coated on the surface to electrostatically attract the wafer 1.

【0012】次に、本発明により処理中のウエハ1の温
度分布の均一化の効果について説明する。図4は、ウエ
ハ1と静電吸着電極2の間の熱通過率に関係するウエハ
1裏面におけるHeガス14の径方向の圧力分布を示し
たものであり、ウエハ1裏面に導入されたHeガス14
はウエハ1中心から外周に向かって流れる。まず、He
ガス14の導入孔21からリング状の溝18の間では、
溝が形成されていないためにコンダクタンスが非常に小
さくHeガス14の流量に応じた圧力損失を生じ、裏面
圧力はウエハ1中心に比べて急激に低くなる。そして、
リング状の溝18から19までは、放射状の溝20で連
結されているためにコンダクタンスが非常に大きくなっ
ており、この間の裏面圧力はほぼ一定値になる。そし
て、リング状の溝19から外ではエッチング処理室と同
じ圧力まで低下する。
Next, the effect of making the temperature distribution of the wafer 1 being processed uniform according to the present invention will be described. FIG. 4 shows a radial pressure distribution of the He gas 14 on the back surface of the wafer 1 related to the heat transfer rate between the wafer 1 and the electrostatic attraction electrode 2. He gas introduced to the back surface of the wafer 1 is shown in FIG. 14
Flows from the center of the wafer 1 toward the outer periphery. First, He
Between the introduction hole 21 of the gas 14 and the ring-shaped groove 18,
Since the groove is not formed, the conductance is very small and a pressure loss according to the flow rate of the He gas 14 is generated, and the back surface pressure is drastically lower than that in the center of the wafer 1. And
Since the ring-shaped grooves 18 to 19 are connected by the radial grooves 20, the conductance is extremely large, and the back surface pressure during this time is substantially constant. Then, outside the ring-shaped groove 19, the pressure is reduced to the same pressure as in the etching processing chamber.

【0013】以上より、分子流条件(Heガス14の平
均自由行程に比べてウエハ1と静電吸着電極2のすきま
およびウエハ1と押し上げ機構17のすきまが非常に小
さい)が成立する領域ではウエハ1裏面の圧力と熱通過
率はほぼ比例関係にあり、ウエハ1中心部の熱通過率を
静電吸着電極2に吸着されている部分より大きくでき、
押し上げ機構17とウエハ1のギャップおよび押し上げ
機構17と静電吸着電極2の温度差によりウエハ1に生
じる温度分布の不均一を補正することができる。
From the above, in the region where the molecular flow condition is satisfied (the clearance between the wafer 1 and the electrostatic adsorption electrode 2 and the clearance between the wafer 1 and the pushing-up mechanism 17 are very small compared to the mean free path of the He gas 14), the wafer is 1 The pressure on the back surface and the heat transfer rate are almost proportional to each other, and the heat transfer rate at the central part of the wafer 1 can be made larger than that at the part attracted to the electrostatic adsorption electrode 2.
It is possible to correct the non-uniformity of the temperature distribution generated on the wafer 1 due to the gap between the push-up mechanism 17 and the wafer 1 and the temperature difference between the push-up mechanism 17 and the electrostatic attraction electrode 2.

【0014】上記実施例では、ウエハ1の支持を静電吸
着力により行ったが、本発明は重力を利用して支持する
装置の場合にも同様に適用できる。
Although the wafer 1 is supported by the electrostatic attraction force in the above embodiment, the present invention can be similarly applied to the case of supporting the apparatus by utilizing gravity.

【0015】[0015]

【発明の効果】本発明によれば、エッチングされるウエ
ハの温度分布の均一化を図ることができる。
According to the present invention, the temperature distribution of the wafer to be etched can be made uniform.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明を適用するエッチング装置の全体構成を
示す正面図である。
FIG. 1 is a front view showing the overall configuration of an etching apparatus to which the present invention is applied.

【図2】本発明に使用する静電吸着電極の平面図であ
る。
FIG. 2 is a plan view of an electrostatic attraction electrode used in the present invention.

【図3】図2の側面図である。FIG. 3 is a side view of FIG.

【図4】本発明によるウエハ裏面の圧力分布を示す図で
ある。
FIG. 4 is a diagram showing a pressure distribution on the back surface of a wafer according to the present invention.

【符号の説明】[Explanation of symbols]

1…ウエハ、2…静電吸着電極、18,19…リング状
の溝、20…放射状の溝、22…円環状部。
1 ... Wafer, 2 ... Electrostatic adsorption electrode, 18, 19 ... Ring-shaped groove, 20 ... Radial groove, 22 ... Annular part.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】ウエハを載置し、そのウエハとの間に冷却
ガスを供給して処理中のウエハの温度を制御するウエハ
温度制御方法において、前記冷却ガスの圧力にウエハ裏
面内で分布を与え、ギャップの違いによる熱抵抗の違い
を補正するようにしたことを特徴とするウエハ温度制御
方法。
1. A wafer temperature control method in which a wafer is placed and a cooling gas is supplied between the wafer and the wafer to control the temperature of the wafer being processed. A wafer temperature control method, characterized in that a difference in thermal resistance due to a difference in gap is corrected.
【請求項2】ウエハを載置し、そのウエハとの間に冷却
ガスを供給して処理中のウエハの温度を制御するウエハ
温度制御方法において、前記冷却ガスの圧力にウエハ裏
面内で分布を与え、温度の違いによる熱抵抗の違いを補
正するようにしたことを特徴とするウエハ温度制御方
法。
2. A wafer temperature control method in which a wafer is placed and a cooling gas is supplied between the wafer and the wafer to control the temperature of the wafer being processed. A wafer temperature control method, characterized in that a difference in thermal resistance due to a difference in temperature is corrected.
【請求項3】ウエハを載置し、そのウエハとの間に冷却
ガスを供給してウエハの温度を制御するウエハ温度制御
装置において、前記冷却ガスの圧力にウエハ裏面内で分
布を与えるために、静電吸着電極にコンダクタンスの異
なるガス流動溝を設けたことを特徴とするウエハ温度制
御装置。
3. A wafer temperature controller for mounting a wafer and supplying a cooling gas between the wafer and the wafer to control the temperature of the wafer, in order to give a distribution of the pressure of the cooling gas on the back surface of the wafer. A wafer temperature control device characterized in that gas flow grooves having different conductances are provided in the electrostatic attraction electrode.
JP4031794A 1992-02-19 1992-02-19 Wafer temperature control method and equipment Pending JPH05234944A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4031794A JPH05234944A (en) 1992-02-19 1992-02-19 Wafer temperature control method and equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4031794A JPH05234944A (en) 1992-02-19 1992-02-19 Wafer temperature control method and equipment

Publications (1)

Publication Number Publication Date
JPH05234944A true JPH05234944A (en) 1993-09-10

Family

ID=12340979

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4031794A Pending JPH05234944A (en) 1992-02-19 1992-02-19 Wafer temperature control method and equipment

Country Status (1)

Country Link
JP (1) JPH05234944A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07169825A (en) * 1993-12-15 1995-07-04 Nec Corp Electrostatic attracting apparatus
KR100362995B1 (en) * 1993-09-16 2002-11-29 가부시끼가이샤 히다치 세이사꾸쇼 Substrate holding system and substrate holding method
US6524428B2 (en) 1993-09-16 2003-02-25 Hitachi, Ltd. Method of holding substrate and substrate holding system
JP2006253703A (en) * 2006-04-07 2006-09-21 Toto Ltd Electrostatic chuck and insulating substrate electrostatic attraction treatment method
JP2011155170A (en) * 2010-01-28 2011-08-11 Panasonic Corp Plasma processing apparatus
JP2012129547A (en) * 2012-02-25 2012-07-05 Tokyo Electron Ltd Substrate mounting table, substrate processing apparatus, and temperature control method
CN103928372A (en) * 2014-04-22 2014-07-16 上海华力微电子有限公司 Corrosion-resistant wafer cleaning device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01251735A (en) * 1988-03-31 1989-10-06 Toshiba Corp Electrostatic chuck apparatus
JPH01298721A (en) * 1988-05-27 1989-12-01 Tokuda Seisakusho Ltd Vacuum processor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01251735A (en) * 1988-03-31 1989-10-06 Toshiba Corp Electrostatic chuck apparatus
JPH01298721A (en) * 1988-05-27 1989-12-01 Tokuda Seisakusho Ltd Vacuum processor

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6610170B2 (en) 1993-09-16 2003-08-26 Hitachi, Ltd. Method of holding substrate and substrate holding system
US6676805B2 (en) 1993-09-16 2004-01-13 Hitachi, Ltd. Method of holding substrate and substrate holding system
KR100362995B1 (en) * 1993-09-16 2002-11-29 가부시끼가이샤 히다치 세이사꾸쇼 Substrate holding system and substrate holding method
US6524428B2 (en) 1993-09-16 2003-02-25 Hitachi, Ltd. Method of holding substrate and substrate holding system
US6544379B2 (en) 1993-09-16 2003-04-08 Hitachi, Ltd. Method of holding substrate and substrate holding system
US6610171B2 (en) 1993-09-16 2003-08-26 Hitachi, Ltd. Method of holding substrate and substrate holding system
US6645871B2 (en) 1993-09-16 2003-11-11 Hitachi, Ltd. Method of holding substrate and substrate holding system
US6899789B2 (en) 1993-09-16 2005-05-31 Hitachi, Ltd. Method of holding substrate and substrate holding system
JPH07169825A (en) * 1993-12-15 1995-07-04 Nec Corp Electrostatic attracting apparatus
JP2626539B2 (en) * 1993-12-15 1997-07-02 日本電気株式会社 Electrostatic suction device
JP2006253703A (en) * 2006-04-07 2006-09-21 Toto Ltd Electrostatic chuck and insulating substrate electrostatic attraction treatment method
JP2011155170A (en) * 2010-01-28 2011-08-11 Panasonic Corp Plasma processing apparatus
JP2012129547A (en) * 2012-02-25 2012-07-05 Tokyo Electron Ltd Substrate mounting table, substrate processing apparatus, and temperature control method
CN103928372A (en) * 2014-04-22 2014-07-16 上海华力微电子有限公司 Corrosion-resistant wafer cleaning device

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