JPH05191976A - Switching power supply - Google Patents
Switching power supplyInfo
- Publication number
- JPH05191976A JPH05191976A JP501592A JP501592A JPH05191976A JP H05191976 A JPH05191976 A JP H05191976A JP 501592 A JP501592 A JP 501592A JP 501592 A JP501592 A JP 501592A JP H05191976 A JPH05191976 A JP H05191976A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- power supply
- side line
- rectifier circuit
- choke coil
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Control Of Electrical Variables (AREA)
- Dc-Dc Converters (AREA)
- Rectifiers (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明はインバ−タの入力側に力
率改善回路を設けたスイッチング電源装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching power supply device having a power factor correction circuit on the input side of an inverter.
【0002】[0002]
【従来の技術】従来、この種の電源装置は図6に示すよ
うに、商用電源1の両端には入力端子+V1,−V1を
介して電源2が接続されており、この電源2は、インダ
クタンス3,4及びコンデンサ5により構成されるノイ
ズフィルタ回路6によって前記商用電源2から入力端子
+V1,−V1を介して供給される交流電源電圧のノー
マルモードノイズを除去し、このノイズフィルタ回路6
の両端に接続されたダイオード7A,7B,7C,7D
をブリッジ接続してなる整流回路7により前記交流電源
電圧を整流して力率改善回路8に供給する。力率改善回
路8は整流回路7の電圧供給ラインに挿入接続されコア
9にコイル部9Aを巻回したチョークコイル10と、この
チョークコイル10に蓄えられるエネルギーを制御するM
OS型FETからなるスイッチング素子11と、一次側と
二次側とを絶縁するトランス12の一次巻線12Aとチョー
クコイル10との間に挿入接続されたダイオード13とから
構成され、前記スイッチング素子11によりスイッチング
された出力電圧を平滑コンデンサ14により平滑し、この
直流入力電圧Viを前記トランス12とMOS型FET15
とからなるインバータに印加することにより、トランス
12の二次巻線12Bに誘起された電圧を整流ダイオード1
6,17、インダクタンス18及び平滑コンデンサ19により
整流平滑して、出力端子+V2,−V2間に直流出力電
圧Voを供給するものである。そして、この直流出力電
圧Voは抵抗20と抵抗21で分圧された出力検出電圧とし
てパルス幅制御回路22に供給され、パルス幅制御回路22
はこの出力検出電圧のレベルに応じて、出力電圧Voが
一定になるように駆動信号をFET15に供給する。2. Description of the Related Art Conventionally, as shown in FIG. 6, in a power supply device of this type, a power supply 2 is connected to both ends of a commercial power supply 1 via input terminals + V1 and -V1, and the power supply 2 has an inductance. A noise filter circuit 6 formed of capacitors 3 and 4 and a capacitor 5 removes normal mode noise of the AC power supply voltage supplied from the commercial power supply 2 via the input terminals + V1 and -V1.
7A, 7B, 7C, 7D connected to both ends of
The AC power supply voltage is rectified by the rectifier circuit 7 formed by connecting the bridges to the power factor correction circuit 8. The power factor correction circuit 8 is connected to the voltage supply line of the rectifier circuit 7 and is connected to a choke coil 10 in which a coil portion 9A is wound around a core 9 and an energy M that controls the energy stored in the choke coil 10.
The switching element 11 comprises an OS-type FET, a diode 13 inserted and connected between the choke coil 10 and a primary winding 12A of a transformer 12 for insulating the primary side and the secondary side from each other. The output voltage switched by the smoothing capacitor 14 is smoothed, and the DC input voltage Vi is transferred to the transformer 12 and the MOS type FET 15.
By applying to the inverter consisting of
Rectifier diode 1 for the voltage induced in 12 secondary windings 12B
The DC output voltage Vo is supplied between the output terminals + V2 and -V2 after being rectified and smoothed by 6, 17, the inductance 18 and the smoothing capacitor 19. Then, the DC output voltage Vo is supplied to the pulse width control circuit 22 as an output detection voltage divided by the resistors 20 and 21, and the pulse width control circuit 22.
Supplies a drive signal to the FET 15 so that the output voltage Vo becomes constant according to the level of the output detection voltage.
【0003】前記直流入力電圧Viは抵抗23,24により
分圧され、この分圧された入力検出電圧に基づいてパル
ス幅制御回路25によりスイッチング素子11の導通パルス
幅を制御する。すなわち、スイッチング素子11がオンの
ときには整流回路7からの直流電流によってチョークコ
イル10にエネルギーが蓄えられ、一方、スイッチング素
子11がオフのときには、チョークコイル10に蓄えられた
エネルギーを整流回路7から供給される電圧に重畳させ
て力率改善回路8より出力する。そして、パルス幅制御
回路25は直流入力電圧Viの変化を抵抗23,24を介して
検知し、交流電源からの電圧波形と電流波形とを近ずけ
て入力力率を改善するようにスイッチング素子11を介し
てチョークコイル10に蓄えられるエネルギーを制御する
ものである。The DC input voltage Vi is divided by the resistors 23 and 24, and the pulse width control circuit 25 controls the conduction pulse width of the switching element 11 based on the divided input detection voltage. That is, when the switching element 11 is on, the DC current from the rectifier circuit 7 stores energy in the choke coil 10, while when the switching element 11 is off, the energy stored in the choke coil 10 is supplied from the rectifier circuit 7. The voltage is superimposed on the generated voltage and output from the power factor correction circuit 8. Then, the pulse width control circuit 25 detects a change in the DC input voltage Vi via the resistors 23 and 24, and brings the voltage waveform and the current waveform from the AC power source close to each other to improve the input power factor. It controls the energy stored in the choke coil 10 via 11.
【0004】[0004]
【発明が解決しようとする課題】前記従来例において
は、整流回路7からの電圧供給側ラインにはチョークコ
イル10が接続されているのに対し、整流回路7からのマ
イナス側ラインには何も接続されおらず、スイッチング
素子11のオン、オフ動作により力率改善回路8の入力側
から発生するリップル電流などの高周波領域におけるノ
イズによって、整流回路7の電圧供給側ラインと接地端
子FGとの間に生じるコモンモードノイズレベルと、整
流回路7のマイナス側ラインと接地端子FGとの間に生
じるコモンモードノイズレベルとの間に差異が生じる。
このため、力率改善回路8に設けられたチョークコイル
10によって、整流回路7の電圧供給側ラインとマイナス
側ラインとの間にノーマルモードノイズが発生し、この
ノイズが電源2の入力端子+V1,−V1より雑音端子
電圧として交流電源1に重畳されるため、他の電子機器
に対して誤動作を誘発するといった問題を有していた。In the above-mentioned conventional example, the choke coil 10 is connected to the voltage supply side line from the rectifier circuit 7, while nothing is connected to the negative side line from the rectifier circuit 7. Between the voltage supply side line of the rectifier circuit 7 and the ground terminal FG due to noise in a high frequency region such as a ripple current generated from the input side of the power factor correction circuit 8 due to the on / off operation of the switching element 11 which is not connected. There is a difference between the common-mode noise level generated at 1) and the common-mode noise level generated between the minus side line of the rectifier circuit 7 and the ground terminal FG.
Therefore, the choke coil provided in the power factor correction circuit 8
Due to 10, normal mode noise is generated between the voltage supply side line and the minus side line of the rectifier circuit 7, and this noise is superimposed on the AC power supply 1 as noise terminal voltage from the input terminals + V1 and -V1 of the power supply 2. Therefore, there is a problem that it causes a malfunction in other electronic devices.
【0005】そこで本発明は、力率改善回路より発生す
るノーマルモードノイズを低減することの可能なスイッ
チング電源装置を提供することを目的とする。Therefore, an object of the present invention is to provide a switching power supply device capable of reducing the normal mode noise generated by the power factor correction circuit.
【0006】[0006]
【課題を解決するための手段】本発明は交流電源電圧を
整流回路により整流するとともに、チョークコイルとこ
のチョークコイルに蓄えられるエネルギーを制御するス
イッチング素子とを有し、前記スイッチング素子をスイ
ッチングして前記交流電源電圧の電圧波形と電流波形と
を近ずける力率改善回路を具備するスイッチング電源装
置において、前記チョークコイルを半数ずつの巻数に分
割するとともに、この分割した各コイル部が逆極性とな
るように同一のコアに巻回して前記整流回路の出力ライ
ン両端にそれぞれ挿入接続したものである。According to the present invention, an AC power supply voltage is rectified by a rectifier circuit, and a choke coil and a switching element for controlling energy stored in the choke coil are provided. In a switching power supply device including a power factor correction circuit that brings a voltage waveform and a current waveform of the AC power supply voltage close to each other, the choke coil is divided into half turns, and each of the divided coil parts has a reverse polarity. It is wound around the same core so as to be inserted and connected to both ends of the output line of the rectifier circuit.
【0007】[0007]
【作用】上記構成により、スイッチング素子のオン、オ
フ動作により力率改善回路から整流回路の電圧供給側ラ
イン及びマイナス側ラインにそれぞれ発生するリップル
電流などの高周波領域におけるノイズは互いに逆位相と
なって現われ、前記整流回路の電圧供給側ラインとマイ
ナス側ラインとの間に生じるノーマルモードノイズが打
ち消されて、そのノイズレベルは小さくなる。With the above structure, noises in a high frequency region such as ripple currents generated on the voltage supply side line and the minus side line of the rectifier circuit from the power factor correction circuit due to the ON / OFF operation of the switching element have phases opposite to each other. The normal mode noise that appears and is generated between the voltage supply side line and the minus side line of the rectifier circuit is canceled, and the noise level is reduced.
【0008】[0008]
【実施例】以下、本発明の実施例を添付図面を参照して
説明する。なお、図6と同一部分には同一符号を付し、
同一箇所の詳細な説明は省略する。Embodiments of the present invention will be described below with reference to the accompanying drawings. The same parts as in FIG.
Detailed description of the same part is omitted.
【0009】図1は本発明の一実施例を示し、同図にお
いてチョークコイル31は各コイル部32A,32Bを半数ず
つの巻数に2分割し、かつ互いのコイル部32A,32Bは
逆極性となるように同一のコア32に対して巻回されてお
り、このチョークコイル31のコイル部32A,32Bを整流
回路7の出力ライン両端に挿入接続して力率改善回路8
Aを構成する点以外は図6と同一である。FIG. 1 shows an embodiment of the present invention. In the same drawing, a choke coil 31 divides each coil portion 32A, 32B into half turns, and the coil portions 32A, 32B have opposite polarities. The choke coil 31 is wound around the same core 32 so that the coil portions 32A and 32B of the choke coil 31 are inserted and connected to both ends of the output line of the rectifier circuit 7 to improve the power factor correction circuit 8.
6 is the same as FIG. 6 except that it constitutes A.
【0010】次に上記構成につきその作用を説明する。Next, the operation of the above configuration will be described.
【0011】電源を投入すると商用電源1からの交流電
源電圧はノイズフィルタ回路6を介して整流回路に供給
され、この整流された電圧が力率改善回路8Aに印加さ
れる。力率改善回路8Aは、スイッチング素子11がオン
のときには、整流回路7からの直流電流をチョークコイ
ル31の電磁エネルギーとして蓄え、一方、スイッチング
素子11がオフのときには、チョークコイル31に蓄えられ
たエネルギーを整流回路7からの出力電圧に重畳させて
トランス12の一次巻線12A及び平滑コンデンサ14に供給
し、トランス12の二次巻線12Bより整流ダイオード16,
17、インダクタンス18及び平滑コンデンサ19を介して直
流出力電圧Viを出力する。そして、このスイッチング
素子11のオン、オフ動作を繰返すことによって生じる力
率改善回路8Aの入力側からのリップル電流などの高周
波領域におけるノイズは、整流回路7の電圧供給側ライ
ン上とマイナス側ライン上とにそれぞれ重畳される。こ
のとき、チョークコイル31の各コイル部32A,32Bは互
いに逆極性となるようにコア33に巻回されているため、
整流回路7の電圧供給側ラインと接地端子FGとの間に
発生するコモンモードノイズと、整流回路7のマイナス
側ラインと接地端子FGとの間に発生するコモンモード
ノイズとは互いに逆位相となって現われ、これによっ
て、整流回路7の電圧供給側ラインとマイナス側ライン
との間に生じるノーマルモードノイズは互いの電圧レベ
ルが逆のため打消し合い、このノーマルモードノイズの
全体の電圧レベルは極めて小さくなる。When the power is turned on, the AC power supply voltage from the commercial power supply 1 is supplied to the rectifier circuit via the noise filter circuit 6, and this rectified voltage is applied to the power factor correction circuit 8A. The power factor correction circuit 8A stores the direct current from the rectifier circuit 7 as electromagnetic energy of the choke coil 31 when the switching element 11 is on, and the energy stored in the choke coil 31 when the switching element 11 is off. Is superimposed on the output voltage from the rectifier circuit 7 and supplied to the primary winding 12A and the smoothing capacitor 14 of the transformer 12, and the rectifying diode 16, from the secondary winding 12B of the transformer 12.
A DC output voltage Vi is output via 17, the inductance 18 and the smoothing capacitor 19. Then, noise in a high frequency region such as a ripple current from the input side of the power factor correction circuit 8A generated by repeating the on / off operation of the switching element 11 is on the voltage supply side line and the minus side line of the rectifier circuit 7. And are respectively superimposed. At this time, since the coil portions 32A and 32B of the choke coil 31 are wound around the core 33 so as to have polarities opposite to each other,
The common mode noise generated between the voltage supply side line of the rectifier circuit 7 and the ground terminal FG and the common mode noise generated between the minus side line of the rectifier circuit 7 and the ground terminal FG have mutually opposite phases. The normal mode noise generated between the voltage supply side line and the minus side line of the rectifier circuit 7 cancels each other because their voltage levels are opposite to each other, and the total voltage level of this normal mode noise is extremely high. Get smaller.
【0012】次に、前記従来例及び本実施例において、
商用電源供給側へ戻っていくノイズの大きさを表わす雑
音端子電圧と、整流回路7の出力ラインに対するコモン
モードノイズ及びノーマルモードノイズとの各波形の測
定結果を以下に示す。Next, in the conventional example and the present example,
The measurement results of the waveforms of the noise terminal voltage indicating the magnitude of the noise returning to the commercial power supply side and the common mode noise and the normal mode noise for the output line of the rectifier circuit 7 are shown below.
【0013】図2は図1における電源2A及び図6にお
ける電源2から発生する雑音端子電圧の測定方法を示し
ており、商用電源1と入力端子+V1,−V1との間
に、周波数分析を行うのに用いられるスペクトラムアナ
ライザーなどの妨害波測定器41と、電源2,2A側のイ
ンピーダンスZを規定の50Ωに保ち、この電源2,2
Aに対する外来ノイズの影響を排除して正確な測定を行
うための疑似電源回路網42とをそれぞれ接続する。ま
た、整流回路7の電圧供給側ライン及びマイナス側ライ
ンと接地端子FGとの間に生じるコモンモードノイズ
と、整流回路7の電圧供給側ラインとマイナス側ライン
との間に生じるノーマルモードノイズとの波形の測定
は、いずれもシンクロスコープ(図示しない)により行
う。このとき、各電源2,2Aにおける測定条件を次の
表1に示す。なお、各測定条件において電源2または電
源2Aに挿入接続される各チョークコイル10,31の巻数
及びインダクタンスは略同一となるようにする。FIG. 2 shows a method of measuring the noise terminal voltage generated from the power source 2A in FIG. 1 and the power source 2 in FIG. 6, and frequency analysis is performed between the commercial power source 1 and the input terminals + V1, -V1. The disturbing wave measuring device 41 such as a spectrum analyzer used for the power source 2 and 2A side impedance Z is maintained at a prescribed 50Ω,
A pseudo power supply network 42 for eliminating the influence of external noise on A and performing an accurate measurement is connected. Further, there are common mode noise generated between the voltage supply side line and the minus side line of the rectifier circuit 7 and the ground terminal FG, and normal mode noise generated between the voltage supply side line and the minus side line of the rectifier circuit 7. All waveforms are measured by a synchroscope (not shown). At this time, the measurement conditions for each of the power supplies 2 and 2A are shown in Table 1 below. Under each measurement condition, the choke coils 10 and 31 inserted and connected to the power supply 2 or the power supply 2A have substantially the same number of turns and inductance.
【0014】[0014]
【表1】 [Table 1]
【0015】サンプル1は従来例における図6に示す電
源2のチョークコイル10を用いており、その雑音端子電
圧及びコモンモードノイズとノーマルモードノイズとの
波形を図3(A)及び(B)に示す。このとき、図3
(A)における電源2から発生する雑音端子電圧の最大
値は、VCCI(情報処理装置等電波障害自主規制協議
会)において定められた、商工業地域にて使用される第
I種情報装置の極限値に対して、150kHzから5M
Hzの範囲で約3dB程度の余裕しかないことがわか
る。また、図3(B)においては、整流回路7の電圧供
給側ラインと接地端子FGとの間と、整流回路7のマイ
ナス側ラインと接地端子FGとの間に発生する高周波電
圧に差異を生じるため、整流回路7の電圧供給側ライン
とマイナス側ラインとの間には最大ピーク値で300V
にも達する大きな高周波電圧が発生する。Sample 1 uses the choke coil 10 of the power supply 2 shown in FIG. 6 in the conventional example, and its noise terminal voltage and waveforms of common mode noise and normal mode noise are shown in FIGS. 3 (A) and 3 (B). Show. At this time,
The maximum value of the noise terminal voltage generated from the power supply 2 in (A) is the limit of the type I information device used in the commercial and industrial area, which is defined by VCCI (Voluntary Control Council for Radio Interference such as Information Processing Devices). For values, 150kHz to 5M
It can be seen that there is only a margin of about 3 dB in the range of Hz. Further, in FIG. 3B, there is a difference in the high frequency voltage generated between the voltage supply side line of the rectifier circuit 7 and the ground terminal FG and between the negative side line of the rectifier circuit 7 and the ground terminal FG. Therefore, the maximum peak value is 300 V between the voltage supply side line and the minus side line of the rectifier circuit 7.
A large high-frequency voltage that reaches even
【0016】これに対し、サンプル2及びサンプル3に
示すように、バイファイラ巻及び分割巻にて各コイル部
32A,32Bをコア32に巻回したチョークコイル31を使用
した場合、電源2Aからの雑音端子電圧及びコモンモー
ドノイズとノーマルモードノイズとの波形は、それぞれ
図4(A),(B)及び図5(A),(B)のようにな
る。すなわち、図4(A)及び図5(A)における電源
2Aから発生する雑音端子電圧の最大値は、バイファイ
ラ巻及び分割巻のチョークコイル31において、いずれも
150kHzから5MHzの範囲でVCCIの第I種情
報装置の極限値に対して15dB以上の余裕があり、従
来例に比べてその電圧レベルが大巾に低減していること
がわかる。また、図4(B)及び図5(B)に示すよう
に、整流回路7の電圧供給側ラインと接地端子FGとの
間と、整流回路7のマイナス側ラインと接地端子FGと
の間には互いに逆位相の高周波電圧が発生するため、整
流回路7の電圧供給側ラインとマイナス側ラインとの間
の電圧は打ち消されて、その電圧レベルはいずれも50
V以下に低下していることがわかる。On the other hand, as shown in Samples 2 and 3, each coil portion is formed by bifilar winding and split winding.
When the choke coil 31 in which 32A and 32B are wound around the core 32 is used, the noise terminal voltage from the power supply 2A and the waveforms of the common mode noise and the normal mode noise are shown in FIGS. 4 (A), 4 (B) and FIG. It becomes like 5 (A) and (B). That is, the maximum value of the noise terminal voltage generated from the power supply 2A in FIGS. 4 (A) and 5 (A) is the ICI of VCCI in the range of 150 kHz to 5 MHz in the choke coil 31 of bifilar winding and split winding. It can be seen that there is a margin of 15 dB or more with respect to the limit value of the seed information device, and the voltage level thereof is greatly reduced compared to the conventional example. Further, as shown in FIGS. 4B and 5B, between the voltage supply side line of the rectifier circuit 7 and the ground terminal FG, and between the negative side line of the rectifier circuit 7 and the ground terminal FG. Generate high frequency voltages having opposite phases to each other, so that the voltage between the voltage supply side line and the minus side line of the rectifier circuit 7 is canceled, and the voltage level thereof is 50%.
It can be seen that the voltage drops below V.
【0017】このように、上記実施例においては、整流
回路7の電圧供給側ラインとマイナス側ラインとにそれ
ぞれコイル部32A,32Bを挿入接続したチョークコイル
31により、この整流回路7の電圧供給側ラインとマイナ
ス側ラインとの間に生じるノーマルモードノイズは打ち
消され、電源2Aから発生する雑音端子電圧を低減させ
て周辺機器に対する誤動作の誘発を防止することができ
る。As described above, in the above embodiment, the choke coil in which the coil portions 32A and 32B are inserted and connected to the voltage supply side line and the minus side line of the rectifier circuit 7, respectively.
The normal mode noise generated between the voltage supply side line and the minus side line of the rectifier circuit 7 is canceled by 31 and the noise terminal voltage generated from the power supply 2A is reduced to prevent the malfunction of peripheral devices from being induced. You can
【0018】また、電源2Aからの雑音端子電圧が低減
されたことにより、商用電源1と整流回路7との間に設
けられたノイズフィルタ回路6を通過するノイズ成分は
少なくなり、これによってノイズフィルタ回路6のイン
ダクタンス3,4及びコンデンサ5などの各素子の小形
化及び軽量化を図ることが可能となる。Further, since the noise terminal voltage from the power supply 2A is reduced, the noise component passing through the noise filter circuit 6 provided between the commercial power supply 1 and the rectifying circuit 7 is reduced, which reduces the noise filter. It is possible to reduce the size and weight of each element such as the inductances 3 and 4 of the circuit 6 and the capacitor 5.
【0019】なお、本発明は上記実施例に限定されるも
のではなく、本発明の要旨の範囲内において種々の変形
実施が可能である。例えば、スイッチング素子はMOS
型FETの代わりにトランジスタを用いてもよく、また
力率改善回路は各種タイプのものに適応することができ
る。The present invention is not limited to the above embodiment, and various modifications can be made within the scope of the gist of the present invention. For example, the switching element is a MOS
A transistor may be used instead of the type FET, and the power factor correction circuit can be adapted to various types.
【0020】[0020]
【発明の効果】本発明は交流電源電圧を整流回路により
整流するとともに、チョークコイルとこのチョークコイ
ルに蓄えられるエネルギーを制御するスイッチング素子
とを有し、前記スイッチング素子をスイッチングして前
記交流電源電圧の電圧波形と電流波形とを近ずける力率
改善回路を具備するスイッチング電源装置において、前
記チョークコイルを半数ずつの巻数に分割するととも
に、この分割した各コイル部が逆極性となるように同一
のコアに巻回して前記整流回路の出力ライン両端にそれ
ぞれ挿入接続したものであり、力率改善回路より発生す
るノーマルモードノイズを低減することの可能なスイッ
チング電源装置を提供できる。The present invention rectifies an AC power supply voltage by a rectifier circuit and has a choke coil and a switching element for controlling energy stored in the choke coil. The switching element is switched to switch the AC power supply voltage. In a switching power supply device including a power factor correction circuit for approximating the voltage waveform and the current waveform, the choke coil is divided into half turns, and the divided coil parts have the same polarity so as to have opposite polarities. A switching power supply device that is wound around the core and inserted and connected to both ends of the output line of the rectification circuit, and can reduce the normal mode noise generated by the power factor correction circuit.
【図1】本発明の一実施例を示す回路構成図である。FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention.
【図2】雑音端子電圧の測定方法を示す回路構成図であ
る。FIG. 2 is a circuit configuration diagram showing a method for measuring a noise terminal voltage.
【図3】サンプル1における雑音端子電圧及びコモンモ
ードとノーマルモードとの高周波電圧レベルを示す波形
図である。FIG. 3 is a waveform diagram showing a noise terminal voltage and high-frequency voltage levels in a common mode and a normal mode in Sample 1.
【図4】サンプル2における雑音端子電圧及びコモンモ
ードとノーマルモードとの高周波電圧レベルを示す波形
図である。FIG. 4 is a waveform diagram showing a noise terminal voltage and a high frequency voltage level in a common mode and a normal mode in Sample 2.
【図5】サンプル3における雑音端子電圧及びコモンモ
ードとノーマルモードとの高周波電圧レベルを示す波形
図である。FIG. 5 is a waveform diagram showing a noise terminal voltage and a high frequency voltage level in a common mode and a normal mode in Sample 3;
【図6】従来例を示す回路構成図である。FIG. 6 is a circuit configuration diagram showing a conventional example.
1 商用電源 7 整流回路 8A 力率改善回路 11 スイッチング素子 31 チョークコイル 32 コア 32A,32B コイル部 1 Commercial power supply 7 Rectifier circuit 8A Power factor correction circuit 11 Switching element 31 Choke coil 32 Core 32A, 32B Coil part
Claims (1)
とともに、チョークコイルとこのチョークコイルに蓄え
られるエネルギーを制御するスイッチング素子とを有
し、前記スイッチング素子をスイッチングして前記交流
電源電圧の電圧波形と電流波形とを近ずける力率改善回
路を具備するスイッチング電源装置において、前記チョ
ークコイルを半数ずつの巻数に分割するとともに、この
分割した各コイル部が逆極性となるように同一のコアに
巻回して前記整流回路の出力ライン両端にそれぞれ挿入
接続したことを特徴とするスイッチング電源装置。1. An AC power supply voltage is rectified by a rectifier circuit, and a choke coil and a switching element for controlling energy stored in the choke coil are provided, and the switching element is switched to form a voltage waveform of the AC power supply voltage. In a switching power supply device including a power factor correction circuit that makes the current waveform and the current waveform closer to each other, the choke coil is divided into half turns, and the divided coil parts have the same core so as to have opposite polarities. A switching power supply device, which is wound and inserted and connected at both ends of the output line of the rectifier circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4005015A JP3049696B2 (en) | 1992-01-14 | 1992-01-14 | Switching power supply |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4005015A JP3049696B2 (en) | 1992-01-14 | 1992-01-14 | Switching power supply |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH05191976A true JPH05191976A (en) | 1993-07-30 |
JP3049696B2 JP3049696B2 (en) | 2000-06-05 |
Family
ID=11599705
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4005015A Expired - Lifetime JP3049696B2 (en) | 1992-01-14 | 1992-01-14 | Switching power supply |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3049696B2 (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1999034500A1 (en) * | 1997-12-23 | 1999-07-08 | Asea Brown Boveri Ag | Converter connection assembly with a direct voltage intermediate circuit |
US7919950B2 (en) | 2007-07-09 | 2011-04-05 | Murata Manufacturing Co., Ltd. | Power factor correction converter |
US8223512B2 (en) | 2008-03-31 | 2012-07-17 | Fuji Electric Co., Ltd. | Power converter having an inductor including a first set of windings and a second set of windings both wound on a common core |
US8274800B2 (en) | 2007-06-29 | 2012-09-25 | Murata Manufacturing Co., Ltd. | DC-DC switching power supply with power factor correction |
JP2012239333A (en) * | 2011-05-12 | 2012-12-06 | Denso Corp | Step-up chopper circuit and method of designing step-up chopper circuit |
JP2012244654A (en) * | 2011-05-16 | 2012-12-10 | Fuji Electric Co Ltd | Electric power conversion device |
JP2018085915A (en) * | 2016-11-22 | 2018-05-31 | 國家中山科學研究院 | Single-phase non-bridge type insulated power factor adjustment circuit |
US10150372B2 (en) | 2015-11-23 | 2018-12-11 | Hyundai Motor Company | Power factor improving circuit and charger for vehicles employing the same |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
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KR200488994Y1 (en) * | 2017-10-24 | 2019-04-12 | 박서연 | An insole with balancing pads |
-
1992
- 1992-01-14 JP JP4005015A patent/JP3049696B2/en not_active Expired - Lifetime
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1999034500A1 (en) * | 1997-12-23 | 1999-07-08 | Asea Brown Boveri Ag | Converter connection assembly with a direct voltage intermediate circuit |
US8274800B2 (en) | 2007-06-29 | 2012-09-25 | Murata Manufacturing Co., Ltd. | DC-DC switching power supply with power factor correction |
US7919950B2 (en) | 2007-07-09 | 2011-04-05 | Murata Manufacturing Co., Ltd. | Power factor correction converter |
US8223512B2 (en) | 2008-03-31 | 2012-07-17 | Fuji Electric Co., Ltd. | Power converter having an inductor including a first set of windings and a second set of windings both wound on a common core |
JP2012239333A (en) * | 2011-05-12 | 2012-12-06 | Denso Corp | Step-up chopper circuit and method of designing step-up chopper circuit |
JP2012244654A (en) * | 2011-05-16 | 2012-12-10 | Fuji Electric Co Ltd | Electric power conversion device |
US10150372B2 (en) | 2015-11-23 | 2018-12-11 | Hyundai Motor Company | Power factor improving circuit and charger for vehicles employing the same |
JP2018085915A (en) * | 2016-11-22 | 2018-05-31 | 國家中山科學研究院 | Single-phase non-bridge type insulated power factor adjustment circuit |
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