JPH05175187A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH05175187A
JPH05175187A JP35434991A JP35434991A JPH05175187A JP H05175187 A JPH05175187 A JP H05175187A JP 35434991 A JP35434991 A JP 35434991A JP 35434991 A JP35434991 A JP 35434991A JP H05175187 A JPH05175187 A JP H05175187A
Authority
JP
Japan
Prior art keywords
film
viscosity
polyamic acid
polyimide film
polyimide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP35434991A
Other languages
Japanese (ja)
Inventor
Hiroshi Murase
寛 村瀬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Yamagata Ltd
Original Assignee
NEC Yamagata Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Yamagata Ltd filed Critical NEC Yamagata Ltd
Priority to JP35434991A priority Critical patent/JPH05175187A/en
Publication of JPH05175187A publication Critical patent/JPH05175187A/en
Pending legal-status Critical Current

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  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To prevent the generation of cavities or bubbles in a polyimide film formed as the insulating film of a semiconductor device. CONSTITUTION:The title manufacturing method includes a process for burying a step section by applying a low-viscosity polyamide acid containing a less amount of resin component to a semiconductor substrate 1 while the substrate 1 is rotated, process for forming a first polyimide film 6 on the substrate 1 by heat-treating the acid 5, process for applying a second polyamide acid 7 the viscosity of which is adjusted to a required level to the surface of the film 6, and process for forming a second polyimide film 8 by heat-treating the acid 7.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置の製造方法に
関し、特に絶縁膜としてのポリイミド膜の形成方法に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a polyimide film as an insulating film.

【0002】[0002]

【従来の技術】層間絶縁膜としてポリイミド膜を用いた
半導体装置の一例を図3に示す。同図において、半導体
基板1上に酸化膜2及びBPSG膜3を積層して下地絶
縁膜とし、この上に第1アルミニウム配線4を所要パタ
ーンに形成する。そして、この第1アルミニウム配線4
を覆うように層間絶縁膜としてのポリイミド(樹脂)膜
14を形成している。このポリイミド膜14を形成する
方法として、従来では、目標の膜厚を得られる範囲に粘
度を調整したポリアミド酸を半導体基板の表面に回転塗
布した後、このポリアミド酸を熱処理してポリイミド膜
を形成している。
2. Description of the Related Art An example of a semiconductor device using a polyimide film as an interlayer insulating film is shown in FIG. In the figure, an oxide film 2 and a BPSG film 3 are laminated on a semiconductor substrate 1 to form a base insulating film, on which a first aluminum wiring 4 is formed in a required pattern. Then, the first aluminum wiring 4
A polyimide (resin) film 14 as an interlayer insulating film is formed so as to cover the. Conventionally, as a method of forming the polyimide film 14, a polyamic acid having a viscosity adjusted to a range capable of obtaining a target film thickness is spin-coated on the surface of a semiconductor substrate, and then the polyamic acid is heat-treated to form a polyimide film. is doing.

【0003】[0003]

【発明が解決しようとする課題】この従来のポリイミド
膜の形成方法では、粘度調整されたポリアミド酸を一回
の工程で塗布しているため、集積回路の微細化が進み、
半導体基板表面の凸凹が大きくなると、凹部の埋込性能
が不十分となる。具体的には、溝幅1μm以下のアスペ
クト比 1.6以上の溝パターンが存在する場合には、この
溝の部分で図3のような空洞や気胞13が発生し完全な
段差部の埋込みができなくなり、絶縁膜としての耐圧が
低下され、或いは耐水性が低下されるという問題があ
る。本発明の目的は、空洞や気胞が発生することがない
ポリイミド膜を有する半導体装置の製造方法を提供する
ことにある。
In this conventional method for forming a polyimide film, since the viscosity-adjusted polyamic acid is applied in one step, miniaturization of the integrated circuit progresses,
When the unevenness on the surface of the semiconductor substrate becomes large, the filling performance of the recess becomes insufficient. Specifically, when a groove pattern having an aspect ratio of 1.6 or more with a groove width of 1 μm or less is present, cavities and air bubbles 13 as shown in FIG. 3 are generated in this groove portion, and it becomes impossible to completely embed a stepped portion. However, there is a problem that the withstand voltage as the insulating film is lowered or the water resistance is lowered. An object of the present invention is to provide a method for manufacturing a semiconductor device having a polyimide film that does not generate cavities or air bubbles.

【0004】[0004]

【課題を解決するための手段】本発明の製造方法は、半
導体基板上に樹脂成分を少なくした低粘度のポリアミド
酸を回転塗布して段差部を埋込む工程と、このポリアミ
ド酸を熱処理してポリイミド膜を形成する工程と、必要
な粘度に調整した第二のポリアミド酸を前記ポリイミド
膜上に回転塗布する工程と、この第二のポリアミド酸を
熱処理して第二のポリイミド膜を形成する工程を含んで
いる。
The manufacturing method of the present invention comprises the steps of spin-coating a low-viscosity polyamic acid having a reduced resin content on a semiconductor substrate to fill the step portion, and heat treating the polyamic acid. A step of forming a polyimide film, a step of spin-coating a second polyamic acid adjusted to a necessary viscosity on the polyimide film, and a step of heat-treating the second polyamic acid to form a second polyimide film. Is included.

【0005】[0005]

【実施例】次に、本発明について図面を参照して説明す
る。図1は本発明の一実施例を工程順に示す断面図であ
る。先ず、同図(a)のように、半導体基板1上に酸化
膜2とBPSG膜3を形成し、その上に第1アルミニウ
ム配線4を所要パターンに形成する。このアルミニウム
配線4は、ライン&スペース1μm/ 0.5μm、アルミ
ニウム膜厚1μmの微細アルミニウム配線である。そし
て、この基板上に樹脂成分12%を溶媒ジメチルアセトア
ミドに溶かし込んで粘度を10cpに調整した低粘度ポリア
シド酸5を 2000rpm,30sec で回転塗布する。これによ
り、平坦部の膜厚 0.5μmの層を形成すると、段差部で
は埋込みが進められ、図示のような形状となる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a sectional view showing an embodiment of the present invention in the order of steps. First, as shown in FIG. 3A, an oxide film 2 and a BPSG film 3 are formed on a semiconductor substrate 1, and a first aluminum wiring 4 is formed in a required pattern on the oxide film 2. The aluminum wiring 4 is a fine aluminum wiring having a line and space of 1 μm / 0.5 μm and an aluminum film thickness of 1 μm. Then, 12% of a resin component is dissolved in a solvent dimethylacetamide and low viscosity polyacidic acid 5 having a viscosity adjusted to 10 cp is spin-coated on this substrate at 2000 rpm for 30 seconds. As a result, when a layer having a film thickness of 0.5 μm is formed in the flat portion, the filling is promoted in the step portion and the shape shown in the figure is obtained.

【0006】次に、ホットプレートで 100℃60秒+ 130
℃60秒+ 200℃60秒の3段階でこの基板を熱処理し、低
粘度ポリアミド酸5をイミド化反応させると、同図
(b)のように、平坦部膜厚 0.3μmの第1ポリイミド
樹脂膜6が形成される。次いで、同図(c)のように、
樹脂成分21%を溶媒ジメチルアセトアミドに溶かし込ん
で粘度を 100cpに調整した高粘度ポリアミド酸7を 300
0rpm,30sec で回転塗布し、平坦部膜厚2μmの層を形
成する。
Next, on a hot plate, 100 ° C for 60 seconds + 130
When this substrate is heat-treated in three steps of 60 ° C. for 60 seconds and 200 ° C. for 60 seconds to cause imidization reaction of the low-viscosity polyamic acid 5, as shown in FIG. The film 6 is formed. Then, as shown in FIG.
300% of high viscosity polyamic acid 7 was prepared by dissolving 21% of resin component in solvent dimethylacetamide and adjusting viscosity to 100 cp.
Spin coating is performed at 0 rpm for 30 seconds to form a layer having a flat portion thickness of 2 μm.

【0007】続いて、ホットプレートで 100℃60秒+ 1
30℃60秒の2段階の熱処理後、拡散炉で 250℃30分+ 4
00℃60分の熱処理を行い、低粘度ポリアミド酸5から形
成したポリイミド樹脂膜6と、高粘度ポリアミド酸7の
層を完全にイミド化反応させると、同図(d)のように
平坦部の膜厚 1.6μmの第1ポリイミド樹脂膜6を包含
する第2ポリイミド樹脂膜8が形成される。しかる上
で、第1ポリイミド樹脂膜8(及び第2ポリイミド樹脂
膜6)にスルーホールを形成し、第2アルミニウム配線
9を形成することで、同図(e)のような層間絶縁膜及
び多層配線構造を得ることができる。
Then, on a hot plate, 100 ° C for 60 seconds + 1
After two-stage heat treatment at 30 ℃ for 60 seconds, 250 ℃ for 30 minutes + 4 in a diffusion furnace
When the polyimide resin film 6 formed from the low-viscosity polyamic acid 5 and the layer of the high-viscosity polyamic acid 7 are completely imidized by performing heat treatment at 00 ° C. for 60 minutes, the flat portion of the flat portion as shown in FIG. A second polyimide resin film 8 including the first polyimide resin film 6 having a film thickness of 1.6 μm is formed. Then, a through hole is formed in the first polyimide resin film 8 (and the second polyimide resin film 6) and a second aluminum wiring 9 is formed, so that the interlayer insulating film and the multilayer structure as shown in FIG. A wiring structure can be obtained.

【0008】図2は本発明の第2実施例を工程順に示す
断面図であり、ここでは本発明を保護膜形成に適用した
例を示す。同図(a)は第1実施例で形成した集積回路
基板にプラズマ窒化シリコン膜10を形成したものであ
る。この基板上に樹脂成分12%を溶媒ジメチルアセトア
シドに溶かし込んで粘度を10cpに調整した低粘度ポリア
ミド酸を 1500rpm,30sec 回転塗布後、ホットプレート
で 100℃60秒+ 130℃60秒+ 200℃60秒の3段階で熱処
理し、同図(b)のように、 0.5μmの第3ポリイミド
樹脂膜11の層を形成する。
FIG. 2 is a sectional view showing a second embodiment of the present invention in the order of steps, and here shows an example in which the present invention is applied to the formation of a protective film. FIG. 3A shows a plasma silicon nitride film 10 formed on the integrated circuit substrate formed in the first embodiment. 12% resin component was dissolved in the solvent dimethylacetoside on this substrate, and low viscosity polyamic acid whose viscosity was adjusted to 10 cp was spin-coated at 1500 rpm for 30 sec, then 100 ° C for 60 seconds + 130 ° C for 60 seconds + 200 ° C on a hot plate. Heat treatment is performed in three stages of 60 seconds to form a layer of the third polyimide resin film 11 having a thickness of 0.5 μm as shown in FIG.

【0009】次に、樹脂成分28%を溶媒ジメチルアセト
アシドに溶かし込んで粘度を 700cpに調整した高粘度ポ
リアミド酸を 2000rpm 30secで回転塗布後、ホットプレ
ートで 100℃60秒+ 130℃60秒の2段階の熱処理後、拡
散炉で 250℃30分+ 350℃30分の熱処理を行い、低粘度
ポリアミド酸から形成した第ポリイミド樹脂膜11と高
粘度ポリアシド酸層を完全にイミド化反応させると、同
図(c)のように、平坦部の膜厚5μmの第3ポリイミ
ド樹脂膜11を包含する第4ポリイミド樹脂膜12の保
護膜が形成される。
Next, 28% of the resin component was dissolved in a solvent dimethylacetoside, and high viscosity polyamic acid having a viscosity adjusted to 700 cp was spin-coated at 2000 rpm for 30 seconds, and then hot-plate at 100 ° C for 60 seconds + 130 ° C for 60 seconds. After the two-step heat treatment, heat treatment at 250 ° C for 30 minutes + 350 ° C for 30 minutes is performed in a diffusion furnace to completely imidize the high-viscosity polyacid acid layer with the first polyimide resin film 11 formed of low-viscosity polyamic acid. As shown in FIG. 6C, a protective film for the fourth polyimide resin film 12 including the third polyimide resin film 11 having a film thickness of 5 μm in the flat portion is formed.

【0010】[0010]

【発明の効果】以上説明したように本発明は、集積回路
基板上に樹脂成分を少なくして低粘度にしたポリアミド
酸を先に塗布及び熱処理して微細な段差部分を埋込んだ
ポリイミド膜を形成し、その後に目標膜厚を得るために
粘度を調整した第二のポリアミド酸を塗布及び熱処理し
て第二のポリイミド膜を形成しているので、段差部分で
の空洞や気胞が発生することがない良好なポリイミド膜
を形成することができるという効果を有する。
As described above, the present invention provides a polyimide film in which fine step portions are embedded by first coating and heat-treating polyamic acid having a reduced resin component and a low viscosity on an integrated circuit substrate. Since the second polyimide film is formed by applying and heat-treating the second polyamic acid whose viscosity has been adjusted to obtain the target film thickness, the formation of cavities and air bubbles at the stepped portion There is an effect that it is possible to form a good polyimide film having no defects.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1実施例を製造工程順に示す断面図
である。
FIG. 1 is a sectional view showing a first embodiment of the present invention in the order of manufacturing steps.

【図2】本発明の第2実施例を製造工程順に示す断面図
である。
FIG. 2 is a sectional view showing a second embodiment of the present invention in the order of manufacturing steps.

【図3】従来の半導体装置の一例の断面図である。FIG. 3 is a cross-sectional view of an example of a conventional semiconductor device.

【符号の説明】[Explanation of symbols]

1 半導体基板 4 第1アルミニウム配線 5 低粘度ポリアミド酸 6 第1ポリイミド膜 7 高粘度ポリアミド酸 8 第2ポリイミド膜 11 第3ポリイミド膜 12 第4ポリイミド膜 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 4 1st aluminum wiring 5 Low viscosity polyamic acid 6 1st polyimide film 7 High viscosity polyamic acid 8 2nd polyimide film 11 3rd polyimide film 12 4th polyimide film

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板上に樹脂成分を少なくした低
粘度のポリアミド酸を回転塗布して段差部を埋込む工程
と、前記ポリアミド酸を熱処理してポリイミド膜を形成
する工程と、必要な粘度に調整した第二のポリアミド酸
を前記ポリイミド膜上に回転塗布する工程と、この第二
のポリアミド酸を熱処理して第二のポリイミド膜を形成
する工程を含むことを特徴とする半導体装置の製造方
法。
1. A step of filling a step portion by spin-coating a low-viscosity polyamic acid having a reduced resin component on a semiconductor substrate, a step of heat-treating the polyamic acid to form a polyimide film, and a required viscosity. Manufacturing a semiconductor device characterized by including a step of spin-coating the second polyamic acid adjusted to the above onto the polyimide film, and a step of heat-treating the second polyamic acid to form a second polyimide film. Method.
JP35434991A 1991-12-20 1991-12-20 Manufacture of semiconductor device Pending JPH05175187A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35434991A JPH05175187A (en) 1991-12-20 1991-12-20 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35434991A JPH05175187A (en) 1991-12-20 1991-12-20 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH05175187A true JPH05175187A (en) 1993-07-13

Family

ID=18436958

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35434991A Pending JPH05175187A (en) 1991-12-20 1991-12-20 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH05175187A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001189475A (en) * 1999-12-30 2001-07-10 Honda Motor Co Ltd Manufacturing method of solar cell
JP2014165411A (en) * 2013-02-27 2014-09-08 Nippon Zeon Co Ltd Method of manufacturing wiring circuit board
JP2015213863A (en) * 2014-05-09 2015-12-03 日立化成デュポンマイクロシステムズ株式会社 Cured film production method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001189475A (en) * 1999-12-30 2001-07-10 Honda Motor Co Ltd Manufacturing method of solar cell
JP2014165411A (en) * 2013-02-27 2014-09-08 Nippon Zeon Co Ltd Method of manufacturing wiring circuit board
JP2015213863A (en) * 2014-05-09 2015-12-03 日立化成デュポンマイクロシステムズ株式会社 Cured film production method

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