JPH05144956A - Package for receiving semiconductor element - Google Patents
Package for receiving semiconductor elementInfo
- Publication number
- JPH05144956A JPH05144956A JP3301760A JP30176091A JPH05144956A JP H05144956 A JPH05144956 A JP H05144956A JP 3301760 A JP3301760 A JP 3301760A JP 30176091 A JP30176091 A JP 30176091A JP H05144956 A JPH05144956 A JP H05144956A
- Authority
- JP
- Japan
- Prior art keywords
- metal
- insulating base
- brazing material
- metal frame
- metallized
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体素子を収容するた
めの半導体素子収納用パッケージの改良に関するもので
ある。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a semiconductor element housing package for housing a semiconductor element.
【０００２】[0002]
【従来の技術】従来、半導体素子、特にＬＳＩ等の半導
体集積回路素子を収容するための半導体素子収納用パッ
ケージは一般にアルミナセラミックス等の電気絶縁材料
から成り、その上面略中央部に半導体集積回路素子を収
容するための空所を有し、且つ上面にコバール金属や42
アロイ等の金属材料から成る金属枠体がロウ付けされた
絶縁基体と、同じくコバール金属、42アロイ等の金属材
料より成る蓋体とから構成されており、絶縁基体の空所
内に半導体集積回路素子を取着収容するとともに絶縁基
体の金属枠体に金属製蓋体を溶接、或いはロウ付けし、
絶縁基体と金属製蓋体とから成る容器内部に半導体集積
回路素子を気密に封止することによって最終製品として
の半導体装置となる。2. Description of the Related Art Conventionally, a semiconductor element housing package for housing a semiconductor element, particularly a semiconductor integrated circuit element such as an LSI, is generally made of an electrically insulating material such as alumina ceramics, and a semiconductor integrated circuit element is provided at a substantially central portion of its upper surface. Has a space for accommodating the
A semiconductor integrated circuit element is formed in an empty space of the insulating base by an insulating base brazed with a metal frame made of a metal material such as alloy, and a lid body also made of a metal material such as Kovar metal or 42 alloy. The metal lid is welded or brazed to the metal frame of the insulating base,
The semiconductor integrated circuit element is hermetically sealed in a container formed of an insulating base and a metallic lid to provide a semiconductor device as a final product.
【０００３】尚、前記半導体素子収納用パッケージにお
いては絶縁基体の上面にタングステン、モリブデン、マ
ンガン等の高融点金属粉末から成るメタライズ配線層が
予め被着されており、該メタライズ金属層に金属枠体が
銀ロウ等のロウ材を介しロウ付けされる。In the package for accommodating semiconductor elements, a metallized wiring layer made of a refractory metal powder of tungsten, molybdenum, manganese or the like is pre-deposited on the upper surface of an insulating substrate, and the metallized metal layer is provided on the metal frame. Is brazed through a brazing material such as silver brazing.
【０００４】また前記絶縁基体の上面に設けたメタライ
ズ金属層への金属枠体のロウ付けは絶縁基体のメタライ
ズ金属層上に銀ロウ等から成るプリフォームと金属枠体
とを順次載置させ、しかる後、これを約900 ℃の温度で
加熱し、銀ロウ等から成るプリフォームを加熱溶融させ
ることによって行われる。The brazing of the metal frame to the metallized metal layer provided on the upper surface of the insulating substrate is performed by placing a preform made of silver solder or the like and the metal frame on the metallized metal layer of the insulating substrate in this order. Thereafter, this is heated at a temperature of about 900 ° C. to heat and melt a preform made of silver wax or the like.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、近時、
半導体素子収納用パッケージはその全体形状の小形化が
急激に進み、金属枠体の大きさも4mm 角程度の極めて小
さなものとなってきており、絶縁基体のメタライズ金属
層上に銀ロウ等から成るプリフォームと金属枠体とを順
次載置させて金属枠体をメタライズ金属層にロウ付けす
る場合、そのメタライズ金属層上への銀ロウプリフォー
ムと金属枠体との載置作業が面倒で位置ズレを発生し易
く、銀ロウプリフォームと金属枠体の載置位置に位置ズ
レが発生すると金属枠体をメタライズ金属層に強固に取
着させることができなくなったり、またメタライズ金属
層と金属枠体との間に空隙が形成されて半導体素子収納
用パッケージの気密封止が不完全となり、内部に収容す
る半導体集積回路素子を長期間にわたり正常、且つ安定
に作動させることができないという問題を招来してき
た。However, in recent years,
The overall size of the package for storing semiconductor elements has been rapidly reduced, and the size of the metal frame has become extremely small, about 4 mm square, and the package made of silver solder or the like is formed on the metallized metal layer of the insulating substrate. When the reform and metal frame are placed one after another and the metal frame is brazed to the metallized metal layer, the placement work of the silver braze preform and the metal frame on the metallized metal layer is troublesome and the position shifts. Is likely to occur, and if the placement position of the silver wax preform and the metal frame body is misaligned, the metal frame body cannot be firmly attached to the metallized metal layer, or the metallized metal layer and the metal frame body are not firmly attached. A void is formed between the semiconductor device and the semiconductor device, and the hermetic sealing of the package for housing the semiconductor device becomes incomplete, so that the semiconductor integrated circuit device housed inside can operate normally and stably for a long period of time. It has brought the problem of not being able to.
【０００６】[0006]
【発明の目的】本発明は上記欠点に鑑み案出されたもの
でその目的は、絶縁基体に設けたメタライズ金属層に金
属枠体を容易に、且つ強固に取着し、内部に収容する半
導体集積回路素子を長期間にわたり正常、安定に作動さ
せることができる半導体素子収納用パッケージを提供す
ることにある。SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and an object of the present invention is to provide a semiconductor in which a metal frame is easily and firmly attached to a metallized metal layer provided on an insulating substrate and accommodated therein. It is an object of the present invention to provide a package for accommodating a semiconductor element, which can operate the integrated circuit element normally and stably for a long period of time.
【０００７】[0007]
【課題を解決するための手段】本発明は上面に金属枠体
がロウ付けされた絶縁基体と金属製蓋体とから成り、絶
縁基体の金属枠体に金属製蓋体を取着することによって
内部に半導体素子を収容するようになした半導体素子収
納用パッケージにおいて、前記金属枠体は一面にロウ材
が圧接された金属板を打ち抜いたものが使用され、且つ
前記圧接させたロウ材を介して絶縁基体にロウ付けされ
ていることを特徴とするものである。The present invention comprises an insulating base body having a metal frame body brazed on its upper surface and a metal cover body, and by attaching the metal cover body to the metal frame body of the insulating base body. In a package for housing a semiconductor element, which accommodates a semiconductor element therein, the metal frame body is formed by punching out a metal plate having a brazing material pressed against one surface, and the brazing material is pressed against the metal frame. And is brazed to the insulating substrate.
【０００８】[0008]
【実施例】次に本発明を添付図面に基づき詳細に説明す
る。図1 及び図2 は本発明の半導体素子収納用パッケー
ジの一実施例を示し、1 は絶縁基体、2 は金属製蓋体で
ある。この絶縁基体1 と金属製蓋体2 とで半導体集積回
路素子を収容するための容器3 が構成される。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail with reference to the accompanying drawings. 1 and 2 show an embodiment of a package for housing a semiconductor device of the present invention, in which 1 is an insulating base and 2 is a metallic lid. The insulating base 1 and the metallic lid 2 constitute a container 3 for housing a semiconductor integrated circuit device.
【０００９】前記絶縁基体1 はその上面中央部に半導体
集積回路素子4 を収容するための空所を形成する凹部が
設けてあり、該凹部底面には半導体集積回路素子4 が樹
脂、ガラス、ロウ材等の接着材を介して取着される。The insulating substrate 1 is provided with a recess at the center of its upper surface for forming a space for accommodating the semiconductor integrated circuit element 4, and the semiconductor integrated circuit element 4 is covered with resin, glass, or solder on the bottom surface of the recess. It is attached via an adhesive material such as a material.
【００１０】前記絶縁基体1 は酸化アルミニウム質焼結
体、ムライト質焼結体、窒化アルミニウム質焼結体、炭
化珪素質焼結体等の電気絶縁性材料から成り、例えば酸
化アルミニウム質焼結体から成る場合はアルミナ(Al 2
O 3 ) 、シリカ(Si O 2 ) 、マグネシア(MgO) 、カルシ
ア(CaO) 等の原料粉末に適当な有機溶剤、溶媒を添加混
合して泥漿状となすとともにこれを従来周知のドクター
ブレード法やカレンダーロール法を採用することによっ
てセラミックグリーンシート( セラミック生シート) を
得、しかる後、前記セラミックグリーンシートに適当な
打ち抜き加工を施すとともに複数枚積層し、高温( 約16
00℃) の温度で焼成することによって製作される。The insulating substrate 1 is made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, and a silicon carbide sintered body. Alumina (Al 2
O 3 ), silica (Si O 2 ), magnesia (MgO), calcia (CaO), etc. A ceramic green sheet (ceramic green sheet) is obtained by adopting the calender roll method.After that, the ceramic green sheet is subjected to appropriate punching processing and a plurality of layers are laminated, and a high temperature (about 16
It is manufactured by firing at a temperature of 00 ° C.
【００１１】また前記絶縁基体1 には凹部周辺から容器
3 の外部にかけて導出するメタライズ配線層5 が被着形
成されており、該メタライズ配線層5 の凹部周辺部には
半導体集積回路素子4 の電極がボンディングワイヤ6 を
介して電気的に接続され、また容器3 の外部に導出され
た部位には外部電気回路と接続される外部リード端子7
が銀ロウ等のロウ材を介し取着される。Further, the insulating base 1 is provided with a container from the periphery of the recess.
A metallized wiring layer 5 extending to the outside of the metallization layer 3 is adhered and formed, and the electrode of the semiconductor integrated circuit element 4 is electrically connected via a bonding wire 6 to the periphery of the recess of the metallized wiring layer 5. An external lead terminal 7 connected to an external electric circuit is provided on the part led out of the container 3.
Are attached via a brazing material such as silver brazing.
【００１２】前記メタライズ配線層5 はタングステン
(W) 、モリブデン(Mo)、マンガン(Mn)等の高融点金属粉
末から成り、該タングステン等の高融点金属粉末に適当
な有機溶剤、溶媒を添加混合して得た金属ペーストを従
来周知のスクリーン印刷法等の厚膜手法を採用し、絶縁
基体1 と成るセラミックグリーンシートに予め被着させ
ておくことによって絶縁基体1 の凹部周辺から容器3 の
外部にかけて被着形成される。The metallized wiring layer 5 is made of tungsten.
(W), molybdenum (Mo), consisting of refractory metal powder such as manganese (Mn), a suitable organic solvent to the refractory metal powder such as tungsten, a metal paste obtained by adding and mixing a solvent conventionally known By using a thick film technique such as a screen printing method and depositing it on the ceramic green sheet to be the insulating substrate 1 in advance, it is deposited from around the recess of the insulating substrate 1 to the outside of the container 3.
【００１３】尚、前記メタライズ配線層5 はその露出す
る表面にニッケル(Ni)、金(Au)等の良導電性で、且つ耐
蝕性に優れた金属をメッキ法により1.0 乃至20.0μm の
厚みに層着させておくとメタライズ配線層5 の酸化腐食
を有効に防止することができるとともにメタライズ配線
層5 とボンディングワイワ6 との接続及びメタライズ配
線層5 と外部リード端子7 とのロウ付け取着が極めて強
固なものとなる。従って、メタライズ配線層5 の酸化腐
食を防止し、メタライズ配線層5 とボンディングワイヤ
6 との接続及びメタライズ配線層5 と外部リード端子7
とのロウ付けを強固なものとなすにはメタライズ配線層
5 の露出表面にニッケル、金等を1.0 乃至20.0μm の厚
みに層着させておくことが好ましい。On the exposed surface of the metallized wiring layer 5, a metal of good conductivity such as nickel (Ni), gold (Au) and excellent in corrosion resistance is formed by plating to a thickness of 1.0 to 20.0 μm. When the metallized wiring layer 5 is layered, oxidative corrosion of the metallized wiring layer 5 can be effectively prevented, and the metallized wiring layer 5 and the bonding wire 6 can be connected and brazed and attached to the metallized wiring layer 5 and the external lead terminal 7. It will be extremely strong. Therefore, the oxidative corrosion of the metallized wiring layer 5 is prevented, and the metallized wiring layer 5 and the bonding wires are prevented.
6 and metallized wiring layer 5 and external lead terminals 7
Metallized wiring layer for strong brazing with
It is preferable to deposit nickel, gold or the like on the exposed surface of layer 5 in a thickness of 1.0 to 20.0 μm.
【００１４】また前記メタライズ配線層5 にロウ付け取
着される外部リード端子7 は内部に収容する半導体集積
回路素子4 を外部電気回路に接続する作用を為し、外部
リード端子7 を外部電気回路に接続することによって内
部に収容される半導体集積回路素子4 はメタライズ配線
層5 及び外部リード端子7 を介して外部電気回路に電気
的に接続されることとなる。The external lead terminals 7 which are brazed and attached to the metallized wiring layer 5 serve to connect the semiconductor integrated circuit element 4 housed therein to an external electric circuit, and the external lead terminals 7 are connected to the external electric circuit. The semiconductor integrated circuit element 4 housed inside is electrically connected to the external electric circuit via the metallized wiring layer 5 and the external lead terminal 7 by connecting to the.
【００１５】前記外部リード端子7 はコバール金属(Fe-
Ni-Co合金) や42アロイ(Fe-Ni合金) 等の金属材料から
成り、コバール金属等のインゴット( 塊) を圧延加工法
や打ち抜き加工法等、従来周知の金属加工法を採用する
ことによって所定の板状に形成される。The external lead terminal 7 is made of Kovar metal (Fe-
Ni-Co alloy), 42 alloy (Fe-Ni alloy), and other metal materials.By applying well-known metal processing methods such as rolling and punching ingots (lumps) such as Kovar metal It is formed in a predetermined plate shape.
【００１６】前記絶縁基体1 はまたその上面にメタライ
ズ金属層8が被着形成されており、該メタライズ金属層8
には金属枠体9 が銀ロウ等のロウ材10を介してロウ付
けされている。The insulating substrate 1 also has a metallized metal layer 8 deposited on the upper surface thereof.
A metal frame body 9 is brazed to this via a brazing material 10 such as silver brazing.
【００１７】前記絶縁基体1 上面のメタライズ金属層8
はタングステン、モリブデン、マンガン等の高融点金属
粉末から成り、前述のメタライズ配線層5 と同様の方
法、具体的にはタングステン等の高融点金属粉末に適当
な有機溶剤、溶媒を添加混合して得た金属ペーストを絶
縁基体1 の上面に従来周知のスクリーン印刷法を採用す
ることによって印刷塗布するとともにこれを高温で焼き
付けることによって絶縁基体1 の上面に被着形成され
る。A metallized metal layer 8 on the upper surface of the insulating substrate 1
Is made of a refractory metal powder such as tungsten, molybdenum, or manganese, and is obtained by the same method as that for the metallized wiring layer 5 described above, specifically by adding and mixing an appropriate organic solvent or solvent to the refractory metal powder such as tungsten. The above metal paste is applied to the upper surface of the insulating substrate 1 by printing by applying a conventionally known screen printing method, and is baked at a high temperature to be deposited on the upper surface of the insulating substrate 1.
【００１８】尚、前記メタライズ金属層8 はその表面に
ニッケル(Ni)、金(Au)等のロウ材と濡れ性が良く、且つ
耐蝕性に優れた金属をメッキ法により1.0 乃至20.0μm
の厚みに層着させておくとメタライズ金属層8 の酸化腐
食を有効に防止することができるとともにメタライズ金
属層8 と金属枠体9 とのロウ付け取着を極めて強固なも
のとなすことができる。従って、メタライズ金属層8 の
表面にはロウ材と濡れ性が良く、且つ耐蝕性に優れた金
属を1.0 乃至20.0μm の厚みに層着させておくことが好
ましい。The metallized metal layer 8 has a surface on which a metal having good wettability with a brazing material such as nickel (Ni) or gold (Au) and having excellent corrosion resistance is applied by 1.0 to 20.0 μm by a plating method.
The thickness of the metallized metal layer 8 can effectively prevent oxidative corrosion of the metallized metal layer 8 and the brazed attachment of the metallized metal layer 8 and the metal frame body 9 can be made extremely strong. .. Therefore, it is preferable to deposit a metal having good wettability with the brazing material and excellent corrosion resistance on the surface of the metallized metal layer 8 to a thickness of 1.0 to 20.0 μm.
【００１９】また前記メタライズ金属層8 にロウ付けさ
れる金属枠体9 はコバール金属や42アロイ等の金属材料
から成る金属製蓋体2を絶縁基体1 に取着する際の下地
金属部材として作用し、金属枠体9に金属製蓋体2 をシ
ームウエルド法等の溶接、或いはロウ材を介してロウ付
けすることによって金属製蓋体2 は絶縁基体1 上に取着
される。The metal frame 9 brazed to the metallized metal layer 8 acts as a base metal member when the metal lid 2 made of a metal material such as Kovar metal or 42 alloy is attached to the insulating base 1. Then, the metal lid body 2 is attached to the insulating base body 1 by welding the metal lid body 2 to the metal frame body 9 by welding such as the seam weld method or by brazing with a brazing material.
【００２０】前記金属枠体9 はコバール金属や42アロイ
等の金属材料から成り、図2 に示す如く、一面にロウ材
10が圧接されたコバール金属等から成る金属板を従来周
知の打ち抜き加工法により所定形状に打ち抜くことによ
って形成され、絶縁基体1 上面のメタライズ金属層8 上
に金属枠体9 を、該金属枠体9 に圧接させたロウ材10が
前記メタライズ金属層8 に当接するようにして載置さ
せ、しかる後、これを例えば900 ℃の温度に加熱し、金
属枠体9 に圧接させておいたロウ材10を加熱溶融させる
ことによって金属枠体9 はメタライズ金属層8 にロウ付
け取着される。The metal frame body 9 is made of a metal material such as Kovar metal or 42 alloy. As shown in FIG.
10 is formed by punching a pressure-welded metal plate made of Kovar metal or the like into a predetermined shape by a conventionally known punching method, and a metal frame 9 is formed on the metallized metal layer 8 on the upper surface of the insulating substrate 1. The brazing material 10 pressed against 9 is placed so as to come into contact with the metallized metal layer 8 and then heated to a temperature of, for example, 900 ° C. to be brazed against the metal frame body 9 under pressure. The metal frame 9 is brazed and attached to the metallized metal layer 8 by heating and melting 10.
【００２１】尚、この場合、ロウ材10は金属枠体9 の一
面に一体的に圧接されていることから絶縁基体1 のメタ
ライズ金属層8 に金属枠体9 をロウ付け取着する場合、
メタライズ配線層8 上にロウ材10と金属枠体9 の両方を
位置合わせして載置する必要は一切なく、金属枠体9 の
位置を制御するだけでメタライズ金属層8 と金属枠体9
との間にロウ材10を容易、且つ正確に介在させることが
でき、その結果、メタライズ配線層8 に金属枠体9 を正
確、強固に取着することが可能となる。In this case, since the brazing material 10 is integrally pressure-bonded to one surface of the metal frame 9, when the metal frame 9 is brazed and attached to the metallized metal layer 8 of the insulating substrate 1,
It is not necessary to position both the brazing material 10 and the metal frame body 9 on the metallized wiring layer 8 in alignment, and only by controlling the position of the metal frame body 9, the metallized metal layer 8 and the metal frame body 9 are placed.
The brazing material 10 can be easily and accurately intervened between them and, as a result, the metal frame body 9 can be accurately and firmly attached to the metallized wiring layer 8.
【００２２】また一面にロウ材が圧接された金属板を打
ち抜いて金属枠体9 を形成する際、、金属枠体9 の打ち
抜き終了面側角部に金属部材の弾性に起因した面取り部
A が形成され、該面取り部A を絶縁基体1 のメタライズ
金属層8 側としておけばメタライズ金属層8 と金属枠体
9 の面取り部A との間にロウ材10の溜まり部が形成され
て金属枠体9 をメタライズ金属層8 により強固にロウ付
け取着することができる。従って、打ち抜き加工法によ
って形成する金属枠体9 はその打ち抜き終了面側が絶縁
基体1 のメタライズ金属層8 側となるようにしておくの
が好ましい。Further, when the metal frame body 9 is formed by punching out a metal plate on one surface of which the brazing material is pressed, a chamfered portion due to the elasticity of the metal member is formed at the corner of the punching end surface of the metal frame body 9.
When A is formed and the chamfered portion A is on the side of the metallized metal layer 8 of the insulating substrate 1, the metallized metal layer 8 and the metal frame body
The brazing material 10 is formed between the chamfered portion A and the chamfered portion A so that the metal frame body 9 can be firmly brazed and attached to the metallized metal layer 8. Therefore, it is preferable that the metal frame body 9 formed by the punching method has the punching end surface side facing the metallized metal layer 8 side of the insulating substrate 1.
【００２３】かくして本発明の半導体素子収納用パッケ
ージよれば絶縁基体1 の凹部底面に半導体集積回路素子
4 を接着材を介して取着するとともに半導体集積回路素
子の電極をメタライズ配線層5 にボンディングワイヤ6
を介して電気的に接続し、しかる後、絶縁基体1 の上面
にロウ付けした金属枠体9 に金属製蓋体2 をシームウエ
ルド法等の溶接、或いはロウ材を用いてロウ付けし、絶
縁基体1 と金属製蓋体2 とから成る容器3 内部に半導体
集積回路素子4 を気密に封止することによって最終製品
としての半導体装置となる。Thus, according to the package for accommodating a semiconductor element of the present invention, the semiconductor integrated circuit element is formed on the bottom surface of the concave portion of the insulating substrate 1.
4 is attached with an adhesive, and the electrodes of the semiconductor integrated circuit element are bonded to the metallized wiring layer 5 with bonding wires 6
After that, the metal frame body 9 brazed to the upper surface of the insulating base body 1 is welded to the metal lid body 2 by the seam weld method, or brazed with a brazing material to insulate it. The semiconductor device as a final product is obtained by hermetically sealing the semiconductor integrated circuit element 4 inside the container 3 composed of the base 1 and the metallic lid 2.
【００２４】尚、本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能である。The present invention is not limited to the above-mentioned embodiments, and various modifications can be made without departing from the gist of the present invention.
【００２５】[0025]
【発明の効果】本発明は上面に金属枠体がロウ付けされ
た絶縁基体と金属製蓋体とから成り、絶縁基体の金属枠
体に金属製蓋体を取着することによって内部に半導体素
子を収容するようになした半導体素子収納用パッケージ
であって、前記金属枠体として一面にロウ材が圧接され
た金属板を打ち抜いたものを使用し、且つ前記圧接させ
たロウ材を用いて金属枠体を絶縁基体にロウ付けさせる
ようになしたことから絶縁基体に金属枠体をロウ付け取
着する場合、絶縁基体の所定位置に金属枠体を載置させ
るだけで絶縁基体と金属枠体との間にロウ材を容易、且
つ正確に介在させることができ、その結果、絶縁基体に
金属枠体を正確、強固に取着させることが可能となると
ともに半導体素子収納用パッケージ内部の気密封止も完
全なものとなすことができる。The present invention comprises an insulating base body having a metal frame body brazed on its upper surface and a metal cover body. By attaching the metal cover body to the metal frame body of the insulating base body, the semiconductor element is internally provided. A semiconductor element housing package adapted to house a metal plate using a punched metal plate having a brazing material pressed onto one surface as the metal frame, and using the brazing material pressed against the metal. Since the frame body is brazed to the insulating base body, when the metal frame body is brazed and attached to the insulating base body, the insulating base body and the metal frame body can be simply mounted on the insulating base body at a predetermined position. A brazing material can be easily and accurately interposed between the metal base and the metal base, and as a result, the metal frame can be accurately and firmly attached to the insulating base and the airtightness inside the semiconductor element housing package can be achieved. The stop is also perfect Can.
【図１】本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。FIG. 1 is a cross-sectional view showing an example of a semiconductor element housing package of the present invention.
【図２】図１に使用される金属枠体を説明するための部
分拡大断面図である。FIG. 2 is a partially enlarged cross-sectional view for explaining the metal frame body used in FIG.
１・・・・・絶縁基体 ２・・・・・金属製蓋体 ３・・・・・容器 ５・・・・・メタライズ配線層 ７・・・・・外部リード端子 ８・・・・・メタライズ金属層 ９・・・・・金属枠体 １０・・・・・ロウ材 1 ... Insulating substrate 2 ... Metal lid 3 ... Container 5 ... Metallized wiring layer 7 ... External lead terminal 8 ... Metallized Metal layer 9 ... Metal frame 10 ... Brazing material
Claims (1)
と金属製蓋体とから成り、絶縁基体の金属枠体に金属製
蓋体を取着することによって内部に半導体素子を収容す
るようになした半導体素子収納用パッケージにおいて、
前記金属枠体は一面にロウ材が圧接された金属板を打ち
抜いたものが使用され、且つ前記圧接させたロウ材を介
して絶縁基体にロウ付けされていることを特徴とする半
導体素子収納用パッケージ。1. An insulating base body having a metal frame body brazed to an upper surface thereof and a metal cover body, and a metal cover body is attached to the metal frame body of the insulating base body to accommodate a semiconductor element therein. In the package for storing the semiconductor element,
The metal frame body is formed by punching out a metal plate having a brazing material pressure-contacted on one surface, and is brazed to an insulating substrate through the pressure-bonding brazing material. package.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3301760A JPH05144956A (en) | 1991-11-18 | 1991-11-18 | Package for receiving semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3301760A JPH05144956A (en) | 1991-11-18 | 1991-11-18 | Package for receiving semiconductor element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05144956A true JPH05144956A (en) | 1993-06-11 |
Family
ID=17900842
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3301760A Pending JPH05144956A (en) | 1991-11-18 | 1991-11-18 | Package for receiving semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05144956A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5945735A (en) * | 1997-01-31 | 1999-08-31 | International Business Machines Corporation | Hermetic sealing of a substrate of high thermal conductivity using an interposer of low thermal conductivity |
| US6037193A (en) * | 1997-01-31 | 2000-03-14 | International Business Machines Corporation | Hermetic sealing of a substrate of high thermal conductivity using an interposer of low thermal conductivity |
| JP2003017604A (en) * | 2001-06-28 | 2003-01-17 | Kyocera Corp | Package for housing semiconductor element and semiconductor device |
| WO2013183315A1 (en) * | 2012-06-04 | 2013-12-12 | 株式会社Ｎｅｏｍａｘマテリアル | Seal ring and process for producing seal ring |
| JP2014197575A (en) * | 2013-03-29 | 2014-10-16 | セイコーエプソン株式会社 | Package, electronic device, method of manufacturing electronic device, electronic apparatus, and mobile body |
| JP2021068888A (en) * | 2019-10-23 | 2021-04-30 | 日立金属株式会社 | Manufacturing method of base material with brazing material and base material with brazing material |
-
1991
- 1991-11-18 JP JP3301760A patent/JPH05144956A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5945735A (en) * | 1997-01-31 | 1999-08-31 | International Business Machines Corporation | Hermetic sealing of a substrate of high thermal conductivity using an interposer of low thermal conductivity |
| US6037193A (en) * | 1997-01-31 | 2000-03-14 | International Business Machines Corporation | Hermetic sealing of a substrate of high thermal conductivity using an interposer of low thermal conductivity |
| JP2003017604A (en) * | 2001-06-28 | 2003-01-17 | Kyocera Corp | Package for housing semiconductor element and semiconductor device |
| WO2013183315A1 (en) * | 2012-06-04 | 2013-12-12 | 株式会社Ｎｅｏｍａｘマテリアル | Seal ring and process for producing seal ring |
| KR20150023236A (en) * | 2012-06-04 | 2015-03-05 | 히타치 긴조쿠 가부시키가이샤 | Seal ring and process for producing seal ring |
| JPWO2013183315A1 (en) * | 2012-06-04 | 2016-01-28 | 日立金属株式会社 | SEAL RING AND METHOD FOR PRODUCING SEAL RING |
| US9961791B2 (en) | 2012-06-04 | 2018-05-01 | Hitachi Metals, Ltd. | Seal ring and method for manufacturing seal ring |
| US10188010B2 (en) | 2012-06-04 | 2019-01-22 | Hitachi Metals, Ltd. | Seal ring and method for manufacturing seal ring |
| JP2014197575A (en) * | 2013-03-29 | 2014-10-16 | セイコーエプソン株式会社 | Package, electronic device, method of manufacturing electronic device, electronic apparatus, and mobile body |
| JP2021068888A (en) * | 2019-10-23 | 2021-04-30 | 日立金属株式会社 | Manufacturing method of base material with brazing material and base material with brazing material |
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