JPH05134030A - Phase operating circuit of radar transceiver apparatus - Google Patents
Phase operating circuit of radar transceiver apparatusInfo
- Publication number
- JPH05134030A JPH05134030A JP3327101A JP32710191A JPH05134030A JP H05134030 A JPH05134030 A JP H05134030A JP 3327101 A JP3327101 A JP 3327101A JP 32710191 A JP32710191 A JP 32710191A JP H05134030 A JPH05134030 A JP H05134030A
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- Prior art keywords
- signal
- phase
- transmission
- rom
- mixers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明は、レーダ送受信装置の
位相演算回路に関し、特にレーダの送受信装置の位相変
化を補正する際の位相検波，補正演算を行なうものに関
するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase calculation circuit for a radar transmitter / receiver, and more particularly to a circuit for phase detection and correction calculation for correcting a phase change of a radar transmitter / receiver.
【０００２】[0002]
【従来の技術】従来、この種の装置として図２(a) に示
すものがあった。図２(a) において、２は増幅器、３は
位相検波用ミキサ、１４はＬＯＣＡＬ信号、１５はＩＦ
信号、１６はＬＯＣＡＬ信号１４，ＩＦ信号１５をミキ
シングしてＲＦ信号を作るミキサ、１７はＲＦ信号とＬ
ＯＣＡＬ信号からＩＦ信号を作り出すミキサである。2. Description of the Related Art Conventionally, as this type of apparatus, there is one shown in FIG. In FIG. 2 (a), 2 is an amplifier, 3 is a phase detection mixer, 14 is a LOCAL signal, and 15 is an IF.
The signal, 16 is a mixer for mixing the LOCAL signal 14 and the IF signal 15 to produce an RF signal, and 17 is the RF signal and L
It is a mixer that produces an IF signal from an OCAL signal.
【０００３】また、図２(b) において、１１，１２はＡ
／Ｄコンバータ、１３，１８，１９は演算用ＲＯＭ、２
０は減算器である。Further, in FIG. 2 (b), 11 and 12 are A
A / D converter, 13, 18, 19 are calculation ROMs, 2
0 is a subtractor.
【０００４】次に動作について説明する。図２(a) にお
いて、ＬＯＣＡＬ信号１４とＩＦ信号１５をミキサ１６
でミキシングし、ＲＦ信号を作り出す。そのＲＦ信号を
電力増幅器２で増幅し、増幅されたＲＦ信号のモニタ信
号とＬＯＣＡＬ信号１４からミキサ１７でＩＦ信号を作
り出す。このＩＦ信号を９０°の位相差で２分配し、Ｉ
Ｆ信号を同相で２分配する。それぞれの２分配した信号
をミキサ３により検波し、アナログ信号３ａ，３ｂを出
力する。Next, the operation will be described. In FIG. 2 (a), the LOCAL signal 14 and the IF signal 15 are input to the mixer 16
To produce an RF signal. The RF signal is amplified by the power amplifier 2, and the IF signal is produced by the mixer 17 from the amplified monitor signal of the RF signal and the LOCAL signal 14. This IF signal is divided into two with a phase difference of 90 °, and I
The F signal is divided into two in-phase. The respective divided signals are detected by the mixer 3 and analog signals 3a and 3b are output.
【０００５】図２(b) において、アナログ信号３ａ，３
ｂをＡ／Ｄコンバータ１１，１２でデジタル信号に変換
し、ＲＯＭ１８，１９でＬＯＧ｜３ａ｜，ＬＯＧ｜３ｂ
｜を演算し、減算器２０でその差を求めることにより、
ＬＯＧ｜３ｂ／３ａ｜を算出する。さらに、ＲＯＭ１３
にて、ＬＯＧ｜３ｂ／３ａ｜より｜３ｂ／３ａ｜を算出
し、 tan-1｜３ｂ／３ａ｜を演算して位相データを出力
する。In FIG. 2 (b), analog signals 3a, 3
b is converted into a digital signal by the A / D converters 11 and 12, and LOG | 3a |, LOG | 3b is stored in the ROMs 18 and 19.
By calculating | and obtaining the difference by the subtractor 20,
LOG | 3b / 3a | is calculated. Furthermore, ROM13
, | 3b / 3a | is calculated from LOG | 3b / 3a |, and tan −1 | 3b / 3a | is calculated to output the phase data.
【０００６】[0006]
【発明が解決しようとする課題】従来の位相検波回路は
以上のように構成されているので、ＩＦ信号で位相検波
を行なわなければならず、ＬＯＣＡＬ信号，ＩＦ信号，
ＲＦ信号と３種類の信号が必要で、ミキサが４個必要と
なる。また、位相演算回路では、計算式を順番にＲＯＭ
に与えているので、ＲＯＭ３個，減算器１個が必要とな
り、回路が複雑になる。Since the conventional phase detection circuit is constructed as described above, the phase detection must be performed by the IF signal, and the LOCAL signal, IF signal,
An RF signal and three types of signals are required, and four mixers are required. In addition, in the phase calculation circuit, the calculation formulas are sequentially stored in the ROM.
Therefore, three ROMs and one subtractor are required, which complicates the circuit.
【０００７】この発明は、上記のような問題点を解消す
るためになされたもので、回路を簡略化できるととも
に、小型，軽量で安価に構成できるレーダ送受信装置の
位相演算回路を提供することを目的とする。The present invention has been made in order to solve the above problems, and it is an object of the present invention to provide a phase calculation circuit for a radar transmitter / receiver which can simplify the circuit and can be constructed at a small size, a light weight and a low cost. To aim.
【０００８】[0008]
【課題を解決するための手段】この発明に係るレーダ送
受信装置の位相演算回路は、スイッチを切換えることに
より、前置増幅器の入力信号と送信モニタ信号を２個の
ミキサに入力して送信系の位相を検波し、それぞれに検
波した信号をデジタル信号に変換し、アナログ信号の符
号により、位相角の象限を分類し、１個のＲＯＭで演算
することにより、位相補正データを出力する。A phase calculation circuit of a radar transmitter / receiver according to the present invention switches a switch to input an input signal of a preamplifier and a transmission monitor signal to two mixers. The phase is detected, the signals detected respectively are converted into digital signals, the quadrant of the phase angle is classified by the sign of the analog signal, and the phase correction data is output by calculating with one ROM.
【０００９】また、この発明に係るレーダ送受信装置の
位相演算回路は、スイッチを切換えることにより、前置
増幅器の出力信号とその信号を低雑音増幅器に入力し増
幅された信号を２個のミキサに入力して受信系の位相を
検波し、それぞれに検波した信号をデジタル信号に変換
し、アナログ信号の符号により、位相角の象限を分類し
１個のＲＯＭで演算することにより、位相補正データを
出力する。Further, in the phase calculation circuit of the radar transmitter / receiver according to the present invention, by switching the switch, the output signal of the preamplifier and the signal are input to the low noise amplifier and the amplified signal is input to the two mixers. By inputting and detecting the phase of the receiving system, converting each detected signal into a digital signal, classifying the quadrant of the phase angle by the sign of the analog signal, and calculating with one ROM, the phase correction data is obtained. Output.
【００１０】[0010]
【作用】この発明における位相演算回路は、送信系の位
相をＲＦ信号で直接検波することにより、信号は１種
類、ミキサは２個で動作することができる。また、位相
演算のＲＯＭは１素子で済み、ＲＯＭ２個，減算器１個
を省略することができる。The phase operation circuit in the present invention can operate with one kind of signal and two mixers by directly detecting the phase of the transmission system with the RF signal. Further, the ROM for phase calculation is only one element, and two ROMs and one subtractor can be omitted.
【００１１】また、この発明における位相演算回路は、
受信系の位相をＲＦ信号で直接検波することにより、信
号は１種類、ミキサは２個で動作することができる。ま
た、位相演算のＲＯＭは１素子で済み、ＲＯＭ２個，減
算器１個を省略することができる。The phase calculation circuit according to the present invention is
By directly detecting the phase of the receiving system with the RF signal, it is possible to operate with one type of signal and two mixers. Further, the ROM for phase calculation is only one element, and two ROMs and one subtractor can be omitted.
【００１２】[0012]
【実施例】以下、この発明の一実施例を図について説明
する。図１はこの発明の一実施例によるレーダ送受信装
置の位相演算回路を示す。図１(a) はその位相検波回路
であり、図において、１は受信信号８を増幅する低雑音
増幅器、２は送信種信号７を増幅する前置増幅器、９は
前置増幅器２の出力１０をさらに大電力増幅器にて増幅
した送信信号のモニタ信号であり、４〜６はそれぞれの
ＲＦ信号を振り分けるスイッチで、送信系，受信系それ
ぞれの入出力を２個のミキサ３により検波し、アナログ
信号を出力する。DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a phase calculation circuit of a radar transmitter / receiver according to an embodiment of the present invention. FIG. 1 (a) is a phase detection circuit thereof, in which 1 is a low noise amplifier for amplifying a received signal 8, 2 is a preamplifier for amplifying a transmission seed signal 7, and 9 is an output 10 of the preamplifier 2. Is a monitor signal of a transmission signal amplified by a high power amplifier. Reference numerals 4 to 6 are switches for distributing the respective RF signals, and the input and output of each of the transmission system and the reception system are detected by the two mixers 3 and the analog signals are detected. Output a signal.
【００１３】また、図１(b) はその演算回路を示すもの
であり、１１，１２は上記のアナログ信号をデジタル信
号に変換するＡ／Ｄコンバータで、１１３はデジタル信
号から位相補正データを算出するＲＯＭである。Further, FIG. 1 (b) shows the arithmetic circuit thereof, 11 and 12 are A / D converters for converting the above analog signals into digital signals, and 113 is for calculating phase correction data from the digital signals. It is a ROM.
【００１４】次に動作について説明する。前記のように
構成された位相演算回路においては、３個のスイッチ４
〜６の切り換えにより、送信系，受信系それぞれの入出
力信号を２個のミキサ３に９０°位相をずらして入力
し、検波されたアナログ信号３ａ，３ｂをＡ／Ｄコンバ
ータ１１，１２にてデジタル信号に変換し、そのデジタ
ル信号からＲＯＭ１１３で tan-1｜３ｂ／３ａ｜を演算
し、位相補正データを出力する。Next, the operation will be described. In the phase operation circuit configured as described above, the three switches 4
By switching between 6 and 6, the input and output signals of the transmission system and the reception system are input to the two mixers 3 with a 90 ° phase shift, and the detected analog signals 3a and 3b are input to the A / D converters 11 and 12. The signal is converted into a digital signal, tan −1 | 3b / 3a | is calculated in the ROM 113 from the digital signal, and phase correction data is output.
【００１５】ここで、送信系の透過位相は、スイッチ４
〜６を図１の状態に切換えることにより、前置増幅器２
の入力信号と送信モニタ信号９とを検波することによ
り、また、受信系の透過位相は、スイッチ４〜６を図１
とは反対の状態に切換えることにより、前置増幅器２の
出力信号とその信号を低雑音増幅器１に入力し増幅され
た信号とを検波することにより測定される。この場合、
送信系と受信系の位相の回転方向が逆になるため、ＲＯ
Ｍ１１３の入力アドレスの最上位ビットに送受位相モニ
タの切り換え信号２１を入力することにより、送信系と
受信系の位相演算式を切り換えることができる。Here, the transmission phase of the transmission system is the switch 4
6 to the state shown in FIG.
1 and the transmission monitor signal 9 are detected, and the transmission phase of the reception system is set to the switches 4 to 6 as shown in FIG.
By measuring the output signal of the preamplifier 2 and the input signal to the low noise amplifier 1 and detecting the amplified signal by switching to the state opposite to the above. in this case,
Since the rotation directions of the phases of the transmission system and the reception system are opposite, RO
By inputting the transmission / reception phase monitor switching signal 21 to the most significant bit of the input address of M113, it is possible to switch the phase arithmetic expressions of the transmission system and the reception system.
【００１６】このように、本実施例の位相演算回路で
は、位相をＲＦ信号で直接検波することにより、信号は
１種類、ミキサは２個で動作することができ、自動位相
制御回路（ＡＰＣ回路）を内蔵した送受信モジュールを
小型かつ安価に構成できる。As described above, in the phase operation circuit of this embodiment, by directly detecting the phase with the RF signal, it is possible to operate with one kind of signal and two mixers, and the automatic phase control circuit (APC circuit). ) Can be configured in a compact and inexpensive manner.
【００１７】また、位相演算のＲＯＭは１素子であり、
ＲＯＭ２個，減算器１個を省略することができる。Further, the ROM for phase calculation is one element,
Two ROMs and one subtractor can be omitted.
【００１８】[0018]
【発明の効果】以上のように、この発明に係るレーダ送
受信装置の位相演算回路によれば、スイッチの切換えに
より、送信系の透過位相を同一回路にて直接位相検波す
るように構成したので、信号はＲＦ信号１種類だけでよ
く、ミキサも２個だけでよく、コンパクトな送受信モジ
ュールが実現できるだけでなく、複雑な演算回路を単に
１個のＲＯＭ素子に置き換えることができ、ＲＯＭを２
個節約でき、また減算器は不要となるなど、演算素子の
個数を少なくすることができる効果がある。As described above, according to the phase calculation circuit of the radar transmitter / receiver of the present invention, the transmission phase of the transmission system is directly detected by the same circuit by switching the switch. Only one type of RF signal is required and only two mixers are required, so that not only a compact transmission / reception module can be realized, but also a complicated arithmetic circuit can be simply replaced by one ROM element, and the ROM can be replaced by two.
The number of arithmetic elements can be reduced, for example, the number can be saved and the subtractor is not necessary.
【００１９】また、この発明に係るレーダ送受信装置の
位相演算回路によれば、スイッチの切換えにより、受信
系の透過位相を同一回路にて直接位相検波するように構
成したので、信号はＲＦ信号１種類だけでよく、ミキサ
も２個だけでよく、コンパクトな送受信モジュールが実
現できるだけでなく、複雑な演算回路を単に１個のＲＯ
Ｍ素子に置き換えることができ、ＲＯＭを２個節約で
き、また減算器は不要となるなど、演算素子の個数を少
なくすることができる効果がある。Further, according to the phase arithmetic circuit of the radar transmitter / receiver of the present invention, the transmission phase of the receiving system is directly detected by the same circuit by switching the switch, so that the signal is the RF signal 1 Only the types are required, and only two mixers are required, so that not only a compact transmission / reception module can be realized, but also a complicated arithmetic circuit can be simply used as one RO.
There is an effect that the number of arithmetic elements can be reduced, for example, M elements can be replaced, two ROMs can be saved, and a subtractor is unnecessary.
【図１】この発明の一実施例によるレーダ送受信装置の
送受位相検波回路を示す図であり、図１(a) はその全体
構成を示すブロック図、図１(b) はその演算回路のブロ
ック図である。FIG. 1 is a diagram showing a transmission / reception phase detection circuit of a radar transmission / reception device according to an embodiment of the present invention, FIG. 1 (a) is a block diagram showing its entire configuration, and FIG. 1 (b) is a block of its arithmetic circuit. It is a figure.
【図２】従来の位相検波回路を示す図であり、図２(a)
はその全体構成を示すブロック図、図２(b) はその演算
回路のブロック図である。FIG. 2 is a diagram showing a conventional phase detection circuit, and FIG.
Is a block diagram showing the overall configuration thereof, and FIG. 2 (b) is a block diagram of its arithmetic circuit.
１ 低雑音増幅器 ２ 前置増幅器 ３ ミキサ ４ ＳＰＤＴスイッチ ５ ＳＰＤＴスイッチ ６ ＳＰＤＴスイッチ ７ 送信種信号 ８ 受信信号 ９ 送信モニタ信号 １０ 前置増幅器出力信号（大電力増幅器入力信号） １１ Ａ／Ｄコンバータ １２ Ａ／Ｄコンバータ １３，１１３ ＲＯＭ １４ ＬＯＣＡＬ信号 １５ ＩＦ信号 １６ ミキサ １７ ミキサ １８ ＲＯＭ １９ ＲＯＭ ２０ 減算器 ２１ 送受位相モニタの切り換え信号 1 Low Noise Amplifier 2 Preamplifier 3 Mixer 4 SPDT Switch 5 SPDT Switch 6 SPDT Switch 7 Transmission Type Signal 8 Received Signal 9 Transmission Monitor Signal 10 Preamplifier Output Signal (Large Power Amplifier Input Signal) 11 A / D Converter 12 A / D converter 13,113 ROM 14 LOCAL signal 15 IF signal 16 mixer 17 mixer 18 ROM 19 ROM 20 subtracter 21 transmission / reception phase monitor switching signal
Claims (2)
０°の位相差で分配し、得られた２種の信号をＡ／Ｄコ
ンバータでＡ／Ｄ変換し、ＲＯＭによって位相を演算す
るレーダ送受信装置の位相補正用の位相演算回路におい
て、 受信信号を増幅するための低雑音増幅器と、 送信種信号を増幅するための前置増幅器と、 送信信号と受信信号とを振り分けるためのスイッチと、 上記送信信号または上記受信信号を検波する２個のミキ
サと、 そのミキサによって出力される９０°位相をずらされた
２種の信号を入力するＡ／Ｄコンバータと、 このＡ／Ｄコンバータの出力信号を演算するＲＯＭとを
備え、 上記スイッチの切換えにより、上記２個のミキサは、上
記前置増幅器の入力信号と、その信号を増幅したモニタ
信号とを入力として送信信号を検波することを特徴とす
るレーダ送受信装置の位相演算回路。1. An RF signal amplified by an amplifier
The received signals are distributed in a phase difference of 0 °, the obtained two types of signals are A / D converted by an A / D converter, and the received signal is received by a phase calculation circuit for phase correction of a radar transceiver that calculates the phase by a ROM. A low noise amplifier for amplification, a preamplifier for amplifying a transmission seed signal, a switch for distributing a transmission signal and a reception signal, and two mixers for detecting the transmission signal or the reception signal , An A / D converter for inputting two types of 90 ° phase-shifted signals output by the mixer, and a ROM for calculating the output signal of the A / D converter, and by switching the switch, The two mixers detect a transmission signal by inputting an input signal of the preamplifier and a monitor signal obtained by amplifying the input signal, and detect phase of the transmission signal. Circuit.
０°の位相差で分配し、得られた２種の信号をＡ／Ｄコ
ンバータでＡ／Ｄ変換し、ＲＯＭによって位相を演算す
るレーダ送受信装置の位相補正用の位相演算回路におい
て、 受信信号を増幅するための低雑音増幅器と、 送信種信号を増幅するための前置増幅器と、 送信信号と受信信号とを振り分けるためのスイッチと、 上記送信信号または上記受信信号を検波する２個のミキ
サと、 そのミキサによって出力される９０°位相をずらされた
２種の信号を入力するＡ／Ｄコンバータと、 このＡ／Ｄコンバータの出力信号を演算するＲＯＭとを
備え、 上記スイッチの切換えにより、上記２個のミキサは、上
記前置増幅器の出力信号と、低雑音増幅器の出力信号と
を入力して受信信号を検波することを特徴とするレーダ
送受信装置の位相演算回路。2. The RF signal amplified by the amplifier is
The received signals are distributed in a phase difference of 0 °, the obtained two types of signals are A / D converted by an A / D converter, and the received signal is received by a phase calculation circuit for phase correction of a radar transceiver that calculates the phase by a ROM. A low noise amplifier for amplification, a preamplifier for amplifying a transmission seed signal, a switch for distributing a transmission signal and a reception signal, and two mixers for detecting the transmission signal or the reception signal , An A / D converter for inputting two types of 90 ° phase-shifted signals output by the mixer, and a ROM for calculating the output signal of the A / D converter, and by switching the switch, A phase calculation circuit for a radar transmitter / receiver, wherein the two mixers input the output signal of the preamplifier and the output signal of the low noise amplifier to detect a received signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3327101A JPH05134030A (en) | 1991-11-13 | 1991-11-13 | Phase operating circuit of radar transceiver apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3327101A JPH05134030A (en) | 1991-11-13 | 1991-11-13 | Phase operating circuit of radar transceiver apparatus |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05134030A true JPH05134030A (en) | 1993-05-28 |
Family
ID=18195306
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3327101A Pending JPH05134030A (en) | 1991-11-13 | 1991-11-13 | Phase operating circuit of radar transceiver apparatus |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05134030A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7538719B2 (en) * | 2007-07-09 | 2009-05-26 | Mitsubishi Electric Corporation | Mixer circuit and radar transceiver |
-
1991
- 1991-11-13 JP JP3327101A patent/JPH05134030A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7538719B2 (en) * | 2007-07-09 | 2009-05-26 | Mitsubishi Electric Corporation | Mixer circuit and radar transceiver |
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