JPH0513350A - Substrate processing device - Google Patents
Substrate processing deviceInfo
- Publication number
- JPH0513350A JPH0513350A JP18925391A JP18925391A JPH0513350A JP H0513350 A JPH0513350 A JP H0513350A JP 18925391 A JP18925391 A JP 18925391A JP 18925391 A JP18925391 A JP 18925391A JP H0513350 A JPH0513350 A JP H0513350A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- helium gas
- gas supply
- substrate
- exhaust
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体ウェハなどの基
板に成膜処理やドライエッチング処理などを行う基板処
理装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate processing apparatus for performing a film forming process or a dry etching process on a substrate such as a semiconductor wafer.
【０００２】[0002]
【従来の技術】半導体ウェハに成膜処理やドライエッチ
ング処理などを施す半導体ウェハの処理装置は、真空室
内にプラズマ発生装置や反応ガス供給装置などの半導体
ウェハ処理機構を設置し、これに対向させて設置した載
置台などと称される保持台上に処理対象の半導体ウェハ
を保持する構成となっている。ほとんどの処理について
は、処理中の半導体ウェハの表面温度がエッチングや成
膜など処理の進行速度に大きな影響を及ぼすことから、
ウェハ表面の全域にわたって均一な特性のチップを作成
するうえで、いかにしてウェハの全表面の温度を均一に
保つかが主要な技術的課題の一つとなっている。2. Description of the Related Art A semiconductor wafer processing apparatus for performing film formation processing, dry etching processing, etc. on a semiconductor wafer has a semiconductor wafer processing mechanism such as a plasma generator or a reaction gas supply apparatus installed in a vacuum chamber and facing it. The semiconductor wafer to be processed is held on a holding table called a mounting table or the like. For most processes, the surface temperature of the semiconductor wafer being processed has a large effect on the speed of processing such as etching and film formation.
One of the major technical problems in producing chips with uniform characteristics over the entire surface of the wafer is how to keep the temperature of the entire surface of the wafer uniform.
【０００３】上記半導体ウェハの表面温度を均一化する
ための典型的な手法を用いた処理装置として、図５に示
すように、真空室１内に設置された保持台２上にこの保
持台との間に空隙Ｓを形成するようにほぼ円盤状の半導
体ウェハＷを保持させ、この空隙Ｓ内にヘリウムガスを
循環させるものが知られている。すなわち、保持台２の
中心部分にはヘリウムガスの供給口２ａが形成されてお
り、ここに接続されたガス供給管３ａを通して流量制御
装置４ａの制御のもとにガスボンベ５ａからヘリウムガ
スが空隙Ｓ内に供給される。一方、保持台２の周辺部に
は円周方向に離散して複数の排気口２ｂが互いに連通状
態で形成されており、この連通部分に接続された排出管
３ｂを通して圧力制御弁４ｂの制御のもとに排気装置５
ｂによってヘリウムガスの排気が行われる。なお、６ｂ
は圧力計である。As a processing apparatus using a typical method for making the surface temperature of the semiconductor wafer uniform, as shown in FIG. 5, the holding table is mounted on a holding table 2 installed in a vacuum chamber 1. It is known that a substantially disk-shaped semiconductor wafer W is held so as to form a space S between them, and helium gas is circulated in the space S. That is, a helium gas supply port 2a is formed in the central portion of the holding table 2, and the helium gas is supplied from the gas cylinder 5a to the space S through the gas supply pipe 3a connected thereto under the control of the flow rate control device 4a. Supplied within. On the other hand, a plurality of exhaust ports 2b are formed in the peripheral portion of the holding table 2 so as to be dispersed in the circumferential direction so as to communicate with each other, and control of the pressure control valve 4b is performed through a discharge pipe 3b connected to this communicating portion. Originally exhaust device 5
Helium gas is exhausted by b. 6b
Is a pressure gauge.
【０００４】供給口２ａから空隙Ｓ内に供給されたヘリ
ウムガスは、保持台２の周辺部分に放射状に拡散し、排
気口２ｂと排気管３ｂと圧力制御弁４ｂとを通して排気
装置５ｂに排出される。なお、煩雑化を避けるために図
示は省略してあるが、通常、保持台２にはヒータや冷媒
の管路などを埋設されており、保持台２に対して温度制
御が行われる。従って、保持台２と半導体ウェハＷとの
間で、相互の接触面を通しての伝導による伝熱と、ウェ
ハ裏面と保持台表面との間の輻射による伝熱とに加え
て、ヘリウムガスの対流による伝熱が行われ、両者間の
熱的結合を密にすることによりウェハ表面温度の均一化
が図られる。The helium gas supplied from the supply port 2a into the space S is radially diffused in the peripheral portion of the holding table 2 and is discharged to the exhaust device 5b through the exhaust port 2b, the exhaust pipe 3b and the pressure control valve 4b. It Although not shown in order to avoid complication, the holding table 2 is usually embedded with a heater, a refrigerant conduit, etc., and the temperature of the holding table 2 is controlled. Therefore, in addition to the heat transfer by conduction through the mutual contact surfaces between the holding table 2 and the semiconductor wafer W and the heat transfer by radiation between the back surface of the wafer and the surface of the holding table, convection of helium gas is caused. Heat transfer is performed, and the thermal coupling between the two is made dense, so that the wafer surface temperature is made uniform.
【０００５】[0005]
【発明が解決しようとする課題】本発明者の実験結果に
よれば、図５に示した従来の処理装置を用いて処理を行
った場合、ウェハの全表面にわたって十分均一な特性の
チップを形成できないことが判明した。処理済みの半導
体ウェハについてエッチングの進み具合や成膜の厚みか
ら推定すると、図６の等温線図に示すように、処理中の
半導体ウェハの周辺部分が中心部分に比べて高温になる
と共に、この周辺部分についてもオリエンテーションフ
ラットと称される切り欠き部分が最も高温になるような
温度分布が形成されていることが判明した。周辺部分が
高温になるのは、ヘリウムガスの圧力が外周部分からの
漏れなどにより中心から外周へ向けて徐々に低下するよ
うに分布するためとみられる。また、同じ周辺部分でも
オリエンテーションフラットの近傍が高温になる理由と
しては、保持台から半導体ウェハへの伝熱とヘリウムガ
スによる冷却が一様に行われにくいことなども考えられ
る。いずれにしても、図５に示した従来の処理装置で
は、図６に示すようにウェハの全表面にわたる不均一な
温度分布が形成されるという問題がある。According to the experimental results of the present inventor, when processing is performed using the conventional processing apparatus shown in FIG. 5, chips having sufficiently uniform characteristics are formed over the entire surface of the wafer. It turns out that you can't. Estimating from the progress of etching and the thickness of film formation on the processed semiconductor wafer, as shown in the isotherm diagram of FIG. 6, the peripheral portion of the semiconductor wafer being processed becomes hotter than the central portion and It was also found that a temperature distribution called an orientation flat was formed in the peripheral portion so that the cutout portion had the highest temperature. It is considered that the peripheral part becomes hot because the pressure of the helium gas is distributed so as to gradually decrease from the center to the outer part due to leakage from the outer peripheral part. Further, even in the same peripheral portion, the reason why the temperature near the orientation flat becomes high may be that heat transfer from the holding table to the semiconductor wafer and cooling by helium gas are not uniformly performed. In any case, the conventional processing apparatus shown in FIG. 5 has a problem that an uneven temperature distribution is formed over the entire surface of the wafer as shown in FIG.
【０００６】[0006]
【課題を解決するための手段】本発明に係わる半導体ウ
ェハの処理装置によれば、基板と保持台の間に形成され
た空隙にガスを供給し排出するガス供給・排出機構が、
流量及び圧力の少なくとも一方が個別に制御可能な複数
の系統に分離されている。According to the semiconductor wafer processing apparatus of the present invention, the gas supply / exhaust mechanism for supplying and exhausting gas to the gap formed between the substrate and the holding table is provided.
At least one of the flow rate and the pressure is separated into a plurality of systems that can be individually controlled.
【０００７】本発明の好適な一実施例によれば、上記複
数のガス供給・排出機構の複数の系統は、上記空隙の中
央部に形成された排気口を共有する共通の排出経路を有
している。According to a preferred embodiment of the present invention, the plural systems of the plural gas supply / exhaust mechanisms have a common exhaust passage formed in the central portion of the gap and sharing an exhaust port. ing.
【０００８】本発明の更に好適な一実施例によれば、分
離された複数のガス供給・排出系統は、処理対象の半導
体ウェハの中心部分と、オリエンテーションフラットの
近傍の周辺部分と、このオリエンテーションフラットの
近傍を除く周辺部分のそれぞれに接する３個の領域にガ
スを供給し排出する３個の系統に分離されている。According to a further preferred embodiment of the present invention, the plurality of separated gas supply / exhaust systems include a central portion of a semiconductor wafer to be processed, a peripheral portion near the orientation flat, and the orientation flat. Is divided into three systems that supply and discharge gas to the three regions in contact with each of the peripheral portions except the vicinity.
【０００９】[0009]
【実施例】図１は本発明の一実施例に係わる半導体ウェ
ハの処理装置の主要部分の構成を示す概念図であり、図
２は図１の保持台２０の平面図である。図１において保
持台２０とこれに保持された半導体ウェハＷについては
図２のＺーＺ’断面図で示されている。図１，図２にお
いて、１０は真空室、１１は真空室１０の排気系に連な
る排気管、１２はプラズマ発生用の高周波電力が供給さ
れる電極板、１３は反応ガス源に連なる真空室１０内へ
の反応ガス供給管、２０は保持台、２１，２２，２３は
ヘリウムガスの供給口、２４はヘリウムガスの排気口、
３１，３２，３３はヘリウムガスの供給管、３４はヘリ
ウムガスの排気管、４１，４２，４３は流量制御装置、
４４はヘリウムガスのボンベ、５１は圧力制御弁、５２
は排気装置、５３は圧力計である。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a conceptual view showing the structure of the main part of a semiconductor wafer processing apparatus according to an embodiment of the present invention, and FIG. 2 is a plan view of a holding table 20 of FIG. In FIG. 1, the holding table 20 and the semiconductor wafer W held by the holding table 20 are shown in the ZZ ′ sectional view of FIG. 1 and 2, 10 is a vacuum chamber, 11 is an exhaust pipe connected to the exhaust system of the vacuum chamber 10, 12 is an electrode plate to which high-frequency power for plasma generation is supplied, and 13 is a vacuum chamber 10 connected to a reaction gas source. A reaction gas supply pipe into the inside, 20 is a holding stand, 21, 22, 23 are helium gas supply ports, 24 is a helium gas exhaust port,
Reference numerals 31, 32 and 33 are helium gas supply pipes, 34 is a helium gas exhaust pipe, 41, 42 and 43 are flow rate control devices,
44 is a helium gas cylinder, 51 is a pressure control valve, 52
Is an exhaust device, and 53 is a pressure gauge.
【００１０】煩雑化を避けるために、図示は省略する
が、通常、保持台２０には温度制御のためのヒータや冷
媒の管路などが埋設されている。従って、保持台２０と
半導体ウェハＷとの間で、相互の接触面を通しての伝導
による伝熱と、ウェハ裏面と保持台表面との間の輻射に
よる伝熱とに加えて、ヘリウムガスの対流による伝熱が
行われる。Although not shown in the drawings, in order to avoid complication, the holding table 20 is usually embedded with a heater for temperature control, a pipeline for a coolant, and the like. Therefore, in addition to the heat transfer by conduction through the mutual contact surfaces between the holding table 20 and the semiconductor wafer W and the heat transfer by radiation between the back surface of the wafer and the surface of the holding table, convection of helium gas is caused. Heat transfer takes place.
【００１１】真空室１０内に設置される保持台２０は、
図６に示した半導体ウェハ表面の等温線の分布状況に対
応して、図２の平面図に点線で囲んで示すように、半導
体ウェハの中心部分に対向する領域Ａと、オリエンテー
ションフラットの近傍の周辺部分に対向する領域Ｂと、
このオリエンテーションフラットの近傍を除く周辺部分
に対向する領域Ｃの３個の領域に分割されており、各領
域ごとにヘリウムガスの供給流量や供給圧力を個別に制
御できるようになっている。すなわち、中心部分の領域
Ａ内には保持台内部で互いに連通する複数のヘリウムガ
スの供給口２１が形成されており、この連通部分にはヘ
リウムガス供給管３１が接続される。同様に、領域Ｂに
は保持台内部で互いに連通する複数のヘリウムガスの供
給口２２が形成されると共に領域Ｃには保持台内部で互
いに連通する複数のヘリウムガスの供給口２３が形成さ
れており、それぞれの連通部分にはヘリウムガス供給管
３１と３２が接続される。更に、保持台２０の中心部分
には斜線を付して示す共通の排気口２４が形成されてお
り、これにヘリウムガスの排気管３４が接続されてい
る。The holding table 20 installed in the vacuum chamber 10 is
Corresponding to the distribution of isotherms on the surface of the semiconductor wafer shown in FIG. 6, as shown in the plan view of FIG. 2 surrounded by a dotted line, a region A facing the central portion of the semiconductor wafer and a region near the orientation flat are provided. A region B facing the peripheral portion,
It is divided into three regions, that is, a region C facing the peripheral portion excluding the vicinity of the orientation flat, and the supply flow rate and the supply pressure of the helium gas can be individually controlled for each region. That is, a plurality of helium gas supply ports 21 that communicate with each other inside the holding table are formed in the region A of the central portion, and a helium gas supply pipe 31 is connected to this communication portion. Similarly, a plurality of helium gas supply ports 22 communicating with each other inside the holding table are formed in the region B, and a plurality of helium gas supply ports 23 communicating with each other inside the holding table are formed in the region C. Helium gas supply pipes 31 and 32 are connected to the respective communicating portions. Further, a common exhaust port 24 shown by hatching is formed in the central portion of the holding table 20, and an exhaust pipe 34 for helium gas is connected to this.
【００１２】ヘリウムガスのボンベ４４から適宜な減圧
弁や分岐を通して供給されるヘリウムガスは、流量計と
適宜な形式の絞り弁との組合せから成る流量制御装置４
１，４２，４３によって、所定の流量となるように個別
の制御を受けながらヘリウムガス供給管３１，３２，３
３に送られ、保持台の供給口２１，２２，２３から半導
体ウェハＷと保持台２０との間に形成される空隙Ｓの領
域Ａ，Ｂ，Ｃ内に供給される。供給口２１，２２，２３
のそれぞれから領域Ａ，Ｂ，Ｃ内に供給されたヘリウム
ガスの一部は、保持台２０の中心部分に形成された排気
口２４と排気管３４と圧力制御弁５１とを通して排気装
置５２に排出される。The helium gas supplied from the helium gas cylinder 44 through an appropriate pressure reducing valve or branch is composed of a flow meter and a throttle valve of an appropriate type in combination.
Helium gas supply pipes 31, 32, 3 while being individually controlled by 1, 42, 43 so as to have a predetermined flow rate.
3, and is supplied from the supply ports 21, 22, and 23 of the holding table into the regions A, B, and C of the space S formed between the semiconductor wafer W and the holding table 20. Supply ports 21, 22, 23
A part of the helium gas supplied into the regions A, B, and C from each of the above is discharged to the exhaust device 52 through the exhaust port 24, the exhaust pipe 34, and the pressure control valve 51 formed in the central portion of the holding table 20. To be done.
【００１３】領域Ａ内の排気口２４近傍の圧力は、半導
体ウェハＷに対する処理の種類によって決まる真空室１
０内の圧力にも依存するが、典型的には、0.1 Ｔorr か
ら２Ｔorr 程度までの範囲の適宜な値になるように圧力
計５３と圧力制御弁５１とによって制御される。また、
供給口２１，２２，２３から供給するヘリウムガスの流
量は、ドライエッチングや成膜などの半導体ウェハに対
する処理の種類やこの半導体ウェハの径などに応じ最適
値が定められ、流量制御装置４１，４２，４３によって
個別に制御される。一例として、最初の試行段階では、
各分割領域のそれぞれに供給するヘリウムガスの流量
が、オリエンテーションフラット近傍の領域については
最大となり、中心部分の領域については最小になるよう
に設定することができ、これにより半導体ウェハの表面
の温度を均一に保つように設定できる。The pressure in the area A near the exhaust port 24 is determined by the type of processing performed on the semiconductor wafer W.
Although it also depends on the pressure within 0, it is typically controlled by the pressure gauge 53 and the pressure control valve 51 so as to be an appropriate value in the range of about 0.1 Torr to about 2 Torr. Also,
The flow rate of the helium gas supplied from the supply ports 21, 22, and 23 is set to an optimum value according to the type of processing on the semiconductor wafer such as dry etching and film formation and the diameter of this semiconductor wafer. , 43 individually controlled. As an example, in the first trial phase,
The flow rate of the helium gas supplied to each of the divided regions can be set to be maximum in the region near the orientation flat and minimum in the region in the central portion, whereby the temperature of the surface of the semiconductor wafer can be set. Can be set to keep uniform.
【００１４】図３は、本発明の他の実施例に係わる半導
体ウェハの処理装置の主要部分の構成を示す概念図であ
る。本図において図１，図２と同一の参照符号を付した
構成要素はこれらの図に関して既に説明した構成要素と
同一のものであるから、これらの構成要素については重
複する説明を省略する。６１，６２，６３は圧力制御
弁、６４は流量制御装置、６５，６６，６７は圧力計で
ある。FIG. 3 is a conceptual diagram showing a structure of a main part of a semiconductor wafer processing apparatus according to another embodiment of the present invention. In this figure, the components denoted by the same reference numerals as those in FIGS. 1 and 2 are the same as the components already described with reference to these figures, and therefore duplicated description of these components is omitted. Reference numerals 61, 62 and 63 are pressure control valves, 64 is a flow rate control device, and 65, 66 and 67 are pressure gauges.
【００１５】この実施例によれば、ヘリウムガスの供給
系ではヘリウムガス供給管３１，３２，３３を介して空
隙Ｓの領域Ａ，Ｂ，Ｃ内に供給する冷却用のヘリウムガ
スの流量を制御する代わりに圧力制御弁６５，６６，６
７によって各領域内への供給圧力を制御すると共に、排
気系では共通の排気口２４と排気管３４と流量制御装置
６４とによって排出ヘリウムガスの総流量を制御する構
成となっている。According to this embodiment, in the helium gas supply system, the flow rate of the cooling helium gas supplied into the regions A, B, C of the void S via the helium gas supply pipes 31, 32, 33 is controlled. Pressure control valves 65, 66, 6 instead of
7, the supply pressure to each area is controlled, and in the exhaust system, the total exhaust helium gas flow rate is controlled by the common exhaust port 24, exhaust pipe 34, and flow rate control device 64.
【００１６】図４は、本発明の更に他の実施例に係わる
半導体ウェハの処理装置の構成を保持台の平面図によっ
て示すものであり、図１，図２と同一の参照符号を付し
た構成要素はこれらの図に関して既に説明した構成要素
と同一のものである。斜線を付した開口２１’は領域Ａ
内に形成された排気口であり、同様に、斜線を付した開
口２２’，２３’はそれぞれ領域ＢとＣ内に形成された
複数の排気口である。FIG. 4 is a plan view showing the structure of a semiconductor wafer processing apparatus according to still another embodiment of the present invention, which is designated by the same reference numerals as those in FIGS. 1 and 2. The elements are the same as those already described with respect to these figures. The hatched opening 21 'is the area A
Similarly, the hatched openings 22 'and 23' are a plurality of exhaust openings formed in the regions B and C, respectively.
【００１７】領域Ａ内に形成された単一の排気口２１’
はこの領域からの排気のためだけに設置されている第１
の排気管に接続される。また、領域Ｂ内に形成された２
個の排気口２２’は保持体２０の内部で相互に連通して
おりこの連通部分がこの領域からの排気のためだけに設
置されている第２の排気管に接続されている。同様に、
領域Ｃ内に形成された８個の排気口２３’は保持体２０
の内部で相互に連通しておりこの連通部分がこの領域か
らの排気のためだけに設置されている第３の排気管に接
続されている。上記第１，第２，第３の排気管は、いず
れも、図１の排気管３４の場合と同様に、圧力制御弁を
介して排気装置に接続されており、制御された圧力のも
とでヘリウムガスの排出が行われる。このように、空隙
Ｓ内に形成された３個の領域Ａ，Ｂ，Ｃに対して、個別
に冷却用ヘリウムガスの供給と排出が行われる。A single exhaust port 21 'formed in region A
The first is installed only for exhaust from this area
Connected to the exhaust pipe. In addition, 2 formed in the region B
The individual exhaust ports 22 'are in communication with each other inside the holding body 20, and this communication part is connected to a second exhaust pipe which is installed only for exhausting from this region. Similarly,
The eight exhaust ports 23 ′ formed in the area C are the holder 20.
In communication with each other and this connecting part is connected to a third exhaust pipe which is provided only for the exhaust from this region. Each of the first, second, and third exhaust pipes is connected to the exhaust device via a pressure control valve, as in the case of the exhaust pipe 34 of FIG. The helium gas is discharged at. In this way, the cooling helium gas is individually supplied to and discharged from the three regions A, B, and C formed in the space S.
【００１８】上記、３個の領域Ａ，Ｂ，Ｃが互いに隔離
された空間を形成するように、各領域の境界を半導体ウ
ェハの底面に達する高さの、あるいはこの底面よりも僅
かに低い高さの壁面によって仕切ることにより、半導体
ウェハの温度制御性を更に高める構成とすることもでき
る。The height at which the boundary of each region reaches the bottom surface of the semiconductor wafer or slightly lower than this bottom surface so that the three areas A, B and C form a space isolated from each other. It is also possible to adopt a configuration in which the temperature controllability of the semiconductor wafer is further enhanced by partitioning by the wall surface of the wall.
【００１９】以上、保持台と半導体ウェハとの間に形成
される空隙を３個の領域に分割する構成を例示したが、
処理の種類やウェハの径に応じて２個あるいは、４個以
上の適宜な個数の領域に分割することもできる。The structure in which the gap formed between the holding table and the semiconductor wafer is divided into three regions has been described above.
Depending on the type of processing and the diameter of the wafer, it may be divided into two or four or more regions of an appropriate number.
【００２０】また、ガスとしてヘリウムガスを使用する
構成を例示したが、半導体ウェハの処理に対する影響の
点で問題がなければ、窒素ガスなど他ののガスを使用す
ることもできる。Although the configuration using helium gas as the gas has been illustrated, other gas such as nitrogen gas may be used if there is no problem in the influence on the processing of the semiconductor wafer.
【００２１】更に、被処理基板として半導体ウェハを例
示したが、これに限らず液晶デバイスなどを形成するた
めの角形ガラス基板などであってもよい。Further, although the semiconductor wafer is exemplified as the substrate to be processed, the substrate is not limited to this, and may be a rectangular glass substrate for forming a liquid crystal device or the like.
【００２２】[0022]
【発明の効果】本発明に係わる基板処理装置は、保持台
と基板との間に形成される空隙内にガスを供給し排出す
る機構を流量や圧力を個別に制御可能な複数の系統に分
離する構成であるから、基板の表面温度の均一性の向上
が可能となり、これに伴い基板表面の全域にわたって均
一な処理を実現できるという効果が奏される。In the substrate processing apparatus according to the present invention, the mechanism for supplying and discharging the gas in the gap formed between the holding table and the substrate is separated into a plurality of systems capable of individually controlling the flow rate and pressure. With this configuration, it is possible to improve the uniformity of the surface temperature of the substrate, and with this, it is possible to achieve uniform processing over the entire surface of the substrate.
【図１】本発明の一実施例に係わる半導体ウェハの処理
装置の主要部分の構成を示す概念図であり、保持台と半
導体ウェハについては断面図で示したものである。FIG. 1 is a conceptual diagram showing a configuration of a main part of a semiconductor wafer processing apparatus according to an embodiment of the present invention, in which a holder and a semiconductor wafer are shown in a sectional view.
【図２】図１の保持台２０の平面図である。FIG. 2 is a plan view of a holding table 20 of FIG.
【図３】本発明の他の実施例に係わる半導体ウェハの処
理装置の主要部分の構成を示す概念図であり、保持台と
半導体ウェハについては断面図で示したものである。FIG. 3 is a conceptual diagram showing a configuration of a main part of a semiconductor wafer processing apparatus according to another embodiment of the present invention, in which a holder and a semiconductor wafer are shown in a sectional view.
【図４】本発明の更に他の実施例に係わる半導体ウェハ
の処理装置の構成を保持台の平面図によって示したもの
である。FIG. 4 is a plan view of a holding table showing a configuration of a semiconductor wafer processing apparatus according to still another embodiment of the present invention.
【図５】従来技術に係わる半導体ウェハの処理装置の主
要部分の構成を示す概念図であり、保持台と半導体ウェ
ハについては断面図で示したものである。FIG. 5 is a conceptual diagram showing a configuration of a main part of a semiconductor wafer processing apparatus according to a conventional technique, in which a holder and a semiconductor wafer are shown in a sectional view.
【図６】図５に示した従来装置について実験的に得られ
た処理中の半導体ウェハ表面の温度分布の一例を示す等
温線図である。6 is an isotherm diagram showing an example of a temperature distribution on a semiconductor wafer surface during processing, which is experimentally obtained for the conventional apparatus shown in FIG.
10 真空室
20 保持台
Ｓ 保持台２０と半導体ウェハＷとの間に形
成された空隙
Ａ 半導体ウェハの中心部分に接する箇所に
形成された空隙Ｓの分割領域
Ｂ 半導体ウェハのオリエンテーションフラ
ットの近傍に接する箇所に形成された空隙Ｓの分割領域
Ｃ 半導体ウェハのオリエンテーションフラ
ットから離れた周辺部分に接する箇所に形成された空隙
Ｓの分割領域
21,22,23 領域Ａ, Ｂ，Ｃ内に形成されたヘリウム
ガスの供給口
21’ 22 ’23’領域Ａ, Ｂ，Ｃ内に形成されたヘリウム
ガスの排気口
24 領域Ａの中心部分に形成されたヘリウム
ガスの排気口
31,32,33 ヘリウムガスの供給管
34 ヘリウムガスの排気管
41,42,43 流量制御装置
51 圧力制御弁
52 排気装置10 Vacuum chamber 20 Holding base S Void A formed between the holding base 20 and the semiconductor wafer W Divided area B of the void S formed at a position in contact with the central portion of the semiconductor wafer B Contacting near the orientation flat of the semiconductor wafer Divided area C of void S formed at a location Divided area 21,22,23 of void S formed at a location in contact with a peripheral portion of the semiconductor wafer away from the orientation flat Helium formed in areas A, B, and C Gas supply port 21 '22' 23 'Exhaust port for helium gas formed in regions A, B and C 24 Exhaust port for helium gas formed in the central part of region A 31, 32, 33 Supply of helium gas Pipe 34 Helium gas exhaust pipe 41, 42, 43 Flow control device 51 Pressure control valve 52 Exhaust device
Claims (3)
持する保持台と、この保持台を収容する真空室と、この
真空室内に設置される基板処理機構と、前記保持台とこ
れに保持された前記処理対象の基板との間に形成される
空隙内にガスを供給し排出するガス供給・排出機構とを
備えた基板処理装置において、 前記ガス供給・排出機構は、流量及び圧力の少なくとも
一方が個別に制御可能な複数の系統に分離されたことを
特徴とする半導体ウェハの処理装置。1. A holder for holding a semiconductor wafer or other substrate to be processed, a vacuum chamber for housing the holder, a substrate processing mechanism installed in the vacuum chamber, the holder and the holder held by the holder. In a substrate processing apparatus comprising a gas supply / exhaust mechanism for supplying and exhausting gas into a gap formed between the substrate to be processed, the gas supply / exhaust mechanism is at least one of flow rate and pressure. Is separated into a plurality of systems that can be individually controlled.
統は、前記空隙の中央部に形成された排気口を共有する
共通の排出経路を有することを特徴とする請求項１記載
の基板処理装置。2. The substrate according to claim 1, wherein the plurality of systems of the plurality of gas supply / discharge mechanisms have a common discharge path that shares an exhaust port formed in a central portion of the gap. Processing equipment.
り、前記ガス供給・排出機構の複数の系統は、処理対象
の半導体ウェハの中心部分と、オリエンテーションフラ
ットの近傍の周辺部分と、このオリエンテーションフラ
ットの近傍を除く周辺部分のそれぞれに接する３個の領
域にガスを供給し排出する３個の系統から成ることを特
徴とする請求項１又は２記載の基板処理装置。3. The substrate to be processed is a semiconductor wafer, and the plurality of systems of the gas supply / exhaust mechanism includes a central portion of the semiconductor wafer to be processed, a peripheral portion near the orientation flat, and the orientation flat. 3. The substrate processing apparatus according to claim 1, wherein the substrate processing apparatus comprises three systems for supplying and exhausting gas to three regions in contact with each of the peripheral portions except the vicinity thereof.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03189253A JP3086970B2 (en) | 1991-07-03 | 1991-07-03 | Substrate processing equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03189253A JP3086970B2 (en) | 1991-07-03 | 1991-07-03 | Substrate processing equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0513350A true JPH0513350A (en) | 1993-01-22 |
| JP3086970B2 JP3086970B2 (en) | 2000-09-11 |
Family
ID=16238199
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP03189253A Expired - Fee Related JP3086970B2 (en) | 1991-07-03 | 1991-07-03 | Substrate processing equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3086970B2 (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000001002A1 (en) * | 1998-06-30 | 2000-01-06 | Tokyo Electron Limited | Method and apparatus for vacuum processing |
| US7186298B2 (en) * | 1995-09-01 | 2007-03-06 | Asm America, Inc. | Wafer support system |
| JP2007227773A (en) * | 2006-02-24 | 2007-09-06 | Tokyo Electron Ltd | Heat treatment apparatus of substrate, and heat treatment method of substrate |
| JP2008130888A (en) * | 2006-11-22 | 2008-06-05 | Dainippon Screen Mfg Co Ltd | Thermal treatment equipment |
| JP2009188162A (en) * | 2008-02-06 | 2009-08-20 | Tokyo Electron Ltd | Substrate placing table, substrate processing apparatus, and temperature control method for substrate to be processed |
| JP2013520833A (en) * | 2010-02-24 | 2013-06-06 | ビーコ・インストゥルメンツ・インコーポレイテッド | Processing method and processing apparatus using temperature distribution control device |
| JP2013135110A (en) * | 2011-12-27 | 2013-07-08 | Panasonic Corp | Plasma processing method and plasma processing apparatus for substrate |
| JP2013229001A (en) * | 2012-03-29 | 2013-11-07 | Ckd Corp | Fluid control system and fluid control method |
| US9273413B2 (en) | 2013-03-14 | 2016-03-01 | Veeco Instruments Inc. | Wafer carrier with temperature distribution control |
| WO2016076201A1 (en) * | 2014-11-12 | 2016-05-19 | 東京エレクトロン株式会社 | Stage and substrate processing device |
| JP2017183381A (en) * | 2016-03-29 | 2017-10-05 | 日本特殊陶業株式会社 | Retainer |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01178138U (en) * | 1988-06-08 | 1989-12-20 |
-
1991
- 1991-07-03 JP JP03189253A patent/JP3086970B2/en not_active Expired - Fee Related
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7186298B2 (en) * | 1995-09-01 | 2007-03-06 | Asm America, Inc. | Wafer support system |
| WO2000001002A1 (en) * | 1998-06-30 | 2000-01-06 | Tokyo Electron Limited | Method and apparatus for vacuum processing |
| US6401359B1 (en) | 1998-06-30 | 2002-06-11 | Tokyo Electron Limited | Vacuum processing method and apparatus |
| JP2007227773A (en) * | 2006-02-24 | 2007-09-06 | Tokyo Electron Ltd | Heat treatment apparatus of substrate, and heat treatment method of substrate |
| JP2008130888A (en) * | 2006-11-22 | 2008-06-05 | Dainippon Screen Mfg Co Ltd | Thermal treatment equipment |
| US8696862B2 (en) | 2008-02-06 | 2014-04-15 | Tokyo Electron Limited | Substrate mounting table, substrate processing apparatus and substrate temperature control method |
| JP2009188162A (en) * | 2008-02-06 | 2009-08-20 | Tokyo Electron Ltd | Substrate placing table, substrate processing apparatus, and temperature control method for substrate to be processed |
| JP2013520833A (en) * | 2010-02-24 | 2013-06-06 | ビーコ・インストゥルメンツ・インコーポレイテッド | Processing method and processing apparatus using temperature distribution control device |
| US9324590B2 (en) | 2010-02-24 | 2016-04-26 | Veeco Instruments Inc. | Processing methods and apparatus with temperature distribution control |
| US10002805B2 (en) | 2010-02-24 | 2018-06-19 | Veeco Instruments Inc. | Processing methods and apparatus with temperature distribution control |
| JP2013135110A (en) * | 2011-12-27 | 2013-07-08 | Panasonic Corp | Plasma processing method and plasma processing apparatus for substrate |
| JP2013229001A (en) * | 2012-03-29 | 2013-11-07 | Ckd Corp | Fluid control system and fluid control method |
| US9273413B2 (en) | 2013-03-14 | 2016-03-01 | Veeco Instruments Inc. | Wafer carrier with temperature distribution control |
| WO2016076201A1 (en) * | 2014-11-12 | 2016-05-19 | 東京エレクトロン株式会社 | Stage and substrate processing device |
| JP2017183381A (en) * | 2016-03-29 | 2017-10-05 | 日本特殊陶業株式会社 | Retainer |
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