JPH05129638A - Optical semiconductor device - Google Patents

Optical semiconductor device

Info

Publication number
JPH05129638A
JPH05129638A JP3052515A JP5251591A JPH05129638A JP H05129638 A JPH05129638 A JP H05129638A JP 3052515 A JP3052515 A JP 3052515A JP 5251591 A JP5251591 A JP 5251591A JP H05129638 A JPH05129638 A JP H05129638A
Authority
JP
Japan
Prior art keywords
semiconductor device
optical
photoelectric conversion
optical semiconductor
conversion region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3052515A
Other languages
Japanese (ja)
Inventor
Shoichi Hanatani
昌一 花谷
Hitoshi Nakamura
均 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3052515A priority Critical patent/JPH05129638A/en
Publication of JPH05129638A publication Critical patent/JPH05129638A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide a wide-band optical semiconductor device that can be easily coupled to an optical fiber or rod lens. CONSTITUTION:An optical semiconductor device includes a semiconductor substrate 2 on which photoelectric regions 3, 4, and 5 are laminated in the direction of optical input or output. The substrate is provided with a photocoupling section having an alignment hole 0 into which an external optical conductor 14 fits tightly. This structure facilitates the alignment of the optical semiconductor device with an optical conductor, decreases the time for production and adjustments, and improves yield. In addition, wide-band applications can be easily realized if the external optical conductor is a rod lens or an end-processed lens.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は光半導体装置、更に詳し
く言えば、光信号を電気信号に変換又は電気信号を光信
号に変換、又はその両方を行なう部分をもつ光半導体装
置の外部光導体とを結合する半導体装置の構造に関する
ものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical semiconductor device, and more particularly, to an external optical conductor of an optical semiconductor device having a portion for converting an optical signal into an electric signal, an electric signal into an optical signal, or both. The present invention relates to the structure of a semiconductor device that couples with.

【0002】[0002]

【従来の技術】長距離、大容量の光ファイバー伝送シス
テムは近年、急速に普及し、現在では1.6Gb/s、
1.7Gb/s光伝送システムが実用化されている。さ
らにシステムの大容量化を目差し、10Gb/s光伝送
が可能な光伝送システムの研究開発が活発になってい
る。一方、今までの光伝送方式と異なり、光の波として
の性質を利用して大容量光伝送を行なう、いわゆるコヒ
ーレント光伝送システムの研究開発も近年活発になって
いる。このような大容量光伝送システムに用いる受光素
子には数GHz以上の広帯域特性が要求される。そのた
めに素子の低容量化が必須と成り、受光器、発光器の小
受光径化及び寄生容量の低減が重要技術課題と成ってい
る。例えば、エレクトロニクス・レターズ 第24巻、
第2号(1988年)、第109頁から第110頁(El
ectronics Letters vol.24,No.2(1988) pp109-110)に
は、受光素子の小型化、広帯域化を目的としたモノリシ
ック集積化マイクロレンズ付き裏面光入射の受光素子が
記載されている。
2. Description of the Related Art Long-distance, large-capacity optical fiber transmission systems have rapidly spread in recent years, and are now 1.6 Gb / s.
A 1.7 Gb / s optical transmission system has been put to practical use. Further, with a view to increasing the capacity of the system, research and development of an optical transmission system capable of 10 Gb / s optical transmission have become active. On the other hand, unlike the conventional optical transmission systems, research and development of so-called coherent optical transmission systems, which perform large-capacity optical transmission by utilizing the property of light waves, have been active in recent years. A light receiving element used in such a large capacity optical transmission system is required to have a wide band characteristic of several GHz or more. Therefore, it is essential to reduce the capacitance of the device, and it is an important technical issue to reduce the light receiving diameter of the light receiver and the light emitter and to reduce the parasitic capacitance. For example, Electronics Letters Vol. 24,
Issue 2 (1988), pages 109-110 (El
ectronics Letters vol.24, No.2 (1988) pp109-110) describes a backside light incident light receiving element with a monolithic integrated microlens for the purpose of downsizing and widening the band of the light receiving element.

【0003】図2は上記文献に記載された受光素子の構
造を示す。n(+)-InP基板上2にn-InPバッファ層3(膜
厚1.5μm, n=1015/cm3)、n-InGaAs光吸収層4
(膜厚1.9μm, n=1015/cm3)、n-InPキャッ
プ層5(膜厚1.0μm, n=1016/cm3)を積層し、
Zn拡散によりpn接合を形成後、化学エッチングによ
り、約15μmφのメサ構造を形成する。パッシベーショ
ン用Sin膜10、Au系pコンタクト層8、同じくA
u系nコンタクト層7を設けた後、基板2を約70μm
まで薄く研磨し、Arイオン・ビーム・エッチングによ
りマイクロレンズ11を形成している。マイクロレンズ
11の焦点距離は、光吸収層4に合わせて、曲率半径役
55μmである。さらにマイクロレンズ11の上にSi
N反射防止膜12を設けられている。この結果、バイア
ス電圧10Vで暗電流30nA、素子容量20fF、量
子効率84%、3dBカットオフ周波数17.7GHz
の低暗電流、低素子容量、高帯域特性を得ている。さら
にマイクロレンズを集積化したことにより光信号入力フ
ァイバのアライメント許容度がレンズのない平坦な素子
の場合の約3倍の33μmを実現している。
FIG. 2 shows the structure of the light receiving element described in the above document. On the n (+)-InP substrate 2, an n-InP buffer layer 3 (film thickness 1.5 μm, n = 10 15 / cm 3 ), an n-InGaAs light absorption layer 4
(Film thickness 1.9 μm, n = 10 15 / cm 3 ) and n-InP cap layer 5 (film thickness 1.0 μm, n = 10 16 / cm 3 ) are laminated,
After forming a pn junction by Zn diffusion, a mesa structure of about 15 μmφ is formed by chemical etching. Sin film 10 for passivation, Au-based p contact layer 8, also A
After providing the u-type n contact layer 7, the substrate 2 is approximately 70 μm thick.
Then, the microlenses 11 are formed by Ar ion beam etching. The focal length of the microlens 11 has a radius of curvature of 55 μm in accordance with the light absorption layer 4. In addition, Si on the microlens 11
An N antireflection film 12 is provided. As a result, at a bias voltage of 10 V, a dark current of 30 nA, an element capacitance of 20 fF, a quantum efficiency of 84%, a 3 dB cutoff frequency of 17.7 GHz.
It has low dark current, low element capacitance and high bandwidth characteristics. Furthermore, by integrating microlenses, the alignment tolerance of the optical signal input fiber is 33 μm, which is about three times that of a flat element without a lens.

【0004】[0004]

【発明が解決しようとする課題】上記従来技術は、素子
容量低減による高速応答特性の改善、即ち広帯域化につ
いて十分考慮され、素子容量低減に伴う小受光径化によ
る光ファイバのアライメント許容度を大きくするため、
マイクロレンズを集積化することで、レンズがない場合
に比べ3倍の許容度を得ている。 しかし、従来光通信
で用いられている50μm以上のアライメント許容度を
持つ受光素子に比べ十分とは言えず、モジュール化工程
での歩留まりが低下する。又、コヒーレント光通信のバ
ランスドレシーバや将来のマルチアクセス光インターコ
ネクトのように多数の光半導体素子の集積化が必要な場
合、上記従来技術では素子の加工が複雑になる上、光フ
ァイバとのアライメントも複雑かつ時間を要するものと
なるため、素子加工工程、モジュール化工程での生産時
間、調整時間の増加、及び歩留まり低下などの問題があ
る。本発明の目的はこの様な問題を解決し、外部光導体
とのアライメント許容度の大きい光半導体装置を提供す
ることである。本発明の他の目的は外部光導体とのアラ
イメント許容度の大きく、同じに受光素子の小受光径化
により広帯域化可能な光半導体装置を提供することにあ
る。
In the above-mentioned prior art, the improvement of high-speed response characteristics by reducing the element capacitance, that is, the wide band is sufficiently taken into consideration, and the alignment tolerance of the optical fiber is increased by the reduction of the light receiving diameter accompanying the reduction of the element capacitance. In order to
By integrating the microlenses, the tolerance is tripled as compared with the case without the lenses. However, it cannot be said to be sufficient as compared with a light receiving element having an alignment tolerance of 50 μm or more which is used in the conventional optical communication, and the yield in the modularization process decreases. Further, when integration of a large number of optical semiconductor elements is required, such as a balanced receiver for coherent optical communication or a future multi-access optical interconnect, the above-mentioned conventional technology complicates the processing of the elements, and further, alignment with an optical fiber. Since it is complicated and time-consuming, there are problems such as an increase in production time in the element processing step and the modularization step, adjustment time, and a decrease in yield. An object of the present invention is to solve such a problem and to provide an optical semiconductor device having a large alignment tolerance with an external optical conductor. Another object of the present invention is to provide an optical semiconductor device which has a large tolerance for alignment with an external optical conductor and which can also have a wide band by similarly reducing the light receiving diameter of the light receiving element.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するため
本発明では、光電変換領域を有する半導体積層構造をも
つ光半導体装置の基板上に、光結合用ファイバ又はロッ
トレンズ等の外部光導体端部を密着挿入可能な、上記光
導体端部と整合する光結合用穴を設けた。ここで外部光
導体端部と整合する光結合用穴を設ける好ましい的形態
としては、先球加工光ファイバ又はロッドレンズの焦点
が上記光電変換領域にくるような深さを持つ穴を設け
る。
In order to achieve the above object, according to the present invention, an external optical conductor end such as an optical coupling fiber or a lot lens is provided on a substrate of an optical semiconductor device having a semiconductor laminated structure having a photoelectric conversion region. An optical coupling hole is provided so that the portion can be closely inserted and is aligned with the end portion of the light guide. Here, as a preferred form of providing the optical coupling hole that is aligned with the end portion of the external light guide, a hole having a depth such that the focal point of the spherical optical fiber or rod lens comes to the photoelectric conversion region is provided.

【0006】[0006]

【作用】本発明の光半導体装置は、半導体基板に光結合
用の外部光導体端部を密着挿入可能な、穴を有し、光結
合系の焦点が光電変換領域に来るように調整されている
ので、アライメントが不要でかつ安定した光結合が得ら
れる。光結合用の穴は通常の半導体プロセスで用いるマ
スクパターンのエッチングにより形成されるので上記光
電変換領域との位置合わせ精度は2〜3μm程度で収ま
る。先球加工光ファイバのビームウェストは5μm程度
であるから光電変換領域径は10μmあれば十分であ
る。したがって、受光径10μmの低容量高速受光素子
で簡便かつ安定した光結合が実現される。
The optical semiconductor device of the present invention has a hole into which an end portion of an external photoconductor for optical coupling can be closely inserted into a semiconductor substrate, and is adjusted so that the focus of the optical coupling system comes to the photoelectric conversion region. Therefore, alignment is not required and stable optical coupling can be obtained. Since the hole for optical coupling is formed by etching a mask pattern used in a normal semiconductor process, the alignment accuracy with the photoelectric conversion region is about 2 to 3 μm. Since the beam waist of the spherical optical fiber is about 5 μm, the photoelectric conversion region diameter of 10 μm is sufficient. Therefore, simple and stable optical coupling can be realized with a low-capacity high-speed light receiving element having a light receiving diameter of 10 μm.

【0007】[0007]

【実施例】以下、本発明の実施例について説明する。 実施例1 図1は、本発明による光半導体装置の第1の一実施例の
構成を示す断面図で、外部光導体である先球加工ファイ
バの端部を装着した状態示す。先球加工ファイバの端部
は図示のように、先端中心部が部分球面をなし、部分球
面からファイバ径にいたるテーパ部を持つ。まず、光半
導体装置の製造について説明する。表面が(100)面
のn(+)−InP基板状2((+)は高濃度であることを示
す、以下同じ)にMOCVD法によりn−InPバッフ
ァ層3(膜厚1.2μm,n=1015/cm3)、n−
InGaAs光吸収層4(膜厚2.0μm,n=1015
/cm3)、n−InPキャップ層5(膜厚1.0μ
m,n=1016/cm3)を順次積層し、Zn熱拡散層
6を設け、pn接合を形成後、化学エッチングにより、
約10μmのメサ構造を形成した。なお、上記各層は気
相成長法や液相成長法更にはMBE法によって形成する
こともできる。次いで、CVD法によりパッシベーショ
ン用SiN膜10、Au系コンタクト層8、同じくAu
系nコンタクト層7を真空蒸着により設けた。それぞ
れ、オーミック接続をとるために、pコンタクト層8の
材料にはTi/Au,nコンタクト層7の材料にはTi
/Auを用いた。なお、AuGeNi,AuZnのよう
なp,n両性半導体ともオーミック接合のとれる電極材
料を用いることもできる。パッシベーション膜は素子の
暗電流特性からSi,PSG,SiO2等の材料から選
べば良い。
EXAMPLES Examples of the present invention will be described below. Example 1 FIG. 1 is a cross-sectional view showing the configuration of a first example of an optical semiconductor device according to the present invention, showing a state in which an end portion of a front-end processed fiber which is an external light guide is mounted. As shown in the drawing, the end portion of the front-end processed fiber has a center portion of the tip which is a partial spherical surface, and has a taper portion from the partial spherical surface to the fiber diameter. First, manufacturing of the optical semiconductor device will be described. An n-InP buffer layer 3 (having a thickness of 1.2 .mu.m, n) was formed on the n (+)-InP substrate 2 2 ((+) indicates a high concentration, the same applies below) by MOCVD. = 10 15 / cm 3 ), n-
InGaAs light absorption layer 4 (film thickness 2.0 μm, n = 10 15
/ Cm 3 ), n-InP cap layer 5 (film thickness 1.0 μm
m, n = 10 16 / cm 3 ) are sequentially laminated, a Zn thermal diffusion layer 6 is provided, and after a pn junction is formed, chemical etching is performed.
A mesa structure of about 10 μm was formed. The above layers can also be formed by a vapor phase growth method, a liquid phase growth method, or an MBE method. Then, the SiN film 10 for passivation, the Au-based contact layer 8 and the Au film are similarly formed by the CVD method.
The system n contact layer 7 was provided by vacuum evaporation. In order to make ohmic contact, the material of the p contact layer 8 is Ti / Au, and the material of the n contact layer 7 is Ti, respectively.
/ Au was used. It is also possible to use an electrode material such as AuGeNi or AuZn, which can form an ohmic contact with both p and n amphoteric semiconductors. The passivation film may be selected from materials such as Si, PSG and SiO 2 depending on the dark current characteristics of the device.

【0008】次に光結合用穴14の形成についてのべ
る。上記工程を経た基板2の下側(図面の上側)を約1
50μm程度まで研磨した後、10μmφ径のマスク穴
パターンを利用して化学エッチングにより光ファイバの
出力光のビームウェストが光電変換領域に来るように深
さ約120μm程度までの穴14を形成する。エッチン
グ液に異方性がほとんどない臭素系を用い、ほぼ円形状
の穴を形成した。この場合、サイドエッチングの効果に
よりメサ角約60度となり、穴2の最大直径は約140
μmφとなっている。これにより、60度にテーパ角で
研磨した先球加工ファイバ13の先端部14は上記結合
用穴の形状と整合するので、上記ファイバを穴14に挿
入後の外部導体である光ファイバをグラツキなく、安定
に光半導体装置に固定できる。なお、エッチングはイオ
ンミリング法などでも可能である。この後、反射防止膜
12を基板2裏面に設け、基板2での反射による光結合
の劣化を防止する。
Next, the formation of the optical coupling hole 14 will be described. The lower side (upper side of the drawing) of the substrate 2 that has undergone the above steps is about 1
After polishing to about 50 μm, a hole 14 having a depth of about 120 μm is formed by chemical etching using a mask hole pattern having a diameter of 10 μm so that the beam waist of the output light of the optical fiber comes to the photoelectric conversion region. A substantially circular hole was formed by using a bromine-based etchant with almost no anisotropy. In this case, the mesa angle is about 60 degrees due to the side etching effect, and the maximum diameter of the hole 2 is about 140 degrees.
It is μmφ. As a result, the tip end portion 14 of the front-end processed fiber 13 polished to a taper angle of 60 degrees matches the shape of the coupling hole, so that the optical fiber, which is the outer conductor after the fiber is inserted into the hole 14, does not fluctuate. , Can be stably fixed to the optical semiconductor device. The etching can also be performed by an ion milling method or the like. After that, an antireflection film 12 is provided on the back surface of the substrate 2 to prevent deterioration of optical coupling due to reflection on the substrate 2.

【0009】電極7、8を介して受光素子を逆バイアス
状態にする。先球加工ファイバ13からの光信号(波長
は1.3又は1.55μm帯)は、端部14のレンズの
作用によって収束され、光吸収層4にビームウェストが
くるように反射防止膜12を介して入射され、InGa
As光吸収層4で吸収、電気信号に変換されたる。変換
された電気信号は、電極8より外部に送出される。本実
施例で得られた特性は、素子容量15fF、暗電流20
nA、量子効率85%、3dBカットオフ周波数19G
Hzの高速、低雑音動作である。光結合は先球加工ファ
イバを所定の結合穴に挿入するだけで、極めて簡単でか
つ安定に量子効率85%が得られた。
The light receiving element is set in a reverse bias state via the electrodes 7 and 8. An optical signal (wavelength is 1.3 or 1.55 μm band) from the front-end processing fiber 13 is converged by the action of the lens of the end portion 14, and the antireflection film 12 is provided so that the beam waist comes to the light absorption layer 4. Incident through InGa
It is absorbed by the As light absorption layer 4 and converted into an electric signal. The converted electric signal is sent to the outside from the electrode 8. The characteristics obtained in this example are as follows: element capacitance 15 fF, dark current 20.
nA, quantum efficiency 85%, 3dB cutoff frequency 19G
It is a high speed, low noise operation of Hz. Optical coupling was extremely simple and stable, and a quantum efficiency of 85% was obtained simply by inserting a processed spherical fiber into a predetermined coupling hole.

【0010】実施例2 第3図は本発明による光半導体装置の他の実施例の構成
を示す断面図である。本実施例は、裏面入射方式受光素
子で適用する光波長にたいし基板での損失が無視できな
い場合、特に有効である。図1に示した実施例とは違っ
てp(+)−InP基板の場合、 波長1.3〜1.55
μmの吸収はn−InP基板の10倍以上あるため、従
来例のようにマイクロレンズ状にすると実効的に基板厚
が厚くなるため光信号の損失が増加し、量子効率の低下
を招く。本実施例は光電変換部がPN接合部でのなだれ
増倍機構を利用した増倍層と光吸収層からなる受光部か
らなり、上記増倍層が超格子構造で構成されている。
Embodiment 2 FIG. 3 is a sectional view showing the structure of another embodiment of the optical semiconductor device according to the present invention. This embodiment is particularly effective when the loss in the substrate is not negligible with respect to the light wavelength applied in the back-illuminated type light receiving element. Unlike the embodiment shown in FIG. 1, the p (+)-InP substrate has a wavelength of 1.3 to 1.55.
Since the absorption of μm is 10 times or more that of the n-InP substrate, the substrate thickness is effectively increased when the microlens shape is used as in the conventional example, so that the loss of the optical signal is increased and the quantum efficiency is lowered. In this embodiment, the photoelectric conversion part is composed of a light-receiving part consisting of a multiplication layer utilizing an avalanche multiplication mechanism at a PN junction part and a light absorption layer, and the multiplication layer has a superlattice structure.

【0011】表面が(100)面のp(+)−InP基板
19の上に、MBE法によりBeドープp−InAlA
s層20(膜厚1.0μm,n=2×1018/c
3)、InGaAs光吸収層21(膜厚1.8μm,
n=2×1015/cm3)、InAlAs電界緩和層2
2(膜厚0.2μm,n=5×1016/cm3)22、
InAlAs/InGaAs超格子倍増層23(膜厚
0.6μm,n<1×1015/cm、15nmInAl
As障壁層、15nmInGaAs倍増層、周期2
0)、Siドープn−InAlAs層24(膜厚1.0
μm,n=2×1018/cm3)、InGaAsコンタ
クト層25(膜厚0.2μm,n=5×1018/c
3)を順次連続成長させた後、重クロム酸系エッチン
グ液を用いて、約10μmφ径のメサ構造を形成する。
n電極26、p電極27を真空蒸着する。ここでは図1
の実施例同様、n電極材料にはAuZn/Pt/Au、
p電極材料にはTi/Auを用いた。メサ部にポリミイ
ド絶縁保護膜28を、基板19の裏面には反射防止膜2
9をそれぞれ設けた。外部光導体端部がロットレンズで
構成され、整合光結合用穴14は、ロットレンズ端部が
密着挿入できるように円柱状に構成されている。円柱状
の穴の深さは、ロットレンズの出力光のビームウェスト
が光電変換領域に来るように深さ設定されている。本実
施例はでえられたアバランシェ増倍受光素子の特性は、
素子容量20fF、暗電流40nA、量子効率75%、
増倍率10で3dBカットオフ周波数10GHz以上の
高速、低雑音である。
On a p (+)-InP substrate 19 whose surface is a (100) plane, Be-doped p-InAlA is formed by the MBE method.
s layer 20 (film thickness 1.0 μm, n = 2 × 10 18 / c
m 3 ), the InGaAs light absorption layer 21 (film thickness 1.8 μm,
n = 2 × 10 15 / cm 3 ), InAlAs electric field relaxation layer 2
2 (film thickness 0.2 μm, n = 5 × 10 16 / cm 3 ) 22,
InAlAs / InGaAs superlattice multiplication layer 23 (film thickness 0.6 μm, n <1 × 10 15 / cm, 15 nm InAl
As barrier layer, 15 nm InGaAs multiplication layer, period 2
0), Si-doped n-InAlAs layer 24 (film thickness 1.0
μm, n = 2 × 10 18 / cm 3 ), InGaAs contact layer 25 (film thickness 0.2 μm, n = 5 × 10 18 / c)
m 3 ) are successively and successively grown, and then a dichromic acid-based etching solution is used to form a mesa structure having a diameter of about 10 μmφ.
The n electrode 26 and the p electrode 27 are vacuum-deposited. Figure 1 here
In the same manner as in the above example, the n-electrode material is AuZn / Pt / Au,
Ti / Au was used as the p electrode material. A polymide insulating protective film 28 is formed on the mesa portion, and an antireflection film 2 is formed on the back surface of the substrate 19.
9 are provided respectively. The end portion of the external light guide is formed of a lot lens, and the matching light coupling hole 14 is formed in a cylindrical shape so that the end portion of the lot lens can be closely inserted. The depth of the cylindrical hole is set so that the beam waist of the output light of the lot lens comes to the photoelectric conversion region. The characteristics of the avalanche multiplication light receiving element obtained in this example are
Element capacity 20 fF, dark current 40 nA, quantum efficiency 75%,
It has a multiplication factor of 10 and is high-speed and low-noise with a 3 dB cutoff frequency of 10 GHz or higher.

【0012】実施例3 図4は、本発明による光半導体装置の更に他の実施例の
構成を示す断面図である。本実施例は図1に示した実施
例の受光素子を回路基板15に組み込んだものである。
図において、図1に示した実施例の受光素子と同一部分
には同一の番号を付している。回路基板15は、受光素
子へバイアスを供給し電気信号を取り出すための電子回
路パターン16を有し、電子回路パターン16と受光素
子の電気接続部にハンダバンプ17を設けてある。受光
素子をフェイスダウンして図示のように回路基板15上
に置き、ホットプレートで加熱しハンダバンプを溶かし
て受光素子と回路パターン16と接続固定する。光ファ
イバー(図示せず)の先端部は光結合用穴14に目視に
より挿入固定する。このように本発明の構造を採用する
ことにより、電気接続用のボンディングワイヤを不要と
するフリップチップ実装が可能となり、寄生インダクタ
ンスの影響による高周波特性の劣化がなく、かつ外部光
導体と容易に光結合が得られる光半導体装置を実現し
た。
Embodiment 3 FIG. 4 is a sectional view showing the structure of still another embodiment of the optical semiconductor device according to the present invention. In this embodiment, the light receiving element of the embodiment shown in FIG. 1 is incorporated in the circuit board 15.
In the figure, the same parts as those of the light receiving element of the embodiment shown in FIG. The circuit board 15 has an electronic circuit pattern 16 for supplying a bias to the light receiving element and taking out an electric signal, and a solder bump 17 is provided at an electric connection portion between the electronic circuit pattern 16 and the light receiving element. The light receiving element is placed face down on the circuit board 15 as shown in the figure, and is heated by a hot plate to melt the solder bumps, and the light receiving element and the circuit pattern 16 are connected and fixed. The tip of an optical fiber (not shown) is visually inserted and fixed in the optical coupling hole 14. By adopting the structure of the present invention in this way, flip chip mounting that does not require a bonding wire for electrical connection is possible, high-frequency characteristics are not deteriorated by the influence of parasitic inductance, and an optical signal can be easily transmitted to an external optical conductor. We have realized an optical semiconductor device that can achieve coupling.

【0013】以上の説明は本発明が特に有効な受光素子
の例について説明したが、本発明は上記実施例に限定さ
れるものではない。受光素子と他の半導体装置と組み合
わせたもの、光電変換領域が発光部を構成する場合も含
む。即ち図5のように半導体集積回路装置に受光素子用
の光結合穴30、発光素子用の光結合穴31等同種又は
異種の素子用の複数の光結合穴30、31を設け、半導
体集積回路装置内にこれらの素子30、31と結合した
電気回路32、33を形成する場合、図6のように半導
体装置が光共振器をもつレーザ素子で、光結合穴31が
半導体レーザ素子の発光面近くに形成される場合、図7
のように光半導体の光出力部がレーザの発光面部から離
れた位置にある場合等含む。
Although the above description has described an example of a light receiving element to which the present invention is particularly effective, the present invention is not limited to the above embodiment. A combination of a light receiving element and another semiconductor device and a case where the photoelectric conversion region constitutes a light emitting unit are also included. That is, as shown in FIG. 5, the semiconductor integrated circuit device is provided with a plurality of optical coupling holes 30 and 31 for the same or different types of elements such as an optical coupling hole 30 for a light receiving element and an optical coupling hole 31 for a light emitting element. When forming the electric circuits 32 and 33 combined with these elements 30 and 31 in the device, the semiconductor device is a laser device having an optical resonator and the optical coupling hole 31 is a light emitting surface of the semiconductor laser device as shown in FIG. If it is formed nearby, it is shown in FIG.
As described above, the case where the optical output portion of the optical semiconductor is located away from the light emitting surface portion of the laser is included.

【発明の効果】本発明によれば、光半導体装置の半導体
積層構造内に設けられた光電変換領域に光信号を結合さ
せるための光学系用の穴を上記光学系の形状にあうよう
に半導体基板側に設けることにより、安定した光結合が
得られ、このため光結合のトレランスのために光電変換
領域を必要最小限の大きさにすることができ、素子特性
向上、特に高速化を促進できる。光結合系が基板裏側に
来るのでフリップチップ実装が可能となり、発光器、受
光器で良好な高速応答性が実現できる。又、光結合の位
置合わせなど調整がなくなるので歩留まりが向上する。
これは素子が複数ある場合、特に有利である。
According to the present invention, a semiconductor is formed so that a hole for an optical system for coupling an optical signal to a photoelectric conversion region provided in a semiconductor laminated structure of an optical semiconductor device matches the shape of the optical system. By providing it on the substrate side, stable optical coupling can be obtained. Therefore, the photoelectric conversion region can be made to have the minimum necessary size for the tolerance of the optical coupling, and the device characteristics can be improved, especially the speedup can be promoted. .. Since the optical coupling system is on the back side of the substrate, flip-chip mounting is possible, and good high-speed response can be realized in the light emitter and the light receiver. Further, since adjustments such as alignment of optical coupling are eliminated, the yield is improved.
This is particularly advantageous when there are multiple elements.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による光半導体素子の一実施例の断面図
である。
FIG. 1 is a sectional view of an embodiment of an optical semiconductor device according to the present invention.

【図2】従来の受半導体光素子の一実施例の断面図であ
る。
FIG. 2 is a cross-sectional view of an example of a conventional semiconductor light receiving device.

【図3】本発明による光半導体素子の他の実施例の断面
図である。
FIG. 3 is a sectional view of another embodiment of an optical semiconductor device according to the present invention.

【図4】本発明による光半導体装置の一実施例の断面図
である。
FIG. 4 is a sectional view of an embodiment of an optical semiconductor device according to the present invention.

【図5】本発明による光半導体装置の他の実施例の断面
図である。
FIG. 5 is a cross-sectional view of another embodiment of the optical semiconductor device according to the present invention.

【図6】本発明による発光素子の一実施例の断面図であ
る。
FIG. 6 is a sectional view of an embodiment of a light emitting device according to the present invention.

【図7】本発明による発光素子の他の実施例の断面図で
ある。
FIG. 7 is a cross-sectional view of another embodiment of a light emitting device according to the present invention.

【符号の説明】[Explanation of symbols]

0、30、31…整合光結合穴、 2、19…p(+)−InP基板、 3…InPバッファ層、 4、21…InGaAs吸収層、 5…InPキャップ層、 6…Zn拡散層、 7…nコンタクト層、 8…pコンタクト層 9…ボンディング−パッド、 10…SiN層、 12、29…SiN反射防止膜、 13…光ファイバ、 14…外部光導体端部、 15…回路基板、 16…回路パターン、 17…半田バンプ、 20…p−InAlAs層、 22…InAlAsP層、 23…InAlAs/InGaAs超格子増倍層、 24…InAlAs層、 25…InGaAsコンタクト層、 26…n電極、 26…p電極、 28…ポリミイド層。 0, 30, 31 ... Matching optical coupling hole, 2, 19 ... p (+)-InP substrate, 3 ... InP buffer layer, 4 ... 21 InGaAs absorption layer, 5 ... InP cap layer, 6 ... Zn diffusion layer, 7 ... n contact layer, 8 ... p contact layer 9 ... bonding-pad, 10 ... SiN layer, 12, 29 ... SiN antireflection film, 13 ... optical fiber, 14 ... external optical conductor end portion, 15 ... circuit board, 16 ... Circuit pattern, 17 ... Solder bump, 20 ... p-InAlAs layer, 22 ... InAlAsP layer, 23 ... InAlAs / InGaAs superlattice multiplication layer, 24 ... InAlAs layer, 25 ... InGaAs contact layer, 26 ... N electrode, 26 ... P Electrode, 28 ... Polymide layer.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H01S 3/18 9170−4M ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Office reference number FI technical display location H01S 3/18 9170-4M

Claims (10)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板上に積層され、光入力又は光
出力方向が積層方向にたいし垂直である光電変換領域を
有する半導体積層構造において、上記基板の光結合部に
外部光導体端部と密着挿入可能な整合光結合用穴を設け
たことを特徴とする光半導体装置。
1. A semiconductor laminated structure having a photoelectric conversion region laminated on a semiconductor substrate and having a light input or light output direction perpendicular to the laminating direction, and an external photoconductor end portion at an optical coupling portion of the substrate. An optical semiconductor device comprising a matching optical coupling hole which can be closely inserted.
【請求項2】 請求項1記載の光半導体装置において、
上記光結合用穴が先球加工光ファイバのテーパ角と等し
いテーパ状、かつ、深さが上記光電変換領域に上記先球
加工光ファイバの焦点がくるように加工され、光電変換
領域が受光部であることを特徴とする光半導体装置。
2. The optical semiconductor device according to claim 1,
The optical coupling hole has a taper shape equal to the taper angle of the spherical optical fiber, and is processed so that the focal point of the optical optical fiber is in the photoelectric conversion region, and the photoelectric conversion region is a light receiving portion. An optical semiconductor device characterized by:
【請求項3】 請求項1記載の光半導体装置において、
上記光結合用穴が上記ドットレンズ径と等しい内径を持
ち、かつ、深さが上記光電変換領域に上記ロットレンズ
の焦点がくるように加工され、光電変換領域が受光部で
あることを特徴とする光半導体装置。
3. The optical semiconductor device according to claim 1,
The hole for light coupling has an inner diameter equal to the diameter of the dot lens, and is processed so that the depth of the lot lens is in the photoelectric conversion region, and the photoelectric conversion region is a light receiving portion. Optical semiconductor device.
【請求項4】 請求項1、2又は3記載の光半導体装置
において、上記光電変換領域がPN接合に逆バイアス電
圧を印加したPIN構造の受光部であることを特徴とす
る光半導体装置。
4. The optical semiconductor device according to claim 1, 2 or 3, wherein the photoelectric conversion region is a light receiving portion having a PIN structure in which a reverse bias voltage is applied to a PN junction.
【請求項5】 請求項1、2又は3記載の光半導体装置
において、上記光電変換領域がPN接合部でのなだれ増
倍機構を利用した増倍層と光吸収層からなる受光部であ
ることを特徴とする光半導体装置。
5. The optical semiconductor device according to claim 1, 2 or 3, wherein the photoelectric conversion region is a light-receiving portion including a multiplication layer and a light absorption layer utilizing an avalanche multiplication mechanism at a PN junction portion. An optical semiconductor device characterized by:
【請求項6】 請求項5記載の光半導体装置において、
上記増倍層が超格子構造であることを特徴とする光半導
体装置。
6. The optical semiconductor device according to claim 5,
An optical semiconductor device, wherein the multiplication layer has a superlattice structure.
【請求項7】 請求項1ないし6記載の光半導体装置が
電子回路を搭載した他の半導体装置にフリップ・チップ
実装されたことを特徴とする光半導体装置。
7. An optical semiconductor device, wherein the optical semiconductor device according to claim 1 is flip-chip mounted on another semiconductor device having an electronic circuit mounted thereon.
【請求項8】 半導体基板上に、光入力又は光出力方向
が積層方向にたいし垂直である光電変換領域を少なくと
も1つと、上記光電変換領域と関連する電子回路を有す
る光半導体装置において、 上記半導体基板の光電変換領域に対応する光結合部に外
部光導体端部と密着挿入可能な整合光結合用穴を設けた
ことを特徴とする光半導体装置。
8. An optical semiconductor device having at least one photoelectric conversion region in which a light input or light output direction is perpendicular to a stacking direction on a semiconductor substrate and an electronic circuit related to the photoelectric conversion region, An optical semiconductor device, characterized in that a matching optical coupling hole that can be closely inserted into an end portion of an external photoconductor is provided in an optical coupling portion corresponding to a photoelectric conversion region of a semiconductor substrate.
【請求項9】 請求項8記載の光半導体装置において、
上記光結合用穴が先球加工光ファイバのテーパ角と等し
いテーパ状、かつ、深さが上記光電変換領域に上記先球
加工光ファイバの焦点がくる深さに加工され、光電変換
領域が受光部であることを特徴とする光半導体装置。
9. The optical semiconductor device according to claim 8,
The optical coupling hole has a taper shape equal to the taper angle of the spherical optical fiber, and the depth is processed so that the photoelectric conversion region has a focal point of the optical fiber, and the photoelectric conversion region receives light. Optical semiconductor device.
【請求項10】 請求項8記載の光半導体装置におい
て、上記光結合用穴が上記ドットレンズ径と等しい内径
を持ち、かつ、深さが上記光電変換領域に上記ロットレ
ンズの焦点がくるように加工され、光電変換領域が受光
部であることを特徴とする光半導体装置。
10. The optical semiconductor device according to claim 8, wherein the optical coupling hole has an inner diameter equal to the dot lens diameter, and the depth is such that the lot lens is focused on the photoelectric conversion region. An optical semiconductor device, which is processed and has a photoelectric conversion region as a light receiving portion.
JP3052515A 1991-03-18 1991-03-18 Optical semiconductor device Pending JPH05129638A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3052515A JPH05129638A (en) 1991-03-18 1991-03-18 Optical semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3052515A JPH05129638A (en) 1991-03-18 1991-03-18 Optical semiconductor device

Publications (1)

Publication Number Publication Date
JPH05129638A true JPH05129638A (en) 1993-05-25

Family

ID=12916876

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3052515A Pending JPH05129638A (en) 1991-03-18 1991-03-18 Optical semiconductor device

Country Status (1)

Country Link
JP (1) JPH05129638A (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06237016A (en) * 1993-02-09 1994-08-23 Matsushita Electric Ind Co Ltd Optical fiber module and manufacture thereof
JP2001223369A (en) * 2000-02-09 2001-08-17 Opnext Japan Inc End face incident waveguide type semiconductor photodetector and light receiving module using the same
JP2004096091A (en) * 2002-07-12 2004-03-25 Ricoh Co Ltd Compound optical element, its manufacturing method, and optical transceiver
US7520680B2 (en) 2003-02-06 2009-04-21 Seiko Epson Corporation Light-receiving element, manufacturing method for the same, optical module, and optical transmitting device
US7150568B2 (en) 2003-02-06 2006-12-19 Seiko Epson Corporation Light-receiving element, manufacturing method for the same, optical module, and optical transmitting device
JP2005340339A (en) * 2004-05-25 2005-12-08 Mitsubishi Electric Corp Semiconductor element
JP4609430B2 (en) * 2004-10-25 2011-01-12 三菱電機株式会社 Avalanche photodiode
JPWO2006046276A1 (en) * 2004-10-25 2008-05-22 三菱電機株式会社 Avalanche photodiode
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US9640703B2 (en) 2004-10-25 2017-05-02 Mitsubishi Electric Corporation Avalanche photodiode
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JP2010251649A (en) * 2009-04-20 2010-11-04 Hitachi Ltd Surface emitting laser module and surface light receiving module
US8755423B2 (en) 2009-04-20 2014-06-17 Hitachi, Ltd. Surface emitting laser module and vertical illuminated photodiode module
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