JPH049989U - - Google Patents

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例を示す帰線期間の映
像表示処理回路のブロツク図、第２図は同第１図
のタイミング図、第３図は走査電子ビームの軌跡
図である。 １はアナログ／デイジタル変換器、２は1/2分
周器、３，５は書き込み／読み出しメモリ、４，
６はカウンタ、７は制御回路、８はデイジタル／
アナリグ変換器、Ｄは出力映像信号、Ｅは水平偏
向電流、ＣＫはクロツク信号である。 FIG. 1 is a block diagram of a video display processing circuit during a retrace period showing an embodiment of the present invention, FIG. 2 is a timing diagram of FIG. 1, and FIG. 3 is a trajectory diagram of a scanning electron beam. 1 is an analog/digital converter, 2 is a 1/2 frequency divider, 3 and 5 are write/read memories, 4,
6 is a counter, 7 is a control circuit, 8 is a digital/
In the analog converter, D is the output video signal, E is the horizontal deflection current, and CK is the clock signal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ＣＲＴデイスプレイ等の映像信号回路において
、入力映像信号をクロツク信号の1/2分周器出力
のサンプリング周波数でＡ／Ｄ変換し、同Ａ／Ｄ
変換出力データを第１のＲＡＭと第２のＲＡＭと
に接続し、前記クロツク信号を制御回路と第１の
カウンタ及び第２のカウンタとに接続し、同制御
回路出力の制御信号を同第１のカウンタ及び第２
のカウンタに接続し、同第１のカウンタ及び第２
のカウンタ出力のアドレスデータを前記制御回路
出力の書き込み／読み出し制御信号と共にそれぞ
れ前記第１のＲＡＭと第２のＲＡＭとに接続し、
同第１のＲＡＭと第２のＲＡＭ出力データとをＤ
／Ａ変換器に接続し、前記クロツク信号のサンプ
リング周波数でアナログ映像信号に変換し、水平
帰線期間に映像をＣＲＴ画面に表示することを特
徴とする受像機。 In a video signal circuit such as a CRT display, the input video signal is A/D converted at the sampling frequency of the 1/2 frequency divider output of the clock signal, and
Conversion output data is connected to a first RAM and a second RAM, the clock signal is connected to a control circuit, a first counter and a second counter, and a control signal output from the control circuit is connected to a first and second RAM. counter and second
the first counter and the second counter.
connecting the address data of the counter output to the first RAM and the second RAM, respectively, together with the write/read control signal of the control circuit output;
The same first RAM and second RAM output data are
1. A television receiver, which is connected to a /A converter, converts it into an analog video signal at the sampling frequency of the clock signal, and displays the video on a CRT screen during a horizontal retrace period.