JPH0497518A - Manufacture of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To prevent generation of a leak current between n<+> diffused layer and P type substrate by opening a contact hole, forming a high concentration As layer n<++> at the bottom thereof and then selectively burying the contact hole through reaction of a gas including a metal and the Si substrate. CONSTITUTION:After forming an n<+> diffused layer 2 on a P type silicon substrate 1, an insulating layer 4 is deposited and a contact hole 5 is opened. Next, As is implanted to the bottom of the hole 5 to form an n<++> layer 3. Thereafter, WF6 is selectively deposited in the contact hole 5 through reaction of a gas reduced by Ar(argon) and SiH4. In this case, reduction of silicon occurs simultaneously with reduction of silane and tungsten W is grown into the Si substrate. With formation of As layer of 4X10<28>cm<-3> or more, amount of growth can be reduced to about 40nm or less and generation of a leak current between the layer 2 and substrate 1 due to the growth of W into the Si substrate can also be prevented. Thereby, disconnection is never generated even when electrodes and wirings are formed and reliability such as electromigration resistance can also be improved.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は微細な電極コンタクトや多層配線を有する高密
度大集積な半導体集積回路の製造方法に関するものであ
も 従来の技術 ］ンタクトに電極を形成する場合において、通常はＡＩ
等の金属が用いられ　その堆積方法としてスパッタ方が
採用されていも　しかしながらコンタクトの幅が１μｍ
以下の微細寸法になるとＡＩのスパッタ法ではコンタク
トの側面にほとんどＡｌが付着しなくなも　その結！　
　ＡＩ配線が断線したりエレクトロマイグレーション耐
性等の信頼性に重要な問題が発生することにな４　これ
を防ぐためにコンタクトに選択的にメタルを埋め込む技
術があａ　この例を以下に示も 第３図に従来の製造法を用いて、微細コンタクトに選択
的に金属を埋め込んだ場合の断面図を示も　同図におい
て、　１はシリコンｐ型基板　２はｎ０拡散凰　４は絶
縁！！、５はコンタクトホーＪｋ６はコンタクトホール
に埋め込まれたタングステンであム　これは以下に述べ
る製法により形成され九　埋板　絶縁層４にコンタクト
ホール５を開孔したａＷＦｓ（６弗化タングステン）の
シラン還元反応 ２ＷＦ・　　＋　　　３ＳｉＨｎ　　　→　　２Ｗ＋５
ｉｐ４　＋　　６Ｈ＊　　（反応１） を利用してタングステン６をコンタクトホール５に選択
的に成長させも　この反応は絶縁層４上では起こらず、
コンタクトホールには基板のＳｉが露出しているので選
択成長が可能とな本発明が解決しようとする課題 しかしながらこの方法では以下に述べる問題点が生じム
　ＷをＷＦ・のシラン還元で成長させる線間時にＳｉ基
板１とＷＦ・が反応するシリコン還元反応 ２ＷＦ＠　　　＋　　　３Ｓｉ　　　→　　２Ｗ　　　
＋　　　３ＳｉＦ、　　（反応２） が起こり下地Ｓｉが消費されてその代わりにＷが基板内
部方向に成長すも　この反応はコンタクト抵抗を下げる
ために必要である力（Ｗが内部まで成長しすぎると第３
図中のＷとｐ型基板との距離Ｔが短くなり、ｎ０拡散層
とｐ型基板との間でリーク電流が発生し　回路動作の不
都合等の重大な問題が生じも 本発明は従来の欠点を鑑みてなされたもので、簡単な方
法でコンタクトホール底面での下地ＳｉとＷＦ、の反応
を抑制することによってｎ′−拡散層とｐ型基板間のリ
ーク電流が発生しないようにすることを目的としていも 課題を解決するための手段 本発明は上記問題を解決するた亀　コンタクトホールを
開孔した微　コンタクトホールの底面に高濃度のＡｓ層
ｎ°°を形成すも　その喪　金属を含んだガスをＳｉ基
板と反応させ、選択的にコンタクトホールを埋め込むも
のであも 作用 本発明は上記の方法により、コンタクトホール埋め込み
時にＳｉ基板内部へのＷの成長を制御Ｌｎ゛拡散層とｐ
型基板間のリーク電流を防ぐ効果があも 実施例 第１図は本発明の実−施例において、金属（タングステ
ン）を埋め込んだ微細なコンタクトの断面図であも　同
図において１はシリコン基板　２はｎ０拡散［３はｎ”
Ｍ！、　４は絶縁ＷＬ　５はコンタクトホールｋ　６は
コンタクトホールに埋め込まれたタングステンであム 第２図を用いて製造法を説明すム　第２図（ａ）：１　
シリコンｎ基板中 絶縁層４を堆積し　コンタクトホール５を開孔したもの
であム　第２図（ｂ）において、コンタクトホール底面
に表面濃度が４×１０１０１Ｃ’になるようにＡｓを注
入Ｌｎ−層３を形成すも　第２図（Ｃ）においてＷＦ６
をＡｒ（アルゴン）で希釈したガスを５ｉＨａと反応さ
せて（反応１）コンタクトホール５に選択的に堆積させ
も　このときシラン還元（反応１）と同時にシリコン還
元（反応２）も起こり、Ｗの基板Ｓｉ内部への成長が起
こも このＷの基板内部への成長量は第４図のグラフに示され
るようにＳｉ中のＡｓ濃度に依存していも　つまり、従
来の条件では　ＷのＳｉ基板内部への成長量は２５０℃
で約５０〜７０ｎｍ程度（グラフ中［イ］、　［ロコ）
である力＜、第２図（Ｃ）において４　Ｘ　ｌ　Ｏ”ｃ
ｍ−”以上のＡｓ層を形成することにより約４０ｎｍ以
下に（グラフ中［ハ］）減少させることがでＬＷのＳｉ
基板内部への成長によるｎ゛拡散層とｐ型基板間のリー
ク電流を防ぐことができも な耘　本実施例ではシリコンｎ基板中にｎ°拡散層を形
成しｎ　”層を形成する場合について述べたカミ　シリ
コンｎ基板中にｐウェルを形成し　本実施例と同様にｎ
゛拡散凰　ｎ　”層−を形成する場合も同様の効果が得
られることは言うまでもなり℃発明の効果 以上述べたように本発明によれ１戴　簡単な方法で選択
的に金属を埋め込む際のリーク電流が防止できるので、
電極や配線を形成しても断線が起こらない上にエレクト
ロマイグレーション耐性等の信頼性向上に著しい効果が
あム　従って高密度で大規模な半導体集積回路の実現が
容易であも[Detailed Description of the Invention] Industrial Application Field The present invention relates to a method of manufacturing a high-density, large-scale integrated semiconductor integrated circuit having fine electrode contacts and multilayer wiring. In some cases, usually AI
However, the width of the contact is only 1 μm.
When the micro dimensions are as follows, almost no Al will adhere to the side surfaces of the contact using the AI sputtering method.As a result!
This can cause serious reliability problems such as disconnection of AI wiring and electromigration resistance.4 To prevent this, there is a technology that selectively embeds metal in the contacts.An example of this is shown below in Figure 3. Also shown is a cross-sectional view of the case where metal is selectively embedded in fine contacts using the conventional manufacturing method. In the same figure, 1 is a silicon p-type substrate, 2 is an N0 diffusion layer, and 4 is an insulation! ! , 5 is a contact hole Jk6 is tungsten embedded in the contact hole. This is formed by the manufacturing method described below. Reaction 2WF・+3SiHn → 2W+5
Even if tungsten 6 is selectively grown in the contact hole 5 using ip4 + 6H* (reaction 1), this reaction does not occur on the insulating layer 4,
Since the Si of the substrate is exposed in the contact hole, selective growth is possible.Problems to be Solved by the Present InventionHowever, the following problems arise with this method. Silicon reduction reaction 2WF@ + 3Si → 2W in which Si substrate 1 and WF react in time
+3SiF, (reaction 2) occurs, the underlying Si is consumed, and W grows in its place toward the inside of the substrate. 3
The distance T between W in the figure and the p-type substrate becomes shorter, and leakage current occurs between the n0 diffusion layer and the p-type substrate, causing serious problems such as inconvenience in circuit operation. This method was developed in consideration of the above, and aims to prevent leakage current between the n'-diffusion layer and the p-type substrate by suppressing the reaction between the underlying Si and WF at the bottom of the contact hole using a simple method. The present invention aims to solve the above-mentioned problems by forming a high-concentration As layer on the bottom of the contact hole, which contains metal. The present invention uses the method described above to control the growth of W inside the Si substrate when filling the contact hole by reacting the gas with the Si substrate to selectively fill the contact hole.
Figure 1 is a cross-sectional view of a fine contact embedded with metal (tungsten) in an embodiment of the present invention, which has the effect of preventing leakage current between mold substrates. 2 is n0 diffusion [3 is n”
M! , 4 is an insulating WL, 5 is a contact hole k, and 6 is tungsten embedded in the contact hole.The manufacturing method will be explained using FIG. 2.FIG. 2(a): 1
An insulating layer 4 is deposited on a silicon n substrate, and a contact hole 5 is formed. In FIG. In Figure 2 (C), WF6
A gas diluted with Ar (argon) may be reacted with 5iHa (reaction 1) to selectively deposit it in the contact hole 5. At this time, silicon reduction (reaction 2) also occurs at the same time as silane reduction (reaction 1). Even though growth occurs inside the Si substrate, the amount of W growing inside the substrate depends on the As concentration in the Si as shown in the graph of Figure 4.In other words, under conventional conditions, W grows inside the Si substrate. The amount of growth is 250℃
Approximately 50 to 70 nm ([A] and [Loco] in the graph)
The force <, 4 X l O”c in Fig. 2 (C)
By forming an As layer with a thickness of m-" or more, it is possible to reduce the thickness of the LW to about 40 nm or less ([c] in the graph).
It is not possible to prevent leakage current between the n° diffusion layer and the p-type substrate due to growth inside the substrate.In this example, an n° diffusion layer is formed in a silicon n substrate to form an n'' layer. As described above, a p-well is formed in a silicon n-substrate and an n-well is formed in the same manner as in this example.
It goes without saying that the same effect can be obtained when forming a ``diffusion layer'' layer. ℃ Effects of the Invention As described above, the present invention has the following advantages: Leakage when selectively embedding metal by a simple method Since the current can be prevented,
Even when electrodes and wiring are formed, disconnection does not occur, and it has a remarkable effect on improving reliability such as electromigration resistance.Therefore, it is easy to realize high-density, large-scale semiconductor integrated circuits.

【図面の簡単な説明】 第１図は本発明の一実施例における微細なコンタクトの
断面医　第２図は上記微細なコンタクトの製造プロセス
断面医　第３図は従来の製造法による微細なコンタクト
の断面医　第４図は表面Ａｓ濃度のよるＷのＳｉ基板方
向への成長量を表わしたグラフであａ １・・・・・シリコンｐ型基板　２・・・・・ｎ゛拡散
恩３・・・・・ｎ”恩　４・・・・・絶縁風　５・・・
・・コンタクトホー／ｋ　　６・・・・・コンタクトホ
ールに埋め込まれたタングステス[Brief Description of the Drawings] Fig. 1 shows a cross-section of a fine contact according to an embodiment of the present invention. Fig. 2 shows a cross-section of the manufacturing process of the above-mentioned fine contact. Fig. 3 shows a cross-section of a fine contact according to a conventional manufacturing method. Figure 4 is a graph showing the amount of W growth toward the Si substrate depending on the surface As concentration. ...n"on 4...Insulating wind 5...
...Contact hole/k 6...Tungsten embedded in the contact hole

Claims (1)

【特許請求の範囲】[Claims] 半導体基板上の絶縁膜に形成されたコンタクトホールの
底面のｐ型領域にｎ＾＋層を形成する第１の工程と、前
記コンタクトホールにＡｓ注入を行い高濃度のｎ＾＋＾
＋層を形成する第２の工程と、金属を含んだガスを反応
させて前記コンタクトホールに前記の金属を選択的に成
長させる第３の工程を含んでなる半導体集積回路の製造
方法A first step of forming an n^+ layer in the p-type region at the bottom of a contact hole formed in an insulating film on a semiconductor substrate, and implanting As into the contact hole to form a high concentration n^+^
A method for manufacturing a semiconductor integrated circuit, comprising: a second step of forming a + layer; and a third step of reacting a gas containing metal to selectively grow the metal in the contact hole.