JPH0491473A - Photoelectric conversion apparatus - Google Patents
Photoelectric conversion apparatusInfo
- Publication number
- JPH0491473A JPH0491473A JP2203968A JP20396890A JPH0491473A JP H0491473 A JPH0491473 A JP H0491473A JP 2203968 A JP2203968 A JP 2203968A JP 20396890 A JP20396890 A JP 20396890A JP H0491473 A JPH0491473 A JP H0491473A
- Authority
- JP
- Japan
- Prior art keywords
- light
- photoelectric conversion
- film
- conversion device
- pixel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 title claims description 31
- 239000000758 substrate Substances 0.000 claims description 20
- 239000004065 semiconductor Substances 0.000 claims description 12
- 238000002955 isolation Methods 0.000 abstract description 10
- 239000010410 layer Substances 0.000 description 33
- 238000000034 method Methods 0.000 description 16
- 238000010438 heat treatment Methods 0.000 description 15
- 238000005229 chemical vapour deposition Methods 0.000 description 11
- 239000010949 copper Substances 0.000 description 11
- 239000007789 gas Substances 0.000 description 10
- 229910052751 metal Inorganic materials 0.000 description 10
- 239000002184 metal Substances 0.000 description 10
- 238000000151 deposition Methods 0.000 description 9
- 239000000463 material Substances 0.000 description 8
- 230000008021 deposition Effects 0.000 description 6
- 239000010936 titanium Substances 0.000 description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 238000002161 passivation Methods 0.000 description 4
- 229910018575 Al—Ti Inorganic materials 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 125000005234 alkyl aluminium group Chemical group 0.000 description 3
- 125000004429 atom Chemical group 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 238000005192 partition Methods 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- 229910018182 Al—Cu Inorganic materials 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000003574 free electron Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910003074 TiCl4 Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- UQZIWOQVLUASCR-UHFFFAOYSA-N alumane;titanium Chemical compound [AlH3].[Ti] UQZIWOQVLUASCR-UHFFFAOYSA-N 0.000 description 1
- LKTZODAHLMBGLG-UHFFFAOYSA-N alumanylidynesilicon;$l^{2}-alumanylidenesilylidenealuminum Chemical compound [Si]#[Al].[Si]#[Al].[Al]=[Si]=[Al] LKTZODAHLMBGLG-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- IEQUNHXCJVILJQ-UHFFFAOYSA-N aluminum palladium Chemical compound [Al].[Pd] IEQUNHXCJVILJQ-UHFFFAOYSA-N 0.000 description 1
- -1 aluminum silicon copper Chemical compound 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- YXTPWUNVHCYOSP-UHFFFAOYSA-N bis($l^{2}-silanylidene)molybdenum Chemical compound [Si]=[Mo]=[Si] YXTPWUNVHCYOSP-UHFFFAOYSA-N 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- TUTOKIOKAWTABR-UHFFFAOYSA-N dimethylalumane Chemical compound C[AlH]C TUTOKIOKAWTABR-UHFFFAOYSA-N 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- CWEHKOAQFGHCFQ-UHFFFAOYSA-N methylalumane Chemical compound [AlH2]C CWEHKOAQFGHCFQ-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910021344 molybdenum silicide Inorganic materials 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 230000027756 respiratory electron transport chain Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 238000006557 surface reaction Methods 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
- UBZYKBZMAMTNKW-UHFFFAOYSA-J titanium tetrabromide Chemical compound Br[Ti](Br)(Br)Br UBZYKBZMAMTNKW-UHFFFAOYSA-J 0.000 description 1
- XJDNKRIXUMDJCW-UHFFFAOYSA-J titanium tetrachloride Chemical compound Cl[Ti](Cl)(Cl)Cl XJDNKRIXUMDJCW-UHFFFAOYSA-J 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Electrodes Of Semiconductors (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は、半導体基板上に形成された複数の画素を備え
た光電変換装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a photoelectric conversion device including a plurality of pixels formed on a semiconductor substrate.
［従来の技術］
イメージスキャナーや電子複写機のような装置において
は、たとえば第６図に示すように、原稿等の被写体３２
を光源３１で照射し、その反射光を光学系３３を通して
光電変換装置３４で受け、ここに結像した画像を電気信
号として取り出す構成が採られている。この光電変換装
置３４には、光学系３３からの光以外に、装置周囲から
の外光Ａが混入し、これが画質を劣化させる原因となっ
ている。以下に、この種の装置に一般的に用いられてい
る、半導体トランジスタの制御電極上に光キャリアを蓄
積するタイプのＢＡＳＩＳの光電変換装置を示す第７図
を参照して説明する。各画素は、半導体基板１７上に設
けられた埋込層１６上に構成され、エピタキシャル層１
４、ベース層１５および素子分離層１３からなる。また
各画素の上方には透明な絶縁層１２が設けられている。[Prior Art] In devices such as image scanners and electronic copying machines, for example, as shown in FIG.
is emitted by a light source 31, the reflected light is received by a photoelectric conversion device 34 through an optical system 33, and the image formed there is extracted as an electrical signal. In addition to the light from the optical system 33, external light A from around the device is mixed into the photoelectric conversion device 34, which causes deterioration of image quality. A description will be given below with reference to FIG. 7 showing a BASIS photoelectric conversion device of the type that accumulates photocarriers on the control electrode of a semiconductor transistor, which is commonly used in this type of device. Each pixel is formed on a buried layer 16 provided on a semiconductor substrate 17, and is formed on an epitaxial layer 1.
4, a base layer 15 and an element isolation layer 13. Further, a transparent insulating layer 12 is provided above each pixel.
［発明が解決しようとしている課題］
しかしながら第７図に示したような従来の光電変換装置
の構造では、第６図に示したような、センサ面に対して
斜めに入射した光Ａがあると、全画素においてこれを吸
収し、偽信号として光電変換してしまうという問題があ
った。[Problems to be Solved by the Invention] However, in the structure of the conventional photoelectric conversion device as shown in FIG. 7, if there is light A that is obliquely incident on the sensor surface as shown in FIG. , there was a problem in that all pixels absorbed this and photoelectrically converted it as a false signal.
本発明はこのような従来の光電変換装置における課題を
解決するためになされたもので、受光面に対して斜めに
入射した光による偽信号の発生を確実に防止できるよう
にした光電変換装置を提供することを目的としている。The present invention was made in order to solve the problems with conventional photoelectric conversion devices, and provides a photoelectric conversion device that can reliably prevent the generation of false signals due to light incident obliquely to the light receiving surface. is intended to provide.
［課題を解決するための手段（および作用）］本発明の
光電変換装置は、各画素間の境界部分に位置する遮光層
を備えている。この遮光層は、光電変換装置の全面に設
けられた絶縁層内において、各画素間の境界部分上に位
置し、各画素の受光面に対して垂直な方向に延びている
。したがってこの遮光膜は、受光面に対して垂直な方向
から入射する光はそのまま通過させるが、斜めの方向か
らの光を遮るように働き、これによって各画素は、外部
の光の状態に影響されることなく、常に安定した光電変
換出力を発生することができる。[Means for Solving the Problems (and Effects)] The photoelectric conversion device of the present invention includes a light shielding layer located at the boundary between each pixel. This light-shielding layer is located on the boundary between each pixel in an insulating layer provided over the entire surface of the photoelectric conversion device, and extends in a direction perpendicular to the light-receiving surface of each pixel. Therefore, this light-shielding film allows light incident from a direction perpendicular to the light-receiving surface to pass through, but works to block light from an oblique direction, and as a result, each pixel is not affected by the external light condition. Therefore, stable photoelectric conversion output can be generated at all times.
［実施例］
以下に本発明の一実施例について図面を参照して説明す
る。第１図は複数の画素を有する光電変換装置の一部を
示すもので、１は遮光層、２は絶縁層、３は素子分離領
域、４はエピタキシャル層、５はベース領域、６は埋込
み層、７は半導体基板、８はパッシベーション膜である
。絶縁層２およびパッシベーション膜８はそれ自体透明
なものであり、外部からの光がその内部を透過して各画
素の受光面に入射するのを許容する。[Example] An example of the present invention will be described below with reference to the drawings. Figure 1 shows a part of a photoelectric conversion device having multiple pixels, in which 1 is a light shielding layer, 2 is an insulating layer, 3 is an element isolation region, 4 is an epitaxial layer, 5 is a base region, and 6 is a buried layer. , 7 is a semiconductor substrate, and 8 is a passivation film. The insulating layer 2 and the passivation film 8 are themselves transparent and allow light from the outside to pass through them and enter the light-receiving surface of each pixel.
また遮光層１は、各画素を相互に分離している素子分離
領域３の上面に沿って延びるように配置されているとと
もに、絶縁層２の厚さに等しい高さを有している。すな
わち遮光層１は、絶縁層２内において各画素の各々の前
方を相互に分割する隔壁を形成し、光はこの隔壁の間を
通って各画素に入射する。したがって第６図に示したよ
うな、センサ面に対して斜めに入射した光Ａは、隔壁に
よって遮られ、画素に入射することはない。このためこ
の光電変換装置は、受光面に対してほぼ垂直に入射する
光のみに感応し、周囲の光の状態に影響されることなく
、常に正確は画像出力を与える。Further, the light shielding layer 1 is arranged so as to extend along the upper surface of the element isolation region 3 that separates each pixel from each other, and has a height equal to the thickness of the insulating layer 2. That is, the light-shielding layer 1 forms partition walls that mutually divide the front of each pixel in the insulating layer 2, and light passes between the partition walls and enters each pixel. Therefore, the light A that is obliquely incident on the sensor surface as shown in FIG. 6 is blocked by the partition wall and does not enter the pixel. Therefore, this photoelectric conversion device is sensitive only to light incident almost perpendicularly to the light-receiving surface, and always provides accurate image output without being affected by the surrounding light condition.
第２図は、第１図に示した本発明の光電変換装置におい
て、遮光層ｌの下端を延長して、素子分離領域３内に位
置する下部遮光層９を設けた実施例を示している。この
実施例では、各画素間はエピタキシャル層４においても
光に対して相互に分離されるので、各画素間での干渉が
なくなり、さらに高い性能が得られる。また本発明は、
素子分離領域が第３図に示すようなＬＯＧＯ３構造２１
によって構成されている光電変換装置、あるいは第４図
に示すようなトレンチ溝２２によって構成されている光
電変換装置にも同様に適用することが可能である。また
図示しないが、ＣＣＤ光電変換装置に適用することもで
きる。FIG. 2 shows an embodiment in which the lower end of the light shielding layer l is extended to provide a lower light shielding layer 9 located within the element isolation region 3 in the photoelectric conversion device of the present invention shown in FIG. . In this embodiment, the pixels are separated from each other with respect to light in the epitaxial layer 4 as well, so there is no interference between the pixels, and even higher performance can be obtained. Moreover, the present invention
The element isolation region has a LOGO3 structure 21 as shown in FIG.
It is also possible to apply the present invention to a photoelectric conversion device constituted by a trench groove 22 or a photoelectric conversion device constituted by a trench groove 22 as shown in FIG. Although not shown, the present invention can also be applied to a CCD photoelectric conversion device.
第１図に示した構造の暗画素を有する光電変換装置を製
造する工程の一例を第５図（ａ）〜（ｅ）にしたがって
説明する。まずｐ型半導体基板７上に、通常の方法でｎ
０埋込層６を形成したのち、その表面層にｎ−のエピタ
キシャル層４を成長させる（第５図（ａ））。ついでエ
ピタキシャル層４上に酸化膜１０２を設け、形成すべき
素子分離領域に対応する部分において酸化膜１０２の一
部をフォトリソグラフィ法によって選択的に除去するバ
ターニングを行う。つぎに酸化膜１０２をマスクとして
エピタキシャル層４にＡｓのような不純物をイオン注入
したのち熱処理を施すことによって、素子分離領域３を
形成する（第５図（ｂ））。その後、酸化膜１０２をフ
ッ酸によるエツチングで除去し、ついで所望のベース領
域の形状に応じてレジスト膜１０３を設け、このレジス
ト膜１０３をマスクとしてＢ′″のような不純物をイオ
ン注入したのちレジスト膜１０３を除去し、熱処理を施
してベース領域５を形成する（第５図（Ｃ））。つづい
て表面全体にＣＶＤ法によって、リンガラスまたはＳｉ
Ｏ２等からなる絶縁膜２を堆積させ、その上に、上記の
ベース領域形成工程と同様に、レジスト塗布、バターニ
ングおよびエツチングによって、素子分離領域３上の絶
縁膜２を選択的に除去して孔１０４を設ける（第５図（
ｄ））。ついでレジストを除去したのち、Ａｌ−ＣＶＤ
法を用いて孔１０４内にＡ１を充填しく第５図（ｅ）
） 、最後に全面に再びＣＶＤ法によって絶縁物を堆積
させてパッシベーション層８を形成することによって第
１図の構造の光電変換装置を得ることができる。An example of a process for manufacturing a photoelectric conversion device having a dark pixel having the structure shown in FIG. 1 will be described with reference to FIGS. 5(a) to 5(e). First, on the p-type semiconductor substrate 7, an n
After forming the 0 buried layer 6, an n- epitaxial layer 4 is grown on its surface layer (FIG. 5(a)). Next, an oxide film 102 is provided on the epitaxial layer 4, and patterning is performed in which a portion of the oxide film 102 is selectively removed by photolithography in a portion corresponding to an element isolation region to be formed. Next, an impurity such as As is ion-implanted into the epitaxial layer 4 using the oxide film 102 as a mask, and then heat treatment is performed to form the element isolation region 3 (FIG. 5(b)). After that, the oxide film 102 is removed by etching with hydrofluoric acid, and then a resist film 103 is provided according to the shape of the desired base region. Using this resist film 103 as a mask, ions of impurities such as B'" are implanted, and then the resist film 102 is removed by etching with hydrofluoric acid. The film 103 is removed and heat treated to form the base region 5 (FIG. 5(C)).Then, the entire surface is coated with phosphor glass or Si by CVD method.
An insulating film 2 made of O2 or the like is deposited, and the insulating film 2 on the element isolation region 3 is selectively removed by resist coating, buttering, and etching in the same manner as in the base region forming step described above. A hole 104 is provided (Fig. 5 (
d)). After removing the resist, Al-CVD
Fill the hole 104 with A1 using the method shown in Fig. 5(e).
), and finally, by depositing an insulator over the entire surface again by the CVD method to form a passivation layer 8, a photoelectric conversion device having the structure shown in FIG. 1 can be obtained.
次に本発明の実施例による光電変換装置の製造に適用さ
れるＡｔ−ＣＶＤ法について説明する。Next, an At-CVD method applied to manufacturing a photoelectric conversion device according to an embodiment of the present invention will be described.
（成膜方法）
この方法は、例えばアスペクト比が１以上の微細かつ深
い開孔（コンタクトホール、スルーホール凹部）内への
金属材料の埋込に適した方法であり、また選択性に優れ
た方法である。(Film forming method) This method is suitable for embedding a metal material into fine and deep openings (contact holes, through-hole recesses) with an aspect ratio of 1 or more, and also has excellent selectivity. It's a method.
そしてこの方法により形成された金属膜が、単結晶Ａ１
が形成されるように極めて結晶性に優れ、炭素等の含有
もほとんどない。The metal film formed by this method is a single crystal A1
It has excellent crystallinity and contains almost no carbon or the like.
同様に、この金属は、０．フないし３．４μΩ・ｃｍの
低い抵抗率をも０ち、８５ないし９５％の高い反射率を
有し、１μｍ以上のヒロック密度が１ないし１００ｃｍ
−”程度の表面性の優れたものとなる。Similarly, this metal has 0. It has a low resistivity of 0 to 3.4 μΩ・cm, a high reflectance of 85 to 95%, and a hillock density of 1 μm or more from 1 to 100 cm.
The surface quality is excellent.
また、シリコンとの界面におけるアロイスパイクの発生
確率についても、０．１５μｍの半導体接合の破壊確率
を取ってみればほぼ０に等しくなる。Furthermore, the probability of occurrence of an alloy spike at the interface with silicon is approximately equal to 0 if we take the probability of destruction of a 0.15 μm semiconductor junction.
この方法とは、アルキルアルミニウムハイドライドのガ
スと水素ガスとを用いて、電子供与性の基体状に表面反
応により堆積膜を形成するものである。特に、原料ガス
としてモノメチルアルミニウムハイドライド（ＭＭＡＨ
）またはジメチルアルミニウムハイドライド（ＤＭＡＨ
）を用い、反応ガスとしてＨ２ガスを用い、これらの混
合ガスの下で基体表面を加熱すれば良質のＡ１膜を堆積
することができる。This method uses alkyl aluminum hydride gas and hydrogen gas to form a deposited film on an electron-donating substrate through a surface reaction. In particular, monomethyl aluminum hydride (MMAH) is used as the raw material gas.
) or dimethylaluminum hydride (DMAH
), H2 gas is used as the reaction gas, and a high quality A1 film can be deposited by heating the substrate surface under a mixed gas of these.
ここで、Ａ１選択堆積の際には、直接加熱または間接加
熱により基体の表面温度をアルキルアルミニウムハイド
ライドの分解温度以上、４５０℃未満に保持することが
好ましく、より好ましくは２６０℃以上４４０℃以下が
よい。Here, during A1 selective deposition, it is preferable to maintain the surface temperature of the substrate at a temperature above the decomposition temperature of the alkyl aluminum hydride and below 450°C by direct heating or indirect heating, and more preferably between 260°C and above and below 440°C. good.
基体をなるべ（上記温度範囲に加熱する方法としては直
接加熱と間接加熱とがあるが、特に直接加熱により基体
を上記温度に保持すれば高堆積速度で良質のＡ１膜を形
成することができる。例えば、Ａ１膜形成時の基体表面
温度をより好ましい温度範囲である２６０℃〜４４０℃
としたとき、３０００人／分という抵抗加熱の場合より
も高い堆積速度で良質な膜が得られるのである。このよ
うな直接加熱（加熱手段からのエネルギーが直接基体に
伝達されて基体自体を加熱する）の方法としては、例え
ば、ハロゲンランプ、キセノンランプ等によるランプ加
熱が挙げられる。また、間接加熱の方法としては抵抗加
熱があり、堆積膜を形成すべき基体を支持するためにの
堆積膜形成用の空間に配設された基体支持部材に設けら
れた発熱体などを用いて行うことができる。There are direct heating and indirect heating methods for heating the substrate to the above temperature range, but if the substrate is kept at the above temperature by direct heating, a high quality A1 film can be formed at a high deposition rate. For example, when forming the A1 film, the substrate surface temperature is set to a more preferable temperature range of 260°C to 440°C.
In this case, a high quality film can be obtained at a deposition rate higher than that in the case of resistance heating of 3000 people/min. Examples of such a direct heating method (energy from a heating means is directly transmitted to the substrate to heat the substrate itself) include lamp heating using a halogen lamp, a xenon lamp, or the like. In addition, there is resistance heating as a method of indirect heating, which uses a heating element provided on a substrate support member disposed in a space for forming a deposited film to support the substrate on which the deposited film is to be formed. It can be carried out.
この方法により電子供与性の表面部分と非電子供与性の
表面部分とが共存する基体にＣＶＤ法を適用すれば電子
供与性の基体表面部分のみに良好な選択性のもとにＡ１
の単結晶が形成される。By this method, if the CVD method is applied to a substrate in which electron-donating surface portions and non-electron-donating surface portions coexist, A1 can be applied to only the electron-donating surface portions with good selectivity.
A single crystal of is formed.
電子供与性の材料とは、基体中に自由電子が存在してい
るか、もしくは自由電子を意図的に生成させたもので、
基体表面上に付着した原料ガス分子との電子授受により
化学反応が促進される表面を有する材料をいう。例えば
一般に金属や半導体がこれに相当する。また、金属もし
くは半導体表面に薄い酸化膜が存在しているものも基体
と付着原料分子間で電子授受により化学反応が生じ得る
ため、本発明の電子供与性材料に含まれる。An electron-donating material is one in which free electrons exist in the substrate, or free electrons are intentionally generated.
A material that has a surface that promotes chemical reactions by transferring electrons to and from source gas molecules attached to the substrate surface. For example, metals and semiconductors generally correspond to this. In addition, materials in which a thin oxide film is present on the surface of a metal or semiconductor are also included in the electron-donating materials of the present invention, since chemical reactions can occur between the substrate and attached raw material molecules by electron transfer.
電子供与性材料の具体例としては、例えば、■族元素と
してのＧａ、Ｉｎ、Ａ１等と■族元素としてのＰ、Ａｓ
、Ｎ等とを組み合わせてなる二元系もしくは三元系もし
くはそれ以上の多元系の■−■族化合物半導体、または
単結晶シリコン、非晶質シリコンなどの半導体材料、あ
るいは以下に示す金属、合金、シリサイド等であり、例
えばタングステン、モリブデン、タンタル、銅、チタン
、アルミニウム、チタンアルミニウム、チタンナイトラ
イド、アルミニウムシリコン銅、アルミニウムパラジウ
ム、タングステンシリサイド、チタンシリサイド、アル
ミニウムシリサイド、モリブデンシリサイド、タンタル
シリサイド等が挙げられる。Specific examples of electron-donating materials include Ga, In, A1, etc. as group Ⅰ elements and P, As as group Ⅰ elements, etc.
, N, etc., or semiconductor materials such as single crystal silicon, amorphous silicon, or metals and alloys shown below. , silicide, etc., such as tungsten, molybdenum, tantalum, copper, titanium, aluminum, titanium aluminum, titanium nitride, aluminum silicon copper, aluminum palladium, tungsten silicide, titanium silicide, aluminum silicide, molybdenum silicide, tantalum silicide, etc. It will be done.
これに対して、Ａ１あるいはＡｌ−５ｉが選択的に堆積
しない表面を形成する材料、すなわち非電子供与性材料
としては、熱酸化、ＣＶＤ等により形成された酸化シリ
コン、ＢＳＧ％ＰＳＧ、ＢＰＳＧ等のガラスまたは酸化
膜、熱窒化膜や、プラズマＣＶＤ法、減圧ＣＶＤ法、Ｅ
ＣＲ−ＣＶＤ法などにより形成されたシリコン窒化膜が
挙げられる。On the other hand, materials that form the surface on which A1 or Al-5i is not selectively deposited, that is, non-electron-donating materials, include silicon oxide formed by thermal oxidation, CVD, etc., BSG%PSG, BPSG, etc. Glass or oxide film, thermal nitride film, plasma CVD method, low pressure CVD method, E
A silicon nitride film formed by a CR-CVD method or the like may be used.
このＡ １−ＣＶＤ法によれば、以下のようなＡｌを主
成分とする金属膜をも選択的に堆積でき、その膜質も優
れた特性を示すのである。According to this A1-CVD method, it is possible to selectively deposit the following metal films containing Al as a main component, and the film quality also shows excellent characteristics.
たとえば、アルキルアルミニウムハイドライドのガスと
水素とに加えて、
ＳｉＨ４，５ｉ２Ｈａ 、５ｉｊＨａ 、Ｓｉ （ＣＨ
ｓ ）、５ＩＣ１４，５ｆＯＨｉ Ｃ１ｚ 、５ｉＨＣ
１，等のＳｉ原子を含むガス、
ＴｉＣｌ４． ＴｉＢｒ４． Ｔｉ （ＣＨｓ ） ａ
等のＴｉ原子を含むガス、
ビスアセチルアセトナート銅Ｃｕ （ｃｉ ＨｆＯ２）
、ビスジピバロイルメタナイト銅Ｃｕ（Ｃ＋＋Ｈｌ−０
２） ２ 、ビスヘキサフルオロアセチルアセトナート
銅Ｃｕ （Ｃｓ ＨＦａ Ｏｘ ）を等のＣｕ原子を含
むガス、
を適宜組み合わせて導入して混合ガス雰囲気として、例
えばＡｌ−５ｉ、Ａｌ−Ｔｉ、Ａｌ−Ｃｕ％Ａｌ−８Ｌ
−Ｔｉ％Ａｌ−３Ｌ−Ｃｕ等の導電材料を選択的に堆積
させて電極を形成してもよい。For example, in addition to alkyl aluminum hydride gas and hydrogen, SiH4,5i2Ha, 5ijHa, Si(CH
s), 5IC14, 5fOHi C1z, 5iHC
1, gas containing Si atoms such as TiCl4. TiBr4. Ti (CHs) a
Gases containing Ti atoms such as bisacetylacetonatocopper Cu (ci HfO2)
, bisdipivaloyl methanite copper Cu (C++Hl-0
2) A gas containing Cu atoms, such as copper bishexafluoroacetylacetonate Cu (CsHFaOx), is introduced in appropriate combination to create a mixed gas atmosphere, for example, Al-5i, Al-Ti, Al-Cu. %Al-8L
Electrodes may be formed by selectively depositing a conductive material such as -Ti%Al-3L-Cu.
また、上記Ａ１−ＣＶＤ法は、選択性に優れた成膜方法
であり、かつ堆積した膜の表面性が良好であるために、
次の堆積工程に非選択性の成膜方法を適用して、上述の
選択堆積したＡ１膜および絶縁膜としてのＳｉＯ□等の
上にもＡＩまたはＡ１を主成分とする金属膜を形成する
ことにより、半導体装置の配線として汎用性の高い好適
な金属膜を得ることができる。In addition, the above A1-CVD method is a film forming method with excellent selectivity, and the surface properties of the deposited film are good.
Applying a non-selective film formation method to the next deposition step to form a metal film containing AI or A1 as a main component also on the selectively deposited A1 film and SiO□ as an insulating film, etc. Accordingly, it is possible to obtain a highly versatile metal film suitable for wiring of semiconductor devices.
このような金属膜とは、具体的には以下のとおりである
。選択堆積したＡ１、Ａｌ−８ｉ、Ａｌ−Ｔｉ、Ａｌ−
Ｃｕ％Ａｌ−３ｔ−Ｔｉ、Ａｌ−８ｉ−Ｃｕと非選択的
に堆積したＡ１％Ａｌ−８ｉ、Ａｌ−Ｔｉ、Ａｌ−Ｃｕ
、Ａｌ−３Ｌ−Ｔｉ、Ａｌ−８ｉ−Ｃｕとの組合せ等で
ある。Specifically, such a metal film is as follows. Selectively deposited A1, Al-8i, Al-Ti, Al-
Cu%Al-3t-Ti, Al-8i-Cu and non-selectively deposited Al-8i, Al-Ti, Al-Cu
, Al-3L-Ti, Al-8i-Cu, etc.
非選択堆積のための成膜方法としては、上述したＡ１−
ＣＶＤ法以外のＣＶＤ法や、スパッタリング法等がある
。As a film forming method for non-selective deposition, the above-mentioned A1-
There are CVD methods other than the CVD method, sputtering methods, and the like.
またＣＶＤ法やスパッタリング法により導電性の膜を形
成し、バターニングして所望の配線形状を有する下引層
を形成したのち、Ａ１−ＣＶＤ法を用いて選択的にＡ１
やＡ１を主成分とする金属膜を該下引層上に堆積させて
配線を形成してもよい。In addition, a conductive film is formed by a CVD method or a sputtering method, and after patterning is performed to form an undercoat layer having a desired wiring shape, selective A1
The wiring may be formed by depositing a metal film containing A1 or A1 as a main component on the undercoat layer.
さらには、Ａｌ−ＣＶＤ法を利用して絶縁膜上に形成す
ることもできる。そのためには、絶縁膜に表面改質工程
を施して実質的に電子供与性の表面部分を形成すること
である。このときに所望の配線形状にビームによる描画
を行えば、選択堆積により描画された配線形状の電子供
与性部分にのみ堆積するので、パターニングなしで自己
整合的に配線を形成することが可能となる。Furthermore, it can also be formed on an insulating film using the Al-CVD method. To achieve this, the insulating film is subjected to a surface modification step to form a substantially electron-donating surface portion. At this time, if the desired wiring shape is drawn using a beam, selective deposition will deposit only on the electron-donating parts of the drawn wiring shape, making it possible to form wiring in a self-aligned manner without patterning. .
［発明の効果］
以上に説明したように本発明の光電変換装置は、各画素
はその前面に位置する遮光層によって、斜め方向からの
光に対して遮光されているので、周囲の光の影響を受け
ることがなく、目的とする光信号を正確に電気信号に変
換することができる。[Effects of the Invention] As explained above, in the photoelectric conversion device of the present invention, each pixel is shielded from light from an oblique direction by the light shielding layer located in front of it, so that it is free from the influence of surrounding light. The target optical signal can be accurately converted into an electrical signal without receiving any interference.
第１図は本発明の一実施例による光電変換装置の一部を
示す縦断面図、第２図〜第４図はそれぞれ本発明の他の
実施例による光電変換装置を示す縦断面図、第５図（ａ
）〜（ｅ）は第１図の光電変換装置を製造する工程を示
す説明図、第６図は通常の電子複写機の構成を示す説明
図、第７図は従来の光電変換装置の一部の縦断面図であ
る。
１は遮光層、２は絶縁層、３は素子分離領域、４はエピ
タキシャル層、５はベース領域、６は埋込み層、７は半
導体基板、８はパッシベーション層。
代理人 弁理士 山 下 穣 平
寸
ψ
ト
第
図FIG. 1 is a longitudinal cross-sectional view showing a part of a photoelectric conversion device according to an embodiment of the present invention, and FIGS. 2 to 4 are longitudinal cross-sectional views showing a photoelectric conversion device according to other embodiments of the present invention, respectively. Figure 5 (a
) to (e) are explanatory diagrams showing the process of manufacturing the photoelectric conversion device of FIG. 1, FIG. 6 is an explanatory diagram showing the configuration of a normal electronic copying machine, and FIG. 7 is a part of a conventional photoelectric conversion device FIG. 1 is a light shielding layer, 2 is an insulating layer, 3 is an element isolation region, 4 is an epitaxial layer, 5 is a base region, 6 is a buried layer, 7 is a semiconductor substrate, and 8 is a passivation layer. Agent Patent Attorney Minoru Yamashita
Claims (2)
電変換装置において、前記光電変換装置の全面に設けら
れた絶縁層内において、各画素間の境界部分上に位置し
て遮光層が設けられ、この遮光層が、各画素の受光面に
対して垂直な方向に延びていることを特徴とする光電変
換装置。(1) In a photoelectric conversion device having a plurality of pixels formed on a semiconductor substrate, a light shielding layer is provided on the boundary between each pixel within an insulating layer provided on the entire surface of the photoelectric conversion device. A photoelectric conversion device characterized in that the light-shielding layer extends in a direction perpendicular to the light-receiving surface of each pixel.
領域内をその厚さ方向に貫通して延びていることを特徴
とする請求項１記載の光電変換装置。(2) The photoelectric conversion device according to claim 1, wherein the light-shielding layer extends through the boundary region of the pixel in the thickness direction at an edge thereof.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2203968A JPH0491473A (en) | 1990-08-02 | 1990-08-02 | Photoelectric conversion apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2203968A JPH0491473A (en) | 1990-08-02 | 1990-08-02 | Photoelectric conversion apparatus |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0491473A true JPH0491473A (en) | 1992-03-24 |
Family
ID=16482621
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2203968A Pending JPH0491473A (en) | 1990-08-02 | 1990-08-02 | Photoelectric conversion apparatus |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0491473A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5430321A (en) * | 1993-05-19 | 1995-07-04 | Hewlett-Packard Company | Photodiode structure |
| US5656835A (en) * | 1992-06-01 | 1997-08-12 | Matsushita Electric Industrial Co., Ltd. | Solid state imager and its driving method |
-
1990
- 1990-08-02 JP JP2203968A patent/JPH0491473A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5656835A (en) * | 1992-06-01 | 1997-08-12 | Matsushita Electric Industrial Co., Ltd. | Solid state imager and its driving method |
| US5430321A (en) * | 1993-05-19 | 1995-07-04 | Hewlett-Packard Company | Photodiode structure |
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