JPH048104U - - Google Patents
Info
- Publication number
- JPH048104U JPH048104U JP4938490U JP4938490U JPH048104U JP H048104 U JPH048104 U JP H048104U JP 4938490 U JP4938490 U JP 4938490U JP 4938490 U JP4938490 U JP 4938490U JP H048104 U JPH048104 U JP H048104U
- Authority
- JP
- Japan
- Prior art keywords
- vibration detection
- programmable controller
- detection element
- vibration
- control panel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 230000005856 abnormality Effects 0.000 claims description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Measurement Of Mechanical Vibrations Or Ultrasonic Waves (AREA)
- Safety Devices In Control Systems (AREA)
- Programmable Controllers (AREA)
Description
第１図はこの考案の一実施例によるプログラマ
ブルコントローラの動作ブロツク図、第２図はこ
の考案の一実施例による制御盤内に収納されたプ
ログラマブルコントローラを示す斜視図、第３図
はそのプログラマブルコントローラの拡大図、第
４図は従来の実施例を示す制御盤内に収納された
プログラマブルコントローラを示す図である。
図において、１は制御盤、２は制御盤の内部に
収納されたプログラマブルコントローラのＣＰＵ
ユニツト、３は振動検知計、４はＣＰＵユニツト
に内蔵した振動検知素子、５はＯＳプログラムメ
モリー、６は中央演算処理装置、７は異常検知メ
モリー、８はユーザプログラムメモリ、９は入出
力メモリ、１０は入出力ユニツト、１１は外部機
器、１２は周辺装置制御回路、１３は周辺装置を
示す。なお、図中、同一符号は同一、または相当
部分を示す。
Fig. 1 is an operational block diagram of a programmable controller according to an embodiment of this invention, Fig. 2 is a perspective view showing a programmable controller housed in a control panel according to an embodiment of this invention, and Fig. 3 is the programmable controller according to an embodiment of this invention. FIG. 4 is an enlarged view showing a programmable controller housed in a control panel showing a conventional embodiment. In the figure, 1 is the control panel, and 2 is the CPU of the programmable controller housed inside the control panel.
unit, 3 is a vibration detector, 4 is a vibration detection element built into the CPU unit, 5 is an OS program memory, 6 is a central processing unit, 7 is an abnormality detection memory, 8 is a user program memory, 9 is an input/output memory, 10 is an input/output unit, 11 is an external device, 12 is a peripheral device control circuit, and 13 is a peripheral device. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
の出力信号をもとに振動の異常を検知する機能を
有することを特徴とする振動検知機構付制御装置
。 1. A control device with a vibration detection mechanism, comprising a vibration detection element therein, and having a function of detecting abnormality in vibration based on an output signal of the vibration detection element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4938490U JPH048104U (en) | 1990-05-11 | 1990-05-11 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4938490U JPH048104U (en) | 1990-05-11 | 1990-05-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH048104U true JPH048104U (en) | 1992-01-24 |
Family
ID=31567027
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4938490U Pending JPH048104U (en) | 1990-05-11 | 1990-05-11 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH048104U (en) |
-
1990
- 1990-05-11 JP JP4938490U patent/JPH048104U/ja active Pending