JPH0476737U - - Google Patents

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Publication number
JPH0476737U
JPH0476737U JP12033690U JP12033690U JPH0476737U JP H0476737 U JPH0476737 U JP H0476737U JP 12033690 U JP12033690 U JP 12033690U JP 12033690 U JP12033690 U JP 12033690U JP H0476737 U JPH0476737 U JP H0476737U
Authority
JP
Japan
Prior art keywords
signal
capacitor
coil
variable capacitance
capacitance diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12033690U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12033690U priority Critical patent/JPH0476737U/ja
Publication of JPH0476737U publication Critical patent/JPH0476737U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例を示す、受信妨害波除
去回路を付加した受信入力回路、第2図は受信妨
害波除去回路を構成するコンデンサ7と可変容量
ダイドード8の直列容量CTと印加電圧VTの関
係を示すグラフ、第3図はコイル6のインダクタ
ンスLとCTで決定される共振周波数FTとVT
の関係を示すグラフ、第4図は、入力周波数FR
と混合器5の入力電圧VOとの関係を示すグラフ
、第5図は受信妨害波除去回路を付加していない
受信入力回路である。 1……バンドパスフイルタ1、2……増幅器、
3……バンドパスフイルタ2、4……局部発振器
、5……混合器、6……コイル、7……コンデン
サ、8……可変容量ダイオード、9……D/A変
換器、10……中央処理装置。
Fig. 1 shows an embodiment of the present invention, a receiving input circuit with a receiving interference removal circuit added, and Fig. 2 shows the series capacitance CT of a capacitor 7 and variable capacitance diode 8 constituting the receiving interference removal circuit, and the applied voltage. A graph showing the relationship between VT and Figure 3 shows the resonance frequency FT determined by the inductance L of the coil 6 and CT and VT.
FIG. 4 is a graph showing the relationship between the input frequency FR
FIG. 5, a graph showing the relationship between the input voltage VO of the mixer 5 and the input voltage VO of the mixer 5, is a reception input circuit without a reception interference wave removal circuit. 1...bandpass filter 1, 2...amplifier,
3... Band pass filter 2, 4... Local oscillator, 5... Mixer, 6... Coil, 7... Capacitor, 8... Variable capacitance diode, 9... D/A converter, 10... Center Processing equipment.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 中央処理装置から送出される分周データに応じ
て発振周波数が変化するフエイズロツクドループ
シンセサイザ(以下PLLシンセサイザと呼ぶ)
を局部発振器とし具備し、第1のバンドパスフイ
ルタを通過した入力信号が、増幅器で増幅された
のち第2のバントパスフイルタを通過し、混合器
において前記局部発振器の出力と混合されて中間
周波信号に変換される受信機入力回路において、
前記増幅器の出力にコイルの一端を接続し、この
コイルの他端にコンデンサの一端を接続し、その
コンデンサの他端にアノードを接地した可変容量
ダイオードのカソードを接続し、前記中央処理装
置からの出力信号をD/A変換器で変換した電圧
を前記可変容量ダイオードのカソードに印加する
ことにより、前記コイルと前記コンデンサおよび
前記可変容量ダイオードによる共振周波数を前記
中央処理装置の出力信号で制御することを特徴と
した受信妨害波除去回路。
A phase-locked loop synthesizer (hereinafter referred to as a PLL synthesizer) whose oscillation frequency changes according to frequency-divided data sent from the central processing unit.
is provided as a local oscillator, and the input signal that has passed through the first bandpass filter is amplified by an amplifier, passes through the second bandpass filter, and is mixed with the output of the local oscillator in a mixer to generate an intermediate frequency signal. In the receiver input circuit, which is converted into a signal,
One end of a coil is connected to the output of the amplifier, one end of a capacitor is connected to the other end of the coil, and the cathode of a variable capacitance diode whose anode is grounded is connected to the other end of the capacitor. By applying a voltage obtained by converting an output signal by a D/A converter to a cathode of the variable capacitance diode, the resonance frequency of the coil, the capacitor, and the variable capacitance diode is controlled by the output signal of the central processing unit. A reception interference wave removal circuit featuring the following.
JP12033690U 1990-11-19 1990-11-19 Pending JPH0476737U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12033690U JPH0476737U (en) 1990-11-19 1990-11-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12033690U JPH0476737U (en) 1990-11-19 1990-11-19

Publications (1)

Publication Number Publication Date
JPH0476737U true JPH0476737U (en) 1992-07-03

Family

ID=31868247

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12033690U Pending JPH0476737U (en) 1990-11-19 1990-11-19

Country Status (1)

Country Link
JP (1) JPH0476737U (en)

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