JPH0469622A - Active matrix type liquid crystal display device - Google Patents

Active matrix type liquid crystal display device

Info

Publication number
JPH0469622A
JPH0469622A JP2182017A JP18201790A JPH0469622A JP H0469622 A JPH0469622 A JP H0469622A JP 2182017 A JP2182017 A JP 2182017A JP 18201790 A JP18201790 A JP 18201790A JP H0469622 A JPH0469622 A JP H0469622A
Authority
JP
Japan
Prior art keywords
liquid crystal
active matrix
display device
electrode
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2182017A
Other languages
Japanese (ja)
Inventor
Fujio Okumura
藤男 奥村
Setsuo Kaneko
節夫 金子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2182017A priority Critical patent/JPH0469622A/en
Publication of JPH0469622A publication Critical patent/JPH0469622A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509Filters, e.g. light shielding masks
    • G02F1/133512Light shielding layers, e.g. black matrix
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136218Shield electrodes

Landscapes

  • Liquid Crystal (AREA)

Abstract

PURPOSE:To prevent the deterioration in liquid crystal by providing shielding electrodes for electrically shielding gate lines and maintaining the shielding electrodes at the same potential as the potential of transparent electrodes. CONSTITUTION:The shielding electrodes 105 exist between the gate lines 102 and the transparent electrodes 206 of a counter substrate on the gate lines and since the shielding electrodes are at the same potential as the potential of the transparent electrodes 206, on electric fields are applied at all to the liquid crystal 210 existing therebetween and the deterioration by a DC voltage does not arise. Namely, the shielding electrodes 105 are so formed as to shield the voltage change on the gate lines 12 against the transparent electrodes 206 and, therefore, the influence of the gate lines 102 to the electrodes 206 is obviated. The shielding electrodes 105 are used commonly as light shielding films (black matrix). The opening rate of picture elements is thereby improved.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は薄膜トランジスタをスイッチンク′素子とする
アクティブマトリクス型液晶表示装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an active matrix liquid crystal display device using thin film transistors as switching elements.

〔従来の技術〕[Conventional technology]

アクティブマトリクス型液晶表示装置は、薄膜トランジ
スタや薄膜夕゛イオードをマトリクス状に形成したアク
ティブマトリクス基板と、透明電極やカラーフィルタ、
ブラックマトリクス等を形成した対向基板との間に液晶
を挟んだ構造となっている。この2枚の基板の外側に偏
光板を設け、片側にバックライトを設けて光源とし、液
晶によってスイッチングされた光を片側の基板に設けた
カラーフィルタを通してカラー画像として見るのが一般
的な構成である。また、カラーフィルタと透明電極が付
いている基板側には、通常余分な漏れ光を防ぐため各カ
ラーフィルタとカラーフィルタの間と、アクティブマト
リクス基板の配線及び画素電極の隙間から漏れてくる光
を遮光するフラックマ)・リクスが設けられている。
An active matrix liquid crystal display device consists of an active matrix substrate in which thin film transistors and thin film diodes are formed in a matrix, transparent electrodes, color filters,
It has a structure in which liquid crystal is sandwiched between a counter substrate on which a black matrix or the like is formed. In a typical configuration, a polarizing plate is provided on the outside of these two substrates, a backlight is provided on one side as a light source, and the light switched by the liquid crystal is viewed as a color image through a color filter provided on one substrate. be. In addition, on the side of the substrate where color filters and transparent electrodes are attached, in order to prevent excess light leakage, light leaking from between each color filter and between the wiring and pixel electrodes of the active matrix substrate is placed. A light shielding flux (flux) risk is provided.

第3図は基本的なアクティブマトリクス基板の等価回路
を示している。第3図において、]01は信号線、10
2はゲーI−線、104は薄膜トランジスタ、705は
液晶を示す等価容量、212は対向電極である。液晶に
対する信号入力動作は以下のようにして行う。信号線1
01には外部回路により]−水平ラインごとに画像信号
か保持される。このときゲート線102の内1本にゲー
トパルスが加えられると、そのゲート線102につなが
っている薄膜トランジスタ104がオン状態となり該画
像信号が液晶に書き込まれ、次にオフ状態にすることに
よってその信号が液晶に保持される。以下、これを繰り
返して1画面の画像が表示される。
FIG. 3 shows an equivalent circuit of a basic active matrix substrate. In FIG. 3, ]01 is a signal line, 10
2 is a gate I-line, 104 is a thin film transistor, 705 is an equivalent capacitance representing a liquid crystal, and 212 is a counter electrode. The signal input operation to the liquid crystal is performed as follows. Signal line 1
01, an image signal is held for each horizontal line by an external circuit. At this time, when a gate pulse is applied to one of the gate lines 102, the thin film transistor 104 connected to that gate line 102 is turned on and the image signal is written to the liquid crystal, and then the image signal is written in the liquid crystal by turning it off. is retained on the liquid crystal. Thereafter, this process is repeated until one screen of images is displayed.

〔発明が解決しようとする課題〕 上述した従来のアクティブマトリクス型液晶表示装置の
問題点は、ゲー)・線上の液晶に直流電圧がかかり、液
晶が劣化することである。この劣化は視覚的には画像の
焼き付けや、しみ、むらとして観測される。よく知られ
ているように一般にこの種の表示装置に用いられるツィ
ステッドネマティック液晶は直流電圧による劣化が激し
いため交流駆動をしなくてはならない。そのため信号線
には1フレームあるいは1ラインごとに極性の反転した
信号か加えられている。(実際には対向電極に信号電位
の中間電位を与え疑似的に交流にしている。)従って、
信号線および画素電極には交流電圧がかかっている。し
かるにゲート線上の液晶には以下に述べるように直流電
圧がかかるのである。
[Problems to be Solved by the Invention] The problem with the conventional active matrix liquid crystal display device described above is that a direct current voltage is applied to the liquid crystal on the line, causing deterioration of the liquid crystal. This deterioration is visually observed as image burn-in, stains, and unevenness. As is well known, the twisted nematic liquid crystal used in this type of display device is subject to severe deterioration due to direct current voltage, so it must be driven with alternating current. Therefore, a signal whose polarity is inverted is applied to the signal line every frame or line. (Actually, an intermediate potential of the signal potential is applied to the counter electrode to create a pseudo alternating current.) Therefore,
An alternating current voltage is applied to the signal line and the pixel electrode. However, a DC voltage is applied to the liquid crystal on the gate line as described below.

第4図は1つのゲート線にかかるパルス波形と対向電極
の電位を示している。図においてV+はゲーI・パルス
の正電位、■−はゲートパルスの負電位、Vcは対向電
極の電位を示している。ゲート線には図に示すように1
フレームごとに正のパルスが加わって信号をそのゲート
線がつながっている画素に書き込み、それ以外の期間は
通常若干負の電位になるように設定されている。これは
非書き込み時のリーク電流を最小限に抑えるためである
。実際の例としてV+に15v、、v−に−5Vをかけ
ているものがある。信号電圧としてはO〜1−0■、対
向電極電位VCに5Vを印加するとすれば非書き込み時
にはゲート線と対向電極の間に常に10Vの直流電圧が
加わることになる。画電極の間には液晶の他にブラック
マトリクスや絶縁膜などがあるためにこの電圧か直接か
かるわけではないが、少なくとも液晶に対し数Vの直流
電圧はかかると考えられる。従ってこの部分で液晶の劣
化が進み、これが徐々に全体に広がって画質を劣化させ
るのである。
FIG. 4 shows the pulse waveform applied to one gate line and the potential of the counter electrode. In the figure, V+ indicates the positive potential of the gate I pulse, - indicates the negative potential of the gate pulse, and Vc indicates the potential of the counter electrode. 1 on the gate line as shown in the figure.
A positive pulse is applied every frame to write a signal to the pixels connected to the gate line, and the potential is normally set to be slightly negative during other periods. This is to minimize leakage current during non-writing. As an actual example, 15V is applied to V+, and -5V is applied to V-. Assuming that the signal voltage is 0 to 1-0 and 5 V is applied to the counter electrode potential VC, a DC voltage of 10 V is always applied between the gate line and the counter electrode during non-writing. Although this voltage is not directly applied between the picture electrodes because there is a black matrix, an insulating film, etc. in addition to the liquid crystal, it is thought that at least a DC voltage of several volts is applied to the liquid crystal. Therefore, the deterioration of the liquid crystal progresses in this area, and this gradually spreads to the entire area, deteriorating the image quality.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のアクティブマトリクス型液晶表示装置は、薄膜
トランジスタをスイッチング素子として画素電極に接続
したものをアレイ状に配列しゲート線及び信号線でマト
リクス状に接続したアクティブマトリクス基板と透明電
極を有する対向基板とにはさまれた液晶からなるアクテ
ィブマI・リクス型液晶表示装置において、前記アクテ
ィブマトリクス基板側の少なくとも前記ゲート線の上部
に前記ゲート線と絶縁しかつ前記対向基板側の前記透明
電極から少なくとも前記ケート線を電気的にシールドす
るシールド電極を設け、前記シールド電極を前記透明電
極と同電位にして構成されている。
The active matrix liquid crystal display device of the present invention comprises an active matrix substrate in which thin film transistors connected to pixel electrodes as switching elements are arranged in an array and connected in a matrix by gate lines and signal lines, and a counter substrate having a transparent electrode. In an active matrix type liquid crystal display device comprising a liquid crystal sandwiched between the active matrix substrate side, at least the upper part of the gate line is insulated from the gate line, and at least the transparent electrode on the opposite substrate side is insulated from the gate line. A shield electrode for electrically shielding the cable is provided, and the shield electrode is made to have the same potential as the transparent electrode.

また、上記構成において、前記シールド電極が、余分な
光を遮光するブラックマトリクスを兼ねる構成とするこ
ともでき、さらに前記シールド電極か、前記信号線の上
部にも設けられ、前記信号線に対応する位置に前記信号
線の大きさを越えない大きさの窓を有する構成とするこ
ともできる。
Further, in the above configuration, the shield electrode may also be configured to serve as a black matrix that blocks excess light, and furthermore, the shield electrode may be provided on the signal line or above the signal line, and the shield electrode may be provided on the signal line. It is also possible to have a configuration in which a window having a size not exceeding the size of the signal line is provided at the position.

〔作用〕 本発明によれば、ゲート線上に対向基板の透明電極との
間にシールド電極が存在しこれが透明電極と同電位にな
っているため、この間に存在する液晶には全く電界がか
からず直流電圧による劣化は起こらない。すなわち、こ
のシールド電極はゲート線上の電圧変化を透明電極に対
しシールドするように形成されているため、ゲート線の
影響は透明電極につ・たわらないのである。
[Operation] According to the present invention, there is a shield electrode on the gate line between the transparent electrode of the counter substrate and the shield electrode has the same potential as the transparent electrode, so that no electric field is applied to the liquid crystal existing between the shield electrode and the transparent electrode. No deterioration due to DC voltage occurs. That is, since this shield electrode is formed to shield the transparent electrode from voltage changes on the gate line, the influence of the gate line does not affect the transparent electrode.

また、このシールド電極が遮光膜(ブラックマトリクス
)を兼ねることにより、画素の開口率が向上する。なぜ
ならば、現在の技術では薄膜トランジスタを形成する半
導体プロセスで用いる露光機の方が、液晶の基板の張り
合わせよりも1桁以上精度が良く、マージンの設定を小
さくできるからである。
Further, since this shield electrode also serves as a light shielding film (black matrix), the aperture ratio of the pixel is improved. This is because, with current technology, the exposure machines used in the semiconductor process for forming thin film transistors are more than an order of magnitude more accurate than the bonding of liquid crystal substrates, and the margin can be set smaller.

さらに、請求項3記載した信号線上部に形成された窓は
、信号線とシールド電極の間にできる容量を小さくする
ことができ、動作速度を損なうことなく、ゲート線のシ
ールドと信号線及びゲート線の遮光とができる。
Furthermore, the window formed above the signal line according to claim 3 can reduce the capacitance formed between the signal line and the shield electrode, and can reduce the capacitance between the shield of the gate line and the signal line and the gate without impairing the operation speed. Can be used to shade lines.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

(実施例1) 第1図は本発明の一実施例の平面図、第2図はその断面
図を示している。第1図及び第2図において、101は
信号線、102はアルミからなるゲート線、103は画
素電極、104は薄膜トランジスタ、105はクロムか
らなるシールド電極兼ブラックマトリクス、201,2
14はガラス基板、202は多結晶シリコンからなる薄
膜トランジスタの活性層、203は二酸化シリコンから
なるゲート絶縁膜、204はドーピングした多結晶シリ
コンからなるゲート電極、206はインジウム酸化スズ
からなる透明電極、207は窒化シリコンからなる眉間
絶縁膜、209,211はポリイミドからなる配向処理
膜、210は液晶、212はインジウム酸化スズからな
る透明電極である対向電極、213はカラーフィルタで
ある。
(Embodiment 1) FIG. 1 is a plan view of an embodiment of the present invention, and FIG. 2 is a sectional view thereof. 1 and 2, 101 is a signal line, 102 is a gate line made of aluminum, 103 is a pixel electrode, 104 is a thin film transistor, 105 is a shield electrode and black matrix made of chromium, 201, 2
14 is a glass substrate, 202 is an active layer of a thin film transistor made of polycrystalline silicon, 203 is a gate insulating film made of silicon dioxide, 204 is a gate electrode made of doped polycrystalline silicon, 206 is a transparent electrode made of indium tin oxide, 207 209 and 211 are alignment treatment films made of polyimide, 210 is a liquid crystal, 212 is a transparent counter electrode made of indium tin oxide, and 213 is a color filter.

第1図、第2図から分かるようにゲート線102とゲー
ト電極204はシールド電極兼ブラックマトリクス1.
05に完全に覆われている。また、このシールド電極兼
ブラックマトリクス105は対向基板の透明電極、すな
わち対向電極212と同電位に保たれており、特に第2
図から明らかなように、ゲート線102上部に位置する
液晶210に直流電圧成分がかからないようになってい
る。
As can be seen from FIGS. 1 and 2, the gate line 102 and the gate electrode 204 serve as the shield electrode and black matrix 1.
It is completely covered by 05. Further, this shield electrode/black matrix 105 is kept at the same potential as the transparent electrode of the counter substrate, that is, the counter electrode 212, and especially the second
As is clear from the figure, no DC voltage component is applied to the liquid crystal 210 located above the gate line 102.

この例においては、請求項2で述べたように、ゲート線
102を対向基板の透明電極(対向電極212)に対し
てシールドする電極がブラックマトリクスの一部を兼ね
ているくシールド電極兼ブラックマトリクス105)。
In this example, as stated in claim 2, the electrode that shields the gate line 102 from the transparent electrode (counter electrode 212) of the counter substrate also serves as a part of the black matrix. 105).

このブラックマトリクスはアクティブマトリクス基板に
作りつけるため対向基板で目合わせをするよりも精度よ
く形成できるという利点がある。ただし、ゲート線10
2上にしか存在しないため対向基板に信号線101の部
分を遮光するストライプ状のブラックマトリクスが必要
である。
Since this black matrix is formed on the active matrix substrate, it has the advantage that it can be formed more accurately than when alignment is performed on the opposing substrate. However, gate line 10
2, it is necessary to provide a striped black matrix on the opposing substrate to shield the signal line 101 from light.

(実施例2) 第5図は本発明のアクティブマトリクス型液晶表示装置
の他の実施例を示している。第5図において、505は
シールド電極兼ブラックマトリクスであり、信号線10
1.ゲート線1021画素電極103及び薄膜トランジ
スタ104は第1図と同様のものである。
(Embodiment 2) FIG. 5 shows another embodiment of the active matrix liquid crystal display device of the present invention. In FIG. 5, 505 is a shield electrode and black matrix, and the signal line 10
1. The gate line 1021, pixel electrode 103, and thin film transistor 104 are the same as those shown in FIG.

この実施例は信号線101上部にもシールド電極を設け
たものである。先に述べたように信号線101には疑似
的に交流電圧がかかるが、薄膜トランジスタ104で発
生するいわゆるフィールドスルーなどの信号電位変化を
見込んで少し直流バイアスをかけておくことがある。従
って、この例は信号線101で発生する直流電圧をもカ
ットする場合を示したものである。また、同時にブラッ
クマトリクスと兼用した例(請求項2)として示しであ
る。
In this embodiment, a shield electrode is also provided above the signal line 101. As described above, a pseudo AC voltage is applied to the signal line 101, but a slight DC bias may be applied in anticipation of signal potential changes such as so-called field-through occurring in the thin film transistor 104. Therefore, this example shows a case where the DC voltage generated on the signal line 101 is also cut. This is also shown as an example (claim 2) in which it is also used as a black matrix at the same time.

(実施例3) 第6図は本発明の請求項3の一実施例を示して= 9 いる。第6図において、605はシールド電極兼フラッ
クマI・リクス、606は信す線101上部のシール1
〜電極兼ブラックマトリクス605にあけた窓を示して
いる。信η線101.ゲート線102、画素電極103
及び薄膜トラ〉′ジスタ104ζj第1図と同様のもの
である。
(Embodiment 3) FIG. 6 shows an embodiment of claim 3 of the present invention. In FIG. 6, 605 is a shield electrode and flux matrix, and 606 is a seal 1 above the believing wire 101.
~A window opened in the electrode/black matrix 605 is shown. Shin η line 101. Gate line 102, pixel electrode 103
and a thin film transistor 104ζj similar to that shown in FIG.

この実施例3と実施例2の違いはシールド電極にあけた
窓である。この窓の効果を第7図に示す本発明のアクテ
ィブマl□、リクス型液晶表示装置(請求項2,3)の
等価回路を使って説明する。
The difference between Example 3 and Example 2 is the window provided in the shield electrode. The effect of this window will be explained using the equivalent circuit of the active multi-mode liquid crystal display device (claims 2 and 3) of the present invention shown in FIG.

第7図において1.01は信号線、102はグー■・線
、104は薄Ml・ランジスタ、212は対向電極、7
05は液晶を示す等価容量、706はシールド電極兼フ
ラックマトリクス505.605ど信号線101との間
にできる容量、707はシールド電極兼ブラックマI・
リクス505,605とゲート線102との間にできる
容量である。
In FIG. 7, 1.01 is a signal line, 102 is a goo wire, 104 is a thin Ml transistor, 212 is a counter electrode, 7
05 is the equivalent capacitance indicating the liquid crystal, 706 is the capacitance formed between the shield electrode and flux matrix 505, 605 and the signal line 101, and 707 is the shield electrode and black matrix I.
This is the capacitance created between the gate line 102 and the gate line 102.

第7図に示すように本発明のアクティブマトリクス型液
晶表示装置においては、シールド電極を設Cすなことに
より対向電極212とゲート線]、 02 、信号線1
01の間に706.707等の容量が発生ずる。これら
の容量は信号やゲートパルスの遅延を招くためできるな
Cづ小さいことか望才しい。この遅延により画素数や配
線月利の抵抗値、駆動回路の駆動能力などが制限される
可能性かある。その制限が信号線101について発生ず
る場合にはこの窓606を採用することにより重なり部
分の面積を減らして容量を小さくし、遅延を低減するこ
とかできるのである。信号線]01のシールドをする必
要がない場合には信号線101」−にシール1〜電極は
必要とならないため、遮光の効果を損なわない限り容量
を発生ずるシールド電極は必要ないのである。
As shown in FIG. 7, in the active matrix liquid crystal display device of the present invention, by providing a shield electrode, a counter electrode 212, a gate line], 02, and a signal line 1 are connected.
01, a capacity such as 706.707 is generated. Since these capacitances cause delays in signals and gate pulses, it is desirable to make them as small as possible. This delay may limit the number of pixels, the resistance value of the wiring, the driving ability of the drive circuit, etc. If this restriction occurs for the signal line 101, by employing this window 606, the area of the overlapping portion can be reduced, the capacitance can be reduced, and the delay can be reduced. If there is no need to shield the signal line 01, there is no need for the seal 1 to electrode on the signal line 101'-, so there is no need for a shield electrode that generates capacitance as long as it does not impair the light shielding effect.

〔発明の効果] (請求項1に対する効果) 現在液晶の劣化を定量的に表現することは難しい。なぜ
ならば液晶や配向膜の祠質の違いや形成条件の違いなど
によって焼きイ」けが現れたり、むらが現れなり、し2
みが広かったりといろいろなモートの画質劣化か現れる
からである。そこで作製したアクう−イブマトリクス型
液晶表示装置と従来の装置についで同・柴イ′↑の静止
画を20時間表示させ別の画面に切り替えたときの残像
の有無1)まり焼き付ζ・lを見て首l、悪し、の定性
的な判断をした1、七の結果、従来のものでは明らかな
残像か残っなが本発明のもの゛(、ζ」持に残像j)シ
、きものは見らノ1なかっlr。この、二とからシール
ド電極は明らかに効果かある。ニニどか力かった。
[Effects of the Invention] (Effects on Claim 1) Currently, it is difficult to quantitatively express the deterioration of liquid crystals. This is because burnouts and unevenness may appear due to differences in the abrasive quality of the liquid crystal or alignment film, differences in formation conditions, etc.
This is because the image quality of various motes appears to be degraded, such as when the shading is wide. Using the Aku-Eve matrix type liquid crystal display device that we created and the conventional device, we displayed still images of Shibai'↑ for 20 hours and whether or not there was an afterimage when switching to another screen 1) Mari-image ζ As a result of 1 and 7, I made a qualitative judgment as to whether the head was bad or not by looking at the image.The results of 1 and 7 are that the conventional model leaves a clear afterimage, but the present invention has an afterimage. I can't see it.lr. From these two points, the shield electrode is clearly effective. It was so powerful.

(請求項2に列する効果) シールド電極かブラ・ツクマトリクスを兼ねることによ
り、先に述べたよ・)に開口率が向1. t、 1::
 。
(Effects listed in claim 2) By serving as a shield electrode or a black matrix, the aperture ratio can be increased to 1. t, 1::
.

例えば高精細表示装置用で画素ビ・・lグか90ミクロ
ン角の場合、従来の対向基板の目合わせ精度が+/−5
ミクロンであったため、このマージンを2慮し5で開口
率(,540%(1J満たないものとなっていた。これ
(、ご対j2本発明のアクティブマトリクス型液晶表示
装置では露光機の目自わせ精度が1ミタ0ン以下である
ため00%弱の開口率を実現てきた。この結果画面の明
るさを50%も向」−させることがてきた3、目合わせ
精度は画素ピッ−1に依存L7ないlrめ、画素が小さ
くなるほど効果は大きくなる。
For example, in the case of a high-definition display device with a pixel width of 90 microns, the alignment accuracy of the conventional opposing substrate is +/-5.
Therefore, considering this margin, the aperture ratio was 540% (less than 1J). Since the alignment accuracy is less than 1 mta, we have achieved an aperture ratio of just under 00%.As a result, we have been able to increase the brightness of the screen by as much as 50%3. Depending on L7 and lr, the smaller the pixel, the greater the effect.

(請求項3G、二対する効果) シールド電極兼ブラックマトリクスに窓を形成l、ノこ
効果は画面が大型化するほど、また、画素数が多くなる
ほど大きくなる。これは大型化するほど配線抵抗、容量
ともに増大し7、画素数が多くなるほと信号線とゲート
線の重なり部分が多くな−)て、シアー /l川・電極
を(qりる前の容量が増大するな入1′)である。
(Claim 3G, Effects for 2) Forming a window in the shield electrode/black matrix 1 The saw effect becomes larger as the screen becomes larger and as the number of pixels increases. This is because as the size increases, both wiring resistance and capacitance increase7, and as the number of pixels increases, the overlap between the signal line and gate line increases. The capacitance will not increase (1').

一例とし7ての画面のサイズが対角10インチて画素数
か水平64. OX 3 ” 1920 、垂直480
のパーソナルコンピュータ用の表示装置の場合について
述べる。この場合ゲート線の方か長く、l、かも交差す
る配線数も4倍多い。しかし、この例で(jゲ・−1・
線がアルミ配線であるのに対し 信り線の方はゲート線
と交差する部分で多結晶シリ:7ンの配線を使っ”ζア
ルミ配線を接続し、ているため抵抗の値か2桁以」―大
きく、結果的に遅延は化+3線のJ3が1桁近く大きな
ものとなっている。
For example, if the screen size is 10 inches diagonally and the number of pixels is 64 horizontally. OX 3” 1920, vertical 480
The case of a display device for a personal computer will be described. In this case, the gate line is longer, and the number of intersecting lines is four times greater. However, in this example (jge・−1・
The line is made of aluminum wiring, whereas the trust line uses polycrystalline silicon wiring at the part where it intersects with the gate line to connect the ζ aluminum wiring, so the resistance value is more than 2 digits. ” - large, and as a result, the delay for J3 on the +3 line is nearly an order of magnitude larger.

これに本発明の特徴であるシールド電極前ブラックマI
・リクスを適用すると、ゲートパルスは十分な速度で伝
達できたが、信号は駆動回路から最も遠い画素で遅延の
ため1インチの時間内に70%までしか伝達できなかっ
た。しかし、これに請求項3の窓を適用しなところ信号
書き込み時間に1.5倍のマージンを見込んで100%
信号を伝達することができた。
In addition, the black mask I in front of the shield electrode, which is a feature of the present invention,
- When applying RISK, the gate pulse could be transmitted at a sufficient speed, but the signal could only be transmitted up to 70% within 1 inch due to the delay at the pixel farthest from the drive circuit. However, if the window of claim 3 is not applied to this, a margin of 1.5 times is expected for the signal writing time, and 100%
able to transmit signals.

【図面の簡単な説明】[Brief explanation of the drawing]

第11図及び第2図はそれぞれ本発明の一実施例の平面
図及び断面図、第3図はアクティブマI・リクス基板の
等価回路を示す図、第4図はゲートパルスと対向電極電
位の関係を示す図、第5図及び第6図はそれぞれ本発明
の他の実施例を示す平面図、第7図は本発明のアクティ
ブマトリクス型液晶表示装置の等価回路を示す図である
。 101・・・信号線、102・・・ゲート線、103・
・・画素電極、104・・・薄膜トランジスタ、105
゜505.605・・・シールド電極兼ブラックマトリ
クス、201,214・・・ガラス基板、202・・・
薄膜トランジスタの活性層、203・・・ゲート絶縁膜
、204・・・ゲーI・電極、206・・・透明電極、
207・・・層間絶縁膜、209,211・・・配向処
理膜、210・・・液晶、212・・・対向電極、21
3・・・カラーフィルタ、606・・・窓。
11 and 2 are respectively a plan view and a sectional view of an embodiment of the present invention, FIG. 3 is a diagram showing an equivalent circuit of an active matrix I/RIX substrate, and FIG. 4 is a diagram showing a gate pulse and a counter electrode potential. 5 and 6 are plan views showing other embodiments of the present invention, and FIG. 7 is a diagram showing an equivalent circuit of the active matrix liquid crystal display device of the present invention. 101... Signal line, 102... Gate line, 103...
... Pixel electrode, 104 ... Thin film transistor, 105
゜505.605...Shield electrode and black matrix, 201,214...Glass substrate, 202...
Active layer of thin film transistor, 203... Gate insulating film, 204... Gate I electrode, 206... Transparent electrode,
207... Interlayer insulating film, 209, 211... Alignment treatment film, 210... Liquid crystal, 212... Counter electrode, 21
3...Color filter, 606...Window.

Claims (1)

【特許請求の範囲】 1、薄膜トランジスタをスイッチング素子として画素電
極に接続したものをアレイ状に配列しゲート線及び信号
線でマトリクス状に接続したアクティブマトリクス基板
と透明電極を有する対向基板とにはさまれた液晶からな
るアクティブマトリクス型液晶表示装置において、前記
アクティブマトリクス基板側の少なくとも前記ゲート線
の上部に前記ゲート線と絶縁しかつ前記対向基板側の前
記透明電極から少なくとも前記ゲート線を電気的にシー
ルドするシールド電極を設け、前記シールド電極を前記
透明電極と同電位にしたことを特徴とするアクティブマ
トリクス型液晶表示装置。 2、前記シールド電極が、余分な光を遮光するブラック
マトリクスを兼ねることを特徴とする請求項1記載のア
クティブマトリクス型液晶表示装置。 3、前記シールド電極が、前記信号線の上部にも設けら
れ、前記信号線に対応する位置に前記信号線の大きさを
越えない大きさの窓を有することを特徴とする請求項2
記載のアクティブマトリクス型液晶表示装置。
[Claims] 1. An active matrix substrate in which thin film transistors connected to pixel electrodes as switching elements are arranged in an array and connected in a matrix with gate lines and signal lines, and a counter substrate having a transparent electrode is sandwiched between the active matrix substrate and the opposite substrate having a transparent electrode. In the active matrix type liquid crystal display device, the active matrix liquid crystal display device includes at least the gate line on the side of the active matrix substrate, which is insulated from the gate line, and electrically connects at least the gate line from the transparent electrode on the opposite substrate side. An active matrix type liquid crystal display device, characterized in that a shield electrode is provided for shielding, and the shield electrode is made to have the same potential as the transparent electrode. 2. The active matrix liquid crystal display device according to claim 1, wherein the shield electrode also serves as a black matrix that blocks excess light. 3. Claim 2, wherein the shield electrode is also provided above the signal line, and has a window at a position corresponding to the signal line, the size of which does not exceed the size of the signal line.
The active matrix liquid crystal display device described above.
JP2182017A 1990-07-10 1990-07-10 Active matrix type liquid crystal display device Pending JPH0469622A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2182017A JPH0469622A (en) 1990-07-10 1990-07-10 Active matrix type liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2182017A JPH0469622A (en) 1990-07-10 1990-07-10 Active matrix type liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH0469622A true JPH0469622A (en) 1992-03-04

Family

ID=16110882

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2182017A Pending JPH0469622A (en) 1990-07-10 1990-07-10 Active matrix type liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH0469622A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04319920A (en) * 1991-04-19 1992-11-10 Sharp Corp Active matrix liquid crystal display
EP0660160A1 (en) * 1993-07-13 1995-06-28 Kabushiki Kaisha Toshiba Active matrix type display device
EP0664473A1 (en) * 1993-12-24 1995-07-26 Kabushiki Kaisha Toshiba Active matrix type display device and manufacturing method thereof
EP0762180A1 (en) * 1995-07-31 1997-03-12 Sony Corporation Transmissive display device
JPH10293286A (en) * 1997-02-21 1998-11-04 Toshiba Corp Driving method for liquid crystal display device
US7161640B2 (en) * 2004-01-07 2007-01-09 Hannstar Display Corporation Shield junction thin film transistor structure
JP2008020613A (en) * 2006-07-12 2008-01-31 Hitachi Displays Ltd Display apparatus

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6397919A (en) * 1986-10-15 1988-04-28 Seiko Epson Corp Liquid crystal panel
JPS6442635A (en) * 1987-08-11 1989-02-14 Asahi Glass Co Ltd Active matrix type display element
JPH01306820A (en) * 1988-06-03 1989-12-11 Hitachi Ltd Liquid crystal display device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6397919A (en) * 1986-10-15 1988-04-28 Seiko Epson Corp Liquid crystal panel
JPS6442635A (en) * 1987-08-11 1989-02-14 Asahi Glass Co Ltd Active matrix type display element
JPH01306820A (en) * 1988-06-03 1989-12-11 Hitachi Ltd Liquid crystal display device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04319920A (en) * 1991-04-19 1992-11-10 Sharp Corp Active matrix liquid crystal display
EP0660160A1 (en) * 1993-07-13 1995-06-28 Kabushiki Kaisha Toshiba Active matrix type display device
EP0660160A4 (en) * 1993-07-13 1996-07-31 Toshiba Kk Active matrix type display device.
EP0664473A1 (en) * 1993-12-24 1995-07-26 Kabushiki Kaisha Toshiba Active matrix type display device and manufacturing method thereof
EP0762180A1 (en) * 1995-07-31 1997-03-12 Sony Corporation Transmissive display device
US5818552A (en) * 1995-07-31 1998-10-06 Sony Corporation Transmissive display device having two reflection metallic layers of differing reflectances
JPH10293286A (en) * 1997-02-21 1998-11-04 Toshiba Corp Driving method for liquid crystal display device
US7161640B2 (en) * 2004-01-07 2007-01-09 Hannstar Display Corporation Shield junction thin film transistor structure
JP2008020613A (en) * 2006-07-12 2008-01-31 Hitachi Displays Ltd Display apparatus

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