JPH0461247A - Squad flat package - Google Patents
Squad flat packageInfo
- Publication number
- JPH0461247A JPH0461247A JP2171738A JP17173890A JPH0461247A JP H0461247 A JPH0461247 A JP H0461247A JP 2171738 A JP2171738 A JP 2171738A JP 17173890 A JP17173890 A JP 17173890A JP H0461247 A JPH0461247 A JP H0461247A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- wiring board
- grounding
- base
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 20
- 239000004020 conductor Substances 0.000 abstract description 14
- 239000005394 sealing glass Substances 0.000 abstract description 5
- 239000011347 resin Substances 0.000 abstract description 3
- 229920005989 resin Polymers 0.000 abstract description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract 2
- 229910052802 copper Inorganic materials 0.000 abstract 2
- 239000010949 copper Substances 0.000 abstract 2
- 238000009413 insulation Methods 0.000 abstract 2
- 230000007261 regionalization Effects 0.000 abstract 1
- 239000000758 substrate Substances 0.000 description 7
- 239000000919 ceramic Substances 0.000 description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 5
- 238000007789 sealing Methods 0.000 description 3
- 229920000742 Cotton Polymers 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- 235000019687 Lamb Nutrition 0.000 description 1
- 241000269815 Pomoxis Species 0.000 description 1
- 241000973887 Takayama Species 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910000833 kovar Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- -1 quaso Substances 0.000 description 1
- 239000002689 soil Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/79—Apparatus for Tape Automated Bonding [TAB]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体装置用として、半導体装ｒ−を気密封
止して収納するクワ・７ド・フラット・パッケージ（Ｑ
ｕａｄ Ｆｌａｔ Ｐａｃｋ、ａｇｅ）に関し、特に半
導体素子とリードフレームとが高耐熱フＬ・キシプル配
線板にて接続されているクワッド・フラット・パッケー
ジに関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a quad flat package (Q) for use in semiconductor devices, in which a semiconductor device is hermetically sealed.
The present invention relates to a quad flat package in which a semiconductor element and a lead frame are connected by a highly heat-resistant flexible wiring board.
望積回路の高集積化に伴−７て、゛１モ導体素子を収納
する１２導体装置用のパッケージにおける多ビン化は急
激に進んでいる。そしで、多ピン化に対応できるパッケ
ージとして、４方向に外部配線用のリードフレームが延
在し７てセラミック製のノ＼つ】・ングを有するセラミ
ック・クワット・フラット・パッケージが知られている
。この種のバ・フリーダの代表的な例は、セラミック製
の基板に半導体装ｒを固着さ一廿、この基板の外縁部に
シーリングガラスを介して外部配線用のり一トフレー１
、を同着させ、更にシーリングガラスを介してリードフ
し・−ムードにセラミ・７り製の蓋体を同着させた構成
をなす。With the increasing integration of desired circuits, the number of bins in packages for 12-conductor devices that accommodate 1-molar conductor elements is rapidly increasing. Therefore, a ceramic quad flat package is known as a package that can accommodate an increased number of pins, and has a lead frame for external wiring extending in four directions and a ceramic groove. . A typical example of this type of bar reader is a semiconductor device r fixed to a ceramic substrate, and a glue frame 1 for external wiring attached to the outer edge of the substrate via a sealing glass.
, are attached together, and a lid made of ceramic and 70% is attached to the lid through a sealing glass.
１−述したような構成をなすセラミ・７り・り・ノット
・クワット・パッケージにおい°６半導体素子とリード
フレームとをＴＡＢ（Ｔａｐｅ Ａｕｔｏｍａｔｅｄ
ＢｏｎｃｌｉｎＨ）テープ等の高耐熱フレキシブル配線
板にて接Ｖｊさセることが考案されている。これば、ク
ワ・ノド・フラット・パッケージの特性と高山」熱フレ
キシブル配線板の特性とをそれぞれ活かして、高密度化
電気的特性の向上及び気密Ｉｔ ＩＪ−性のＧ化を図る
パッケージごある◇
（発明が解決しようとする課題］
ところが、高面１坤じ７ Ｌ、 ４’ ：：、プル配線
板を用いイ）このよ・うなｔｌ＆ 成のり１，１ソトパ
ノラソトバ、＋ ／ツレで１、ま、半導体素ｒにおける
高周波ネ５性の影響イー考慮し７Ｃおらづ”、史なる改
良の余地があっ人二゛。1- In a ceramic 7-ri knot-quat package configured as described above, a 6 semiconductor element and a lead frame are assembled by TAB (Tape Automated).
It has been devised to connect Vj with a highly heat-resistant flexible wiring board such as Bonclin H) tape. This is a package that takes advantage of the characteristics of the Kuwa-nod flat package and the characteristics of the Takayama thermo-flexible wiring board to improve high-density electrical characteristics and achieve airtightness.◇ (Problem to be solved by the invention) However, when using a high surface 1 7 L, 4'::, pull wiring board, a) such a tl & 1,1 sotopanorasotoba, + / 1, or Considering the influence of high-frequency properties on semiconductor elements, there is still room for improvement.
本発明はかかる事情６１″、鑑のでなされたもの°こあ
り、半導体素子の特性に自せた特性インピーダンスを有
する分布定数′ｇ５にてり・−ドフＩ・−ノ、及び、／
または高耐熱フＩ、・キシゾル配線板を構成することに
より、半導体素ｒの高周波特性を考慮（２，て電気的特
性を向−トできるクワ７・ド・フシソ［・パンが−ジを
提供すること４目的とする。The present invention has been made in view of the above circumstances, and is based on a distributed constant 'g5 having a characteristic impedance matching the characteristics of a semiconductor element.
Alternatively, by configuring a high heat resistant film, the high frequency characteristics of the semiconductor element can be taken into account (2. 4 objectives.
本発明ζご係るり”ニア ７ド・フレ、）、バ、２ヶ、
−ジは、半導体素子とリードフレームとを高耐熱フレキ
シブル配線板ｔ、−で接続し７であるクワ２ド・ソーノ
ン）・バ、ツノｙ−ジにおいて、前記υ−＃：’ −；
７１／−ム及び／′土たし。”； １Ｖｉｉ記高耐熱フ
Ｌ／Ａシブル配綿枦を分４ｊ定数線路にこ構成しご：あ
る、−とを特徴と４る。Regarding the present invention
-ji connects the semiconductor element and the lead frame with a high heat-resistant flexible wiring board t, -, and in the quadruple t, -ji which is 7, the above-mentioned υ-#:'-;
71/-mu and/' soil. "; 1Vii Highly heat resistant fabric L/A flexible cotton distribution ladder constructed with 4j constant lines: Features: 4.
［１１月１］
４・発明のクワット・“、ハク・、・１ ・ベソリ“−
ジにあ−）７は、゛１′導体素ｆの特１１トイ゛７・ビ
ーダンスとり −１′−フレーＪ・及び／または高耐熱
ツレキシゾル配線板の特性インピーダンス＜：１ノｈＫ
合っている４、〔実施例〕
以Ｉ・、本発明をその実施例を示す図面（５、て基づい
て尺体的に説明３゛る。[November 1] 4. Invention of Kuat・“、Haku・・・１・Besori“−
7 is the characteristic impedance of the conductor element f.
4. [Embodiments] Hereinafter, the present invention will be described schematically based on drawings (5) showing embodiments thereof.
第１図は本発明に係るクリッド・））ノド・パッケージ
の断面図でよ、す、図中１は基板苓示寸。FIG. 1 is a cross-sectional view of the lid/nod package according to the present invention. In the figure, 1 indicates the size of the board.
基板１は、アルミプ゛製の基体１ａと、基体１ａ十に形
成されたアース用の導体１１）と１、基体１，１の夕）
縁部十にＷ体ｌｂを介して設けられたアルミナ製の縁部
基体１ｃとから構成さ４７八′−いる。基板Ｊの中央部
には、熱伝導性樹脂２４．介して半導体素子３が固着さ
れ−でいる。また、５＋ｆｆ１ｌの縁部基体１ｃには、
リー［“Ｖ Ｌ、 −１，４における祥数本の信号用ビ
ン４．ａ（第１図には１本のめ図示）と、リードフＩｉ
ｉ、４ζ１こ台６Ｊる１本の）” ＝−ス用ビ゛：’
４ ｂとが、例えばｉ’ ｂ Ｏ−Ｖ ｚ Ｏ！。The substrate 1 includes a base 1a made of aluminum, a grounding conductor 11) formed on the base 1a, and a ground conductor 11) formed on the base 1a and the base 1, 1).
An edge base body 1c made of alumina is provided on the edge part 1 through a W body 1b. At the center of the substrate J, a thermally conductive resin 24. The semiconductor element 3 is fixed thereto. In addition, in the edge base 1c of 5+ff1l,
Several signal bins 4.a (the first one is shown in Figure 1) at V L, -1, 4, and lead f Ii
i, 4ζ 1 piece 6J 1 piece)"=-Base for base:'
4 b, for example, i' b O−V z O! .
系ガ・ンスからなるシーリングガラス５により１司着さ
れている。アース用ビン４１）はアース用の導体１ｂと
接続されている。リードフレーム４（ＡＡＡ質は、コバ
ールまたは４２合企ごある。リードフレー１、・１の各
ビンの先端部は１、金メ・ツキまた：４、」′［旧メ２
・キが施されていて接続、部となっている。イし−こ、
リートソＩ／−ム４（信号用ビン４ａ、アース用ビン、
１．ｂ）のこの各接続部と、￥：導体素子３の各電極と
は高耐熱フし・キシプル配線板６により接続、されてい
る。It is covered with a sealing glass 5 made of glass. The earthing bin 41) is connected to the earthing conductor 1b. Lead frame 4 (AAA quality is available in Kovar or 42 joints. The tip of each bottle of lead frame 1, 1 is 1, gold plated and 4.
・The connections and parts are marked with keys. Ishiko,
Ritosom I/-me 4 (signal bin 4a, ground bin,
1. Each of the connection parts b) and each electrode of the conductor element 3 are connected by a high heat-resistant foil/xypul wiring board 6.
シーリングガラス５Ｇごは、半導体素子３を１」止する
よ・うにアルミナ製の蓋体７が固着されている。A lid 7 made of alumina is fixed to the sealing glass 5G so as to stop the semiconductor element 3 by 1 inch.
第２図、第３図は−１、述の高耐熱ルキシグル配線板６
の側面図及び平面図である。高耐熱フＬ、−キシプル配
線板６は、ポリイミド樹脂からなる絶縁部６ｂとＣ＋１
からなる′アース部６（：との積層体に（ｌ ｕからな
る多数本の（３号線部６ａをパターン形成した構成をな
す。各信号用ビン４ａの接続部は、高耐熱］Ｌ・片シプ
ル配綿板６の信号線部６ａを介して゛ト導体素了３の対
ｂｚ、する各電極と接続し、アース用ビン４ｂの接続部
は、アース部６【、を介して半導体素ｐ−３の電極と接
続している。Figures 2 and 3 are -1 and the high heat resistant Luxiglu wiring board 6.
FIG. 2 is a side view and a plan view. The high heat-resistant plastic wiring board 6 has an insulating part 6b made of polyimide resin and a C+1
It has a structure in which a large number of line 3 line parts 6a consisting of (lu) are patterned on a laminated body of a grounding part 6 (:) consisting of a The connection part of the earthing bin 4b is connected to each electrode of the conductor element 3 through the signal line part 6a of the cable distribution board 6, and the connection part of the grounding bin 4b is connected to the semiconductor element p- Connected to electrode 3.
イ゛して、このリードフ１．・−ム４及び高耐熱−ノＬ
−ギシゾル配線板６（ま、゛１′−導体素子３の特性Ｃ
，＝合わせた同一・の特性インピーダンスを有１ｚ〕分
布定数線路にて構成さねでいる。本実施例のように１片
−ト ７レー１．４及び高耐熱フレキシグル配線板６を
何れも分布定数線路Ｃコて構成する場合には、両方の特
性インピーダンスを一致させる必要がある。Then, this lead 1.・-mu 4 and high heat resistance-no L
- Gishizol wiring board 6 (well, 1' - Characteristics C of conductor element 3
, = the same combined characteristic impedance. When the one-piece tray 1.4 and the highly heat-resistant flexible wiring board 6 are both constructed using distributed constant lines C as in this embodiment, it is necessary to match the characteristic impedances of both.
なお、リードフレーム４または高面］熱フＬ−４ジブル
配線択６の−・方のみを分子ｊ定数線路にて構成するこ
ととし、でも良い。Incidentally, only the lead frame 4 or the high surface] thermal flux L-4 flexible wiring option 6 may be configured with a numerator j constant line.
リートフレ・〜１゜４．高耐熱゛ルキシゾル配線机（ｊ
の特性インピーダンスを調整するには、次のようにずれ
ば良い。リードフＬ、−，ｉ、４の特性インピーダンス
を調整するためには、リードフし・−）、４０幅と基板
１の縁部基体１ｃの高さとを調整する。Lietfre ~1゜4. High heat resistant “roxisol wiring desk” (j
To adjust the characteristic impedance of , shift as follows. In order to adjust the characteristic impedance of the lead leaf L,-,i,4, the width of the lead leaf L,-,i,40 and the height of the edge base 1c of the substrate 1 are adjusted.
高耐熱フレキシブル配線板６の特性インピーダンスを調
整づ−るためには、信号線部６．］の幅と絶縁部６ｂの
厚さと絶縁部６ｂの材質とを調整する。In order to adjust the characteristic impedance of the highly heat-resistant flexible wiring board 6, the signal line portion 6. ], the thickness of the insulating part 6b, and the material of the insulating part 6b are adjusted.
次に、このような構成苓なすセラミック・クヮソト・フ
ッソ１−・バノう−ジの組立１順Ｑご・ついて説明する
。アース用の電極Ｈ＋を設りた２、層構造のアルミナ製
の基板１乙こ、リー・叫・フし−ム１１を・′５・リン
グガラス５に゛ζζ同定。９゛１（導体ｆｆＷ−７−３
を熱伝導性樹脂２にご基板１の中央部に同定４”る。パ
・・ングルボイントボンディングによ、シ、高耐熱）し
・キシグル配線板６を１．１−）フレーｊ、４の接続、
部ルび゛＋′ニア導体素子３の電極に接続、−シる。最
移・に、アルミナ製の蓋体７４シーリングガうス５Ｑこ
固着さゼで、半濶体素」′−３の封止４完ｒ′ｉｉイ）
。Next, the procedure for assembling the ceramic, quaso, fluorine, and vane screws having such a structure will be explained. 2. Layered alumina substrate 1 with a grounding electrode H+ installed. Identify the Lee frame 11 to the ring glass 5. 9゛1 (conductor ffW-7-3
Attach the thermally conductive resin 2 to the central part of the board 1 by 1.1-) by int bonding. connection,
The terminals are connected to the electrodes of the near conductor element 3, and - are connected to the electrodes of the near conductor element 3. Next, fix the alumina lid 74 and sealing gas 5Q to complete the sealing of the semi-solid body 4'-3)
.
なお１．１−述した実施例ではアルミナ製のハ・”ｙ）
ング庖有するパッケージ乙こ−）いて説明したが、ハウ
ジング、具体的には基体１ａ、縁部粘体１（・及び蓋体
７はムライ）・、窒化アルミー：−ラム）の３、うな別
のセ゛シミツク４ｍで構成されこいても良い。In addition, in the embodiment described in 1.1-1, alumina is used.
As explained above, the housing, specifically the base 1a, the edge adhesive 1 (and the lid 7), aluminum nitride (lamb), and other adhesives. It may be composed of 4m.
また、−１述し７た実施例は本発明を適用できる１つの
構成例を示”ｑものごあり、半導体素子とり−ドソト・
−ムとが高耐熱フＬ・キシプル配線板に−こ接続、され
こいるようなりリッド・フラット・パソ）ｙ−シフであ
れば、別の構成例においても本発明を通用できることは
一勿論Ｃある。In addition, the embodiment described in 7 shows one example of a configuration to which the present invention can be applied.
It goes without saying that the present invention can be applied to other configuration examples as well, as long as the circuit is connected to a high heat-resistant film L/XP wiring board, and is connected to a lid, flat, PC, etc. be.
〔発明の効［］
以上のように本発明のクリノＦ・フパフノ（・・バラう
−、−ジでは、リート）Ｌ・−ム及び、／″ま−た（・
。Ｙ高耐熱）ｌ、・−１−ジブル配綿＋）ｙが、封止さ
れる゛１′導体素−ｒの特性にＣセた特ｆ↓インピーダ
ンス４イｊする分布定数線路にて構成されζいるので、
本発明：１、）、電気的特性に優れたクソソド・フラッ
ト・バ・・Ｊ。[Effects of the Invention] As described above, the present invention has the following advantages:
. Y high heat resistance) l, -1-dible cotton +) y is composed of a distributed constant line with impedance 4 Since there is ζ,
The present invention: 1.) A crappy flat bar with excellent electrical characteristics.
ジを提供ごきるとい・う効果４奏する。It has 4 effects when you offer it.
第】図は本発明のクワッド・フそ・ノド・バ、）γ−ジ
の構成を示″ｄ断曲図、第２図は本発明のクリア１゛・
ソ’） ン＃’・パッケージ乙ご用いるＫ 耐？？”ル
キこンブル配線板の側面図、第３閏は同し５（ぞの高耐
熱フレキシブル配線板の゛ト面図である。
１・・・基板 ３・・・半導体素子 ４・・・リードフ
Ｕム ５・・・シーリングガうス ６・・・高耐熱フレ
）シブル配線板 ７・・・７体
特 許 出願人 鳴海製向株式会′ｆＪ： （！Ａ、
１名）代理人 弁理士 河 野 立 大第
］
図
第
図Figure 2 shows the configuration of the quad fuselage node of the present invention.
What kind of package do you use? ? "Side view of the flexible wiring board, the third jump is the top view of the highly heat-resistant flexible wiring board. 1...Substrate 3...Semiconductor element 4...Lead leaf U 5...Sealing gas 6...High heat resistant flexible wiring board 7...7 unit patent Applicant Narumi Seiko Co., Ltd.'fJ: (!A,
1 person) Agent: Patent attorney Tatsudai Kawano]
Claims (1)
ル配線板にて接続してあるクワッド・フラット・パッケ
ージにおいて、 前記リードフレーム及び／または前記高耐熱フレキシブ
ル配線板を分布定数線路にて構成してあることを特徴と
するクワッド・フラット・パッケージ。[Claims] 1. In a quad flat package in which a semiconductor element and a lead frame are connected by a high heat resistant flexible wiring board, the lead frame and/or the high heat resistant flexible wiring board is connected to a distributed constant line. A quad flat package characterized by its configuration.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2171738A JPH0461247A (en) | 1990-06-28 | 1990-06-28 | Squad flat package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2171738A JPH0461247A (en) | 1990-06-28 | 1990-06-28 | Squad flat package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0461247A true JPH0461247A (en) | 1992-02-27 |
Family
ID=15928769
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2171738A Pending JPH0461247A (en) | 1990-06-28 | 1990-06-28 | Squad flat package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0461247A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003106636A (en) * | 2001-09-26 | 2003-04-09 | Nippon Plast Co Ltd | Wind direction controller |
| JP2007191100A (en) * | 2006-01-20 | 2007-08-02 | Howa Kasei Kk | Air blow-off adjusting register |
| JP2010530630A (en) * | 2007-06-21 | 2010-09-09 | コミサリア、ア、レネルジ、アトミク、エ、オ、エネルジ、アルテルナティブ | Method for generating a set of chips mechanically interconnected by a flexible connection |
-
1990
- 1990-06-28 JP JP2171738A patent/JPH0461247A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003106636A (en) * | 2001-09-26 | 2003-04-09 | Nippon Plast Co Ltd | Wind direction controller |
| JP2007191100A (en) * | 2006-01-20 | 2007-08-02 | Howa Kasei Kk | Air blow-off adjusting register |
| JP2010530630A (en) * | 2007-06-21 | 2010-09-09 | コミサリア、ア、レネルジ、アトミク、エ、オ、エネルジ、アルテルナティブ | Method for generating a set of chips mechanically interconnected by a flexible connection |
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