JPH0456363A - Variable capacitance diode device - Google Patents
Variable capacitance diode deviceInfo
- Publication number
- JPH0456363A JPH0456363A JP16746290A JP16746290A JPH0456363A JP H0456363 A JPH0456363 A JP H0456363A JP 16746290 A JP16746290 A JP 16746290A JP 16746290 A JP16746290 A JP 16746290A JP H0456363 A JPH0456363 A JP H0456363A
- Authority
- JP
- Japan
- Prior art keywords
- variable capacitance
- capacitance diode
- elements
- semiconductor substrate
- diffusion layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 36
- 238000009792 diffusion process Methods 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 239000003990 capacitor Substances 0.000 abstract description 8
- 239000004020 conductor Substances 0.000 abstract description 7
- 230000008878 coupling Effects 0.000 abstract description 2
- 238000010168 coupling process Methods 0.000 abstract description 2
- 238000005859 coupling reaction Methods 0.000 abstract description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 239000006185 dispersion Substances 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000009291 secondary effect Effects 0.000 description 1
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の産業上の利用分野〕
本発明は、異なった周波数を取り扱う少なくとも二つ以
上の可変容量ダイオード素子が同一半導体基体に形成さ
れた可変容量ダイオード装置に関するものである。[Detailed Description of the Invention] [Industrial Application Field of the Invention] The present invention relates to a variable capacitance diode device in which at least two or more variable capacitance diode elements handling different frequencies are formed on the same semiconductor substrate. .
第３図は、従来の可変容量ダイオード装置であり、第１
導電型の低比抵抗（Ｎ°゛型）の半導体基板１にその基
板より高比抵抗の第１導電型（Ｎ−型）の半導体層２を
形成し、半導体層２に低比抵抗の第１導電型（Ｎ”型）
の拡散層３を形成し、該拡散Ｎ３に第２導電型の拡散層
４（Ｐ”型）を形成する。拡散層３と４によってＰＮ接
合を形成し、拡散層４の主表面露呈部に導電体膜７１．
７３を被着して可変容量ダイオード素子Ａ＋ 、Ａｇの
電極を形成する。６は二酸化シリコン膜等の誘電体膜で
ある。その可変容量ダイオード装置の等価回路が第４図
に示されている。Figure 3 shows a conventional variable capacitance diode device.
A semiconductor layer 2 of a first conductivity type (N- type) having a higher resistivity than that of the substrate is formed on a semiconductor substrate 1 of a conductivity type of low resistivity (N°゛ type); 1 conductivity type (N” type)
A second conductivity type diffusion layer 4 (P" type) is formed in the diffusion layer 3. A PN junction is formed between the diffusion layers 3 and 4, and a Conductor film 71.
73 is deposited to form the electrode of the variable capacitance diode element A+ and Ag. 6 is a dielectric film such as a silicon dioxide film. An equivalent circuit of the variable capacitance diode device is shown in FIG.
通常、可変容量ダイオード素子は、広くラジオ受信機等
のフロントエンド部の同調用素子として用いられている
。ラジオ受信機の局部発振回路と同調回路に用いられる
各可変容量ダイオード素子は、周波数の異なった信号を
取り扱っている為に可変容量ダイオード素子が異なった
パッケージに収納されたものが使用されているのが、−
船釣である。Generally, variable capacitance diode elements are widely used as tuning elements in front end sections of radio receivers and the like. Each variable capacitance diode element used in the local oscillation circuit and tuning circuit of a radio receiver handles signals with different frequencies, so variable capacitance diode elements housed in different packages are used. But-
Boat fishing.
近年、電子機器では、高密度実装が要求されており、異
なった周波数の信号に用いられる可変容量ダイオード素
子を同一の半導体基体に高密度に集積されている多連の
可変容量ダイオード装置が要求されている。In recent years, high-density packaging has been required in electronic devices, and there is a demand for multiple variable capacitance diode devices in which variable capacitance diode elements used for signals of different frequencies are densely integrated on the same semiconductor substrate. ing.
同一半導体基体に二つ以上の可変容量ダイオード素子が
集積されている可変容量ダイオード装置では、可変容量
ダイオード素子Ａ１に隣接する可変容量ダイオード素子
Ａ２の夫々のアノードに異なった周波数の信号が印加さ
れた場合、第４図の等価回路から明らかなようにアノー
ド電極７１と７、間の誘電体膜６がコンデンサＣ０とし
て作用する為に、交流的に両者の素子Ａ＋ 、Ａｔのア
ノード電極が結合してしまい、双方の電極に印加される
信号が混信する欠点があり、この様な高周波の用途には
、この構造では使用できないことになる。従って、従来
は、異なった周波数を取り扱う場合は、各可変容量ダイ
オードを離して集積するか、−素子がパッケージされた
可変容量ダイオード装置を用いるしか平文てがなかった
。しかし、可変容量ダイオード素子を離して同一半導体
基体に形成した場合には、素子の面積が大きくなり、集
積密度が低下すると共に、二個以上の可変容量ダイオー
ド素子を同一の半導体基体に形成すると拡散時の不純物
元素のばらつきが大きくなり、接合容量のばらつきとし
て現れる欠点がある。In a variable capacitance diode device in which two or more variable capacitance diode elements are integrated on the same semiconductor substrate, signals of different frequencies are applied to the respective anodes of variable capacitance diode element A2 adjacent to variable capacitance diode element A1. In this case, as is clear from the equivalent circuit in FIG. 4, since the dielectric film 6 between the anode electrodes 71 and 7 acts as a capacitor C0, the anode electrodes of both elements A+ and At are coupled in an alternating current manner. However, there is a drawback that the signals applied to both electrodes may interfere with each other, and this structure cannot be used for such high frequency applications. Therefore, in the past, when handling different frequencies, the only options were to integrate the variable capacitance diodes separately or to use a variable capacitance diode device in which the elements were packaged. However, if variable capacitance diode elements are formed separately on the same semiconductor substrate, the area of the device becomes large and the integration density decreases, and if two or more variable capacitance diode elements are formed on the same semiconductor substrate, diffusion There is a drawback that the dispersion of impurity elements becomes large during the process, which appears as dispersion of the junction capacitance.
本発明は、上述のような欠点を除く為になされたもので
あって、その主な目的は、同一半導体基体に少なくとも
二つ以上の可変容量ダイオード素子が集積されたもので
あって、互いに異なった周波数の信号が印加されたとし
ても混信することなく取り扱える可変容量ダイオード装
置を提供するものである。The present invention has been made to eliminate the above-mentioned drawbacks, and its main purpose is to provide a device in which at least two or more variable capacitance diode elements are integrated on the same semiconductor substrate, and which are different from each other. The present invention provides a variable capacitance diode device that can handle signals of different frequencies without causing interference even if signals of different frequencies are applied.
本発明の他の目的は、集積密度を高めることができる可
変容量ダイオード装置を提供するものである。Another object of the present invention is to provide a variable capacitance diode device that can increase integration density.
〔課題を解決する為の手段）
本発明の可変容量ダイオード装置は、少なくとも二つ以
上の可変容量ダイオード素子が同一半導体基体に形成さ
れた可変容量ダイオード装置に関し、隣接して形成され
た第１と第２の可変容量ダイオード素子間の半導体基体
に、該半導体基体の導電型と同じ導電型であって低比抵
抗の第１の拡散層を形成し、該第１と該第２の可変容量
ダイオード素子間にわたって形成された誘電体膜に開口
部を設けて該第１の拡散層の主表面に導電体膜を形成し
たものである。[Means for Solving the Problems] The variable capacitance diode device of the present invention relates to a variable capacitance diode device in which at least two or more variable capacitance diode elements are formed on the same semiconductor substrate. A first diffusion layer having the same conductivity type as that of the semiconductor substrate and having a low specific resistance is formed in the semiconductor substrate between the second variable capacitance diode elements, and the first and second variable capacitance diodes are connected to each other. An opening is provided in a dielectric film formed between elements, and a conductive film is formed on the main surface of the first diffusion layer.
本発明の可変容量ダイオード装置は、可変容量ダイオー
ド素子間の半導体基板主表面の隣接部に形成されている
二酸化シリコン膜等の誘電体膜に開口部を形成して半導
体基板と同じ導電型の低比抵抗の拡散層を形成し、可変
容量ダイオード素子間の隣接部を低インピーダンスとし
て各可変容量ダイオード素子に異なった周波数の信号を
印加し得るようにしたものである。In the variable capacitance diode device of the present invention, an opening is formed in a dielectric film such as a silicon dioxide film formed adjacent to the main surface of the semiconductor substrate between the variable capacitance diode elements. A diffusion layer with a specific resistance is formed, and the adjacent portions between the variable capacitance diode elements are made low impedance, so that signals of different frequencies can be applied to each variable capacitance diode element.
第１図に基づき、本発明の可変容量ダイオード装置につ
いて説明する。The variable capacitance diode device of the present invention will be explained based on FIG.
図に於いて、Ａ、、Ａ、、Ａ、は、同一の半導体基体に
互いに近接して形成された可変容量ダイオード素子であ
る。１は低比抵抗の第１導電型（Ｎ゛型）の半導体基板
であり、２は半導体基Ｆｉｌより高比抵抗の第１導電型
（Ｎ−型）の半導体層であり、通常、エビクキシャル層
である。半導体基板１と半導体層２とによって半導体基
体が形成されている。３はイオン注入法等によって半導
体層２に形成された第１導電型（Ｎ”型）の拡散層であ
り、４は第２導電型（Ｐ″１型）の拡散層である。In the figure, A, , A, , A are variable capacitance diode elements formed close to each other on the same semiconductor substrate. 1 is a semiconductor substrate of the first conductivity type (N-type) with a low specific resistance, and 2 is a semiconductor layer of the first conductivity type (N-type) with a higher specific resistance than the semiconductor substrate FIL, which is usually an evixial layer. It is. A semiconductor substrate 1 and a semiconductor layer 2 form a semiconductor base. 3 is a first conductivity type (N'' type) diffusion layer formed in the semiconductor layer 2 by ion implantation or the like, and 4 is a second conductivity type (P''1 type) diffusion layer.
５Ｉは可変容量ダイオード素子Ａ Ｉ、 Ａ ｚの隣接
部の半導体層２に形成された第１導電型のＮ゛型の拡散
層である。拡散層５Ｉは隣接部のみだけでなく、可変容
量ダイオード素子Ａ、、Ａ、の側面に延在するように形
成してもよい。又、可変容量ダイオード素子Ａ、とＡ２
を囲むように形成してもよい、その場合、拡散層５１と
５！は同一拡散層となる。６は半導体層２の主表面に形
成された二酸化シリコン膜或いは窒化膜等の誘電体膜で
ある。5I is a first conductivity type N' type diffusion layer formed in the semiconductor layer 2 adjacent to the variable capacitance diode elements A I and A z. The diffusion layer 5I may be formed so as to extend not only to the adjacent portions but also to the side surfaces of the variable capacitance diode elements A, , A. Also, variable capacitance diode elements A and A2
In that case, the diffusion layers 51 and 5! may be formed so as to surround them. are the same diffusion layer. 6 is a dielectric film such as a silicon dioxide film or a nitride film formed on the main surface of the semiconductor layer 2.
ｐ ＋４型の拡散層４の主表面を覆う誘電体膜が除去さ
れて拡散層４が露呈され、その露呈部に導電体膜７１が
被着される。導電体膜７１を可変容量ダイオード素子Ａ
１のアノード電極とし、Ｎ”型の半導体基板１をそのカ
ソードとする。The dielectric film covering the main surface of the p +4 type diffusion layer 4 is removed to expose the diffusion layer 4, and a conductive film 71 is deposited on the exposed portion. The conductive film 71 is used as a variable capacitance diode element A.
1 as an anode electrode, and an N'' type semiconductor substrate 1 as its cathode.
可変容量ダイオード素子Ａ、、Ａ２の隣接部の主表面に
各素子Ａ、、Ａ、にわたって誘電体膜６が形成されてお
り、これらの素子の隣接部に形成されたＮ゛型の拡散層
５Ｉの主表面の誘電体膜に開口部を形成してその露呈面
に導電体膜７□が被着されている。導電体膜７□は、拡
散層５．に接触して拡散層５．と共に可変容量ダイオー
ド素子Ａ ＋ 。A dielectric film 6 is formed on the main surface of the adjacent portions of the variable capacitance diode elements A, , A2 over each of the elements A, , A, and an N-type diffusion layer 5I formed in the adjacent portions of these elements. An opening is formed in the dielectric film on the main surface, and a conductive film 7□ is deposited on the exposed surface. The conductor film 7□ is the diffusion layer 5. in contact with the diffusion layer 5. and a variable capacitance diode element A + .
Ａ２の隣接部、或いはその側面に延在するように形成さ
れ、それらの素子Ａ、、Ａ！を囲むように形成される。The elements A,,A! are formed so as to extend adjacent to or on the side of A2. is formed to surround.
又、可変容量ダイオード素子Ａ２とＡ、の構造とそれら
の隣接部の拡散Ｎ５□、導電体膜７．の形状も同様な構
成となっている。Also, the structure of the variable capacitance diode elements A2 and A, the diffusion N5□ of their adjacent parts, and the conductor film 7. The shape of is also similar.
第２図は、第１図の可変容量ダイオード装置の等価回路
である。可変容量ダイオード素子Ａ１乃至Ａ、の夫々の
カソードは接地され、導電体膜７．。FIG. 2 is an equivalent circuit of the variable capacitance diode device shown in FIG. The cathodes of each of the variable capacitance diode elements A1 to A are grounded, and the conductive film 7. .
７３はそれらの素子のアノード電極であり、逆バイアス
電圧が印加される。導電体膜７□は、誘電体膜６Ｉが導
電体膜７１と７□を電極とするコンデンサＣＩを形成し
、誘電体膜６□が導電体膜７□と７．を電極とするコン
デンサＣ２を夫々形成しているが、可変容量ダイオード
素子Ａ１乃至Ａ３のカソードが接地されると、半導体基
板１は低インピーダンスとなり、コンデンサＣ，，Ｃ２
の共通接続点が接地されて低インピーダンスとなる。従
って、導電体膜７１．７ｚに異なった周波数の信号を印
加したとしてもコンデンサＣｉ、Ｃｚを介して容量結合
することがないので、導電体膜Ｉ１．１’ｓに供給され
る周波数が互いに相互干渉を生じることがない。73 is an anode electrode of these elements, to which a reverse bias voltage is applied. In the conductive film 7□, the dielectric film 6I forms a capacitor CI using the conductive films 71 and 7□ as electrodes, and the dielectric film 6I forms a capacitor CI with the conductive films 7□ and 7. When the cathodes of the variable capacitance diode elements A1 to A3 are grounded, the semiconductor substrate 1 becomes a low impedance, and the capacitors C, C2 are formed as electrodes.
The common connection point of the two is grounded, resulting in low impedance. Therefore, even if signals of different frequencies are applied to the conductive film 71.7z, there will be no capacitive coupling via the capacitors Ci and Cz, so the frequencies supplied to the conductive film I1.1's will not mutually interact. No interference occurs.
低比抵抗（Ｎ”型）の拡散層５Ｉ、５□は、導電体膜７
□、７．が半導体基板１に近づくように形成されている
為に、半導体基板１が接地されると、導電体膜７□、７
４をリード端子を介して接地することなく、容易に低イ
ンピーダンスとすることができる。熱論、図示されてい
ないが、拡散層５．。The low resistivity (N” type) diffusion layers 5I, 5□ are the conductor film 7.
□、7. are formed close to the semiconductor substrate 1, so when the semiconductor substrate 1 is grounded, the conductive films 7□, 7
4 can be easily made low impedance without being grounded via a lead terminal. Thermal theory, although not shown, a diffusion layer 5. .
５ｔを半導体基板１に接触するように形成してもよい。5t may be formed so as to be in contact with the semiconductor substrate 1.
本発明の可変容量ダイオード装置は、可変容量ダイオー
ド素子間の隣接部を半導体基板と同じ導電性の拡散層を
設けて、低インピーダンスとすることによって各素子に
異なった周波数を印加しても、混信を生じることがない
極めて効果的な多連の可変容量ダイオード装置を提供で
きる。In the variable capacitance diode device of the present invention, a diffusion layer of the same conductivity as the semiconductor substrate is provided in the adjacent portion between the variable capacitance diode elements to provide low impedance, thereby preventing interference even when different frequencies are applied to each element. It is possible to provide an extremely effective multiple variable capacitance diode device that does not cause
又、本発明の可変容量ダイオード装置は、高密度に可変
容量ダイオード素子を集積することが可能となり、単位
面積当たりの収率を高めることができる。Further, the variable capacitance diode device of the present invention allows variable capacitance diode elements to be integrated at high density, and the yield per unit area can be increased.
更に、同一半導体基体に極めて近接して可変容量ダイオ
ード素子を形成することができるので、可変容量ダイオ
ード素子の接合容量のばらつきが少なくできる副次的に
効果をも奏する。Furthermore, since the variable capacitance diode elements can be formed very close to the same semiconductor substrate, there is also the secondary effect of reducing variations in the junction capacitance of the variable capacitance diode elements.
熱論、多数の可変容量ダイオード素子を用いる電子装置
を小型に形成することができる優れた効果を奏するもの
である。In theory, this has an excellent effect in that an electronic device using a large number of variable capacitance diode elements can be made compact.
第１図は、本発明に係る可変用容量ダイオード装置の一
実施例を示す断面図、第２図は、第１図実施例の等価回
路を示す図、第３図は、従来の可変容量ダイオード装置
の従来の断面図を示す図である。第４図は、第３図の可
変容量ダイオード装置の等価回路を示す図である。
１：Ｎ”型の半導体基板、２：Ｎ−型の半導体層。
３：Ｎ゛型の拡散層、４７Ｐ”型の拡散層、５．。
５□ ：Ｎ゛型の拡散層、６：誘電体膜、７Ｉ乃至７、
：導電体膜、ＡＩ乃至Ａ、：可変容量ダイオド素子、Ｃ
，、Ｃ，：コンデンサFIG. 1 is a sectional view showing an embodiment of a variable capacitance diode device according to the present invention, FIG. 2 is a diagram showing an equivalent circuit of the embodiment of FIG. 1, and FIG. 3 is a diagram showing a conventional variable capacitance diode device. 1 is a diagram showing a conventional cross-sectional view of a device; FIG. FIG. 4 is a diagram showing an equivalent circuit of the variable capacitance diode device of FIG. 3. 1: N'' type semiconductor substrate, 2: N- type semiconductor layer. 3: N'' type diffusion layer, 47P'' type diffusion layer, 5. . 5□: N-type diffusion layer, 6: dielectric film, 7I to 7,
: Conductive film, AI to A, : Variable capacitance diode element, C
,,C,: Capacitor
Claims (1)
半導体基体に形成した可変容量ダイオード装置に於いて
、第１と第２の可変容量ダイオード素子間の隣接部に、
半導体基板と同じ導電型の低比抵抗の第１の拡散層を形
成し、該第１と該２の可変容量ダイオード素子間の該半
導体基体の主表面に形成された誘電体膜に開口部を設け
て該第１の拡散層の主表面を露呈させ、該露呈部に導電
体膜を形成したことを特徴とする可変容量ダイオード装
置。In a variable capacitance diode device in which at least two or more variable capacitance diode elements are formed on the same semiconductor substrate, in an adjacent portion between the first and second variable capacitance diode elements,
forming a first diffusion layer of low resistivity of the same conductivity type as the semiconductor substrate, and forming an opening in a dielectric film formed on the main surface of the semiconductor substrate between the first and second variable capacitance diode elements; A variable capacitance diode device characterized in that the main surface of the first diffusion layer is exposed, and a conductive film is formed on the exposed portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16746290A JPH0456363A (en) | 1990-06-26 | 1990-06-26 | Variable capacitance diode device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16746290A JPH0456363A (en) | 1990-06-26 | 1990-06-26 | Variable capacitance diode device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0456363A true JPH0456363A (en) | 1992-02-24 |
Family
ID=15850128
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16746290A Pending JPH0456363A (en) | 1990-06-26 | 1990-06-26 | Variable capacitance diode device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0456363A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5789801A (en) * | 1995-11-09 | 1998-08-04 | Endgate Corporation | Varactor with electrostatic barrier |
| JP2008113000A (en) * | 2006-10-26 | 2008-05-15 | Samsung Electronics Co Ltd | Semiconductor element capable of tuning macro and micro frequencies, and antenna and frequency tuning circuit including the semiconductor element |
| CN102505690A (en) * | 2011-10-28 | 2012-06-20 | 恒天九五重工有限公司 | Three-fulcrum anti-overturning protecting device for pile frame |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS602853B2 (en) * | 1978-01-26 | 1985-01-24 | 三菱電機株式会社 | Undervoltage relay with current compensation |
-
1990
- 1990-06-26 JP JP16746290A patent/JPH0456363A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS602853B2 (en) * | 1978-01-26 | 1985-01-24 | 三菱電機株式会社 | Undervoltage relay with current compensation |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5789801A (en) * | 1995-11-09 | 1998-08-04 | Endgate Corporation | Varactor with electrostatic barrier |
| JP2008113000A (en) * | 2006-10-26 | 2008-05-15 | Samsung Electronics Co Ltd | Semiconductor element capable of tuning macro and micro frequencies, and antenna and frequency tuning circuit including the semiconductor element |
| CN102505690A (en) * | 2011-10-28 | 2012-06-20 | 恒天九五重工有限公司 | Three-fulcrum anti-overturning protecting device for pile frame |
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