JPH0455358B2 - - Google Patents
Info
- Publication number
- JPH0455358B2 JPH0455358B2 JP59072710A JP7271084A JPH0455358B2 JP H0455358 B2 JPH0455358 B2 JP H0455358B2 JP 59072710 A JP59072710 A JP 59072710A JP 7271084 A JP7271084 A JP 7271084A JP H0455358 B2 JPH0455358 B2 JP H0455358B2
- Authority
- JP
- Japan
- Prior art keywords
- electroless plating
- adhesive
- plating
- hot water
- catalyst
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000007747 plating Methods 0.000 claims description 29
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 21
- 238000007772 electroless plating Methods 0.000 claims description 17
- 239000000853 adhesive Substances 0.000 claims description 16
- 230000001070 adhesive effect Effects 0.000 claims description 16
- 238000005406 washing Methods 0.000 claims description 16
- 239000003054 catalyst Substances 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 11
- 238000002203 pretreatment Methods 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 4
- 238000007788 roughening Methods 0.000 claims description 4
- 229920001187 thermosetting polymer Polymers 0.000 claims description 4
- 238000001035 drying Methods 0.000 claims 2
- 230000003213 activating effect Effects 0.000 claims 1
- 239000011248 coating agent Substances 0.000 claims 1
- 238000000576 coating method Methods 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- 238000009413 insulation Methods 0.000 description 12
- 230000007547 defect Effects 0.000 description 5
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 4
- 239000000243 solution Substances 0.000 description 4
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- JZULKTSSLJNBQJ-UHFFFAOYSA-N chromium;sulfuric acid Chemical compound [Cr].OS(O)(=O)=O JZULKTSSLJNBQJ-UHFFFAOYSA-N 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- WGLPBDUCMAPZCE-UHFFFAOYSA-N Trioxochromium Chemical compound O=[Cr](=O)=O WGLPBDUCMAPZCE-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- TXUICONDJPYNPY-UHFFFAOYSA-N (1,10,13-trimethyl-3-oxo-4,5,6,7,8,9,11,12,14,15,16,17-dodecahydrocyclopenta[a]phenanthren-17-yl) heptanoate Chemical compound C1CC2CC(=O)C=C(C)C2(C)C2C1C1CCC(OC(=O)CCCCCC)C1(C)CC2 TXUICONDJPYNPY-UHFFFAOYSA-N 0.000 description 1
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical class [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- 229920000459 Nitrile rubber Polymers 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 229910021626 Tin(II) chloride Inorganic materials 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 239000007809 chemical reaction catalyst Substances 0.000 description 1
- KRVSOGSZCMJSLX-UHFFFAOYSA-L chromic acid Substances O[Cr](O)(=O)=O KRVSOGSZCMJSLX-UHFFFAOYSA-L 0.000 description 1
- 230000003750 conditioning effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001493 electron microscopy Methods 0.000 description 1
- AWJWCTOOIBYHON-UHFFFAOYSA-N furo[3,4-b]pyrazine-5,7-dione Chemical compound C1=CN=C2C(=O)OC(=O)C2=N1 AWJWCTOOIBYHON-UHFFFAOYSA-N 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 238000006386 neutralization reaction Methods 0.000 description 1
- 230000003472 neutralizing effect Effects 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- PIBWKRNGBLPSSY-UHFFFAOYSA-L palladium(II) chloride Chemical compound Cl[Pd]Cl PIBWKRNGBLPSSY-UHFFFAOYSA-L 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- 239000001119 stannous chloride Substances 0.000 description 1
- 235000011150 stannous chloride Nutrition 0.000 description 1
- QAOWNCQODCNURD-UHFFFAOYSA-N sulfuric acid Substances OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 1
- 239000004094 surface-active agent Substances 0.000 description 1
Description
〔発明の利用分野〕
本発明は、回路を無電解めつきで形成するフル
アデイテイブ方式のプリント配線板において、め
つきの不均一な析出や、めつきが途中で析出停止
する等のめつき不良を防止すると共に、回路間絶
縁抵抗を向上させる、無電解めつき前処理法及び
その前処理を用いたプリント配線板の製造方法に
関する。
〔発明の背景〕
従来、プリント配線板の製造方法として、絶縁
積層板上に熱硬化性接着剤を塗布し、硬化したも
のを用いて、該接着剤表面をクロム硫酸混液など
で化学粗化し、その表面を中和した後、無電解め
つき用の触媒を付与し、活性化する一連の無電解
めつき前処理を行つた後、回路形成部以外をめつ
きレジストで被覆し、次に無電解銅めつきで回路
を形成する方法がある。この無電解めつき前処理
法を用い、めつきレジストを回路形成部以外に被
覆して無電解めつきで回路を形成すると、しばし
ばめつきが一部析出しなかつたり、IC等の脚を
半田で固定するための微細回路（独立ランド）で
はめつきが途中で停止する等のめつき不良が発生
することがある。また、上記した方法で得られた
プリント配線板は、回路と回路との間に被覆され
ているめつきレジスト下に、めつき反応の触媒が
存在するため回路間絶縁抵抗が低いという問題も
ある。
後者の回路間絶縁抵抗が低い問題について特開
昭57−167694号では、回路間のめつきレジスト被
膜下に存在するめつき触媒を除くことを提案して
いる。この方法は回路形成後、アリカリ性過マン
ガン酸塩溶液やクロム酸溶液にて、回路間のめつ
きレジストと接着剤を除去することによつて触媒
を除く方法である。この方法を行えば確に絶縁抵
抗は向上するが、前述した製造方法ではめつきレ
ジストを永久マスクとして使用されているため、
その下層の接着剤層を除くことは困難であり、且
つ工程数が増加する問題がある。
〔発明の目的〕
本発明は、前述しためつき不良と回路間絶縁抵
抗の２つの問題を解決する新らたな無電解めつき
前処理法を提供することにある。また、この無電
解めつき前処理法を用いたプリント配線板の製造
方法を提供することにある。
〔発明の概要〕
本発明の無電解めつき前処理法の特徴は、クロ
ム硫酸混液による接着剤の粗化工程と触媒付与工
程との間に湯洗工程を導入することである。この
湯洗条件は50〜100℃で１分以上で十分である。
この湯洗工程は、粗化工程と触媒付与工程の間で
あれば、どの工程でも良い。例えば、粗化後に行
つても良く、中和後に行つても良い。
具体的な特性は後述の実施例で明らかとなる
が、本発明の湯洗工程を行うと、前述しためつき
不良の発生が極めて減少し、且つ、初期回路間絶
縁抵抗が２桁以上向上する範囲がある。
この湯洗工程の導入による上記効果の理由は末
だ明らかではないが、湯洗を行つた接着剤表面
は、粗化された接着剤の残査物が極めて清浄化さ
れていることが電子顕微鏡観察の結果、明らかと
なつた。
この結果、従来の無電解めつき前処理法で、接
着剤上に付着した触媒、例えばパラジウム量が１
〜3μｇ／cm2では、めつき不良がしばしば発生し、
また回路間（間隔1.25mm、対抗長さ150mm）絶縁
抵抗が1010Ω（DC500V）しかなかつたものが、
本発明の湯洗工程を導入することによつて、同じ
触媒付着量であつても、めつき不良が減少し、回
路間絶縁抵抗も1012〜1013Ωに向上する。従つ
て、前述公知例のように、回路と回路との間に存
在する触媒を除いて絶縁抵抗を高めるため、めつ
きレジストの除去や接着剤の除去などを行う必要
がなく、めつきレジストは永久マスクとして残し
ておくことができる利点がある。
〔発明の実施例〕
以下、本発明を具体的実施例によつて説明す
る。
実施例 １
絶縁積層板として、紙フエノール積層板を用
い、この両面に変性フエノール樹脂とアクリロニ
トリルブタジエンゴムを主成分とする熱硬化性接
着剤を塗布し、165℃、100分で硬化させた。必要
個所にドリルでスルーホールを形成した。その
後、クロム硫酸混液（無水クロム酸60ｇ／、濃
硫酸200ml／）にて45℃で５分間処理し、水洗
した。次いで、湯洗処理を行なつた。この時の湯
洗条件を30°〜100℃で１〜60分の間で変えた。次
いで、3.6％HClにて５分間処理した後、水洗し
た。次いで４ｇ／NaOH水溶液にて10分間処
理した後、水洗した。次に18％HClで１分間処理
した後、直ちに塩化パラジウムと塩化第１スズと
からなる触媒液（日立化成社製 HS101B）に５
分間浸漬した後、水洗した。次に3.6％塩酸にて
活性化した後、水洗した。その後、120℃で15分
間乾燥した。次に、回路形成部以外をスクリーン
印刷法でめつきレジストインク（東京応化工業社
製 NT−30）を被覆し、150℃−30分間で硬化
した。界面活性剤にてコンデイシヨニングをした
後、水洗し、厚付け無電解銅めつき液を用い、70
℃−10hで回路形成部及びスルーホール内に厚さ
約31μｍのめつきを析出させ、回路を形成した。
水洗を行つた後、150℃−40分間乾燥した。この
ようにして得たプリント配線板の回路部分のめつ
き不良（不均一な析出、反応停止）を第１表に示
す。第１図にDC500Vにおける回路間絶縁抵抗
（回路間隔1.25mm、回路対抗長さ150mm）を示す。
第１表に於て、めつき不良の不均一な析出は、プ
リント配線板の全てのめつき部分（回路）にめつ
きが析出しなかつた場合を不良率100％として示
した。また、反応停止は、0.25mm角の独立ランド
100個について反応停止が起こつた場合を不良率
100％とした。第１表からも明らかなように、湯
洗温度が高くなるにつれ、また時間が長くなるに
つれて不良発生率が減少することがわかる。
[Field of Application of the Invention] The present invention is directed to preventing plating defects such as uneven deposition of plating and stopping of plating halfway in fully additive printed wiring boards in which circuits are formed by electroless plating. The present invention also relates to an electroless plating pretreatment method that improves intercircuit insulation resistance, and a printed wiring board manufacturing method using the pretreatment. [Background of the Invention] Conventionally, as a method for manufacturing printed wiring boards, a thermosetting adhesive is applied onto an insulating laminate, the cured adhesive is used, and the surface of the adhesive is chemically roughened with a chromium sulfuric acid mixture. After neutralizing the surface, a series of electroless plating pre-treatments are performed to apply and activate a catalyst for electroless plating, and then the area other than the circuit formation area is covered with a plating resist. There is a method of forming a circuit using electrolytic copper plating. When using this electroless plating pretreatment method to form a circuit by electroless plating by covering areas other than the circuit formation area with plating resist, the plating often fails to deposit partially, or the legs of ICs, etc. are soldered. In the fine circuit (independent land) used for fixing, plating failures such as stopping midway through plating may occur. In addition, the printed wiring board obtained by the above method has a problem of low inter-circuit insulation resistance due to the presence of a plating reaction catalyst under the plating resist coated between the circuits. . Regarding the latter problem of low insulation resistance between circuits, Japanese Patent Application Laid-Open No. 167694/1988 proposes to remove the plating catalyst present under the plating resist film between the circuits. In this method, after circuit formation, the catalyst is removed by removing the plating resist and adhesive between the circuits using an alkaline permanganate solution or chromic acid solution. This method certainly improves insulation resistance, but in the manufacturing method described above, the plating resist is used as a permanent mask, so
It is difficult to remove the underlying adhesive layer, and there is a problem in that the number of steps increases. [Object of the Invention] The object of the present invention is to provide a new electroless plating pretreatment method that solves the two problems described above: poor plating and intercircuit insulation resistance. Another object of the present invention is to provide a method for manufacturing a printed wiring board using this electroless plating pretreatment method. [Summary of the Invention] The feature of the electroless plating pretreatment method of the present invention is that a hot water washing step is introduced between the adhesive roughening step using a chromium sulfuric acid mixture and the catalyst application step. For this hot water washing condition, a temperature of 50 to 100°C for 1 minute or more is sufficient.
This hot water washing step may be any step between the roughening step and the catalyst application step. For example, it may be carried out after roughening or after neutralization. Although specific characteristics will become clear in the examples described below, when the hot water washing process of the present invention is performed, the occurrence of the above-mentioned sticking defects is extremely reduced, and the initial inter-circuit insulation resistance is improved by more than two orders of magnitude. There is a range. The reason for the above-mentioned effect due to the introduction of this hot water washing process is not entirely clear, but electron microscopy shows that the surface of the adhesive that has been washed with hot water is extremely clean of the roughened adhesive residue. As a result of observation, this became clear. As a result, when using conventional electroless plating pretreatment methods, the amount of catalyst, such as palladium, deposited on the adhesive was reduced to 1.
At ~3μg/ cm2 , poor plating often occurs,
In addition, the insulation resistance between circuits (interval 1.25 mm, opposing length 150 mm) was only 10 10 Ω (DC500 V).
By introducing the hot water washing process of the present invention, even with the same amount of catalyst deposited, plating defects are reduced and the inter-circuit insulation resistance is improved to 10 12 to 10 13 Ω. Therefore, as in the above-mentioned known example, in order to increase the insulation resistance by removing the catalyst present between the circuits, there is no need to remove the plating resist or adhesive, and the plating resist is It has the advantage that it can be left as a permanent mask. [Examples of the Invention] The present invention will be explained below using specific examples. Example 1 A paper phenol laminate was used as an insulating laminate. A thermosetting adhesive containing modified phenolic resin and acrylonitrile butadiene rubber as main components was applied to both sides of the board and cured at 165°C for 100 minutes. Through holes were formed in the required locations using a drill. Thereafter, it was treated with a chromium sulfuric acid mixture (chromic anhydride 60g/concentrated sulfuric acid 200ml/) at 45°C for 5 minutes and washed with water. Next, a hot water washing process was performed. The hot water washing conditions at this time were varied from 30° to 100°C for 1 to 60 minutes. Next, it was treated with 3.6% HCl for 5 minutes and then washed with water. Next, it was treated with a 4 g/NaOH aqueous solution for 10 minutes, and then washed with water. Next, after being treated with 18% HCl for 1 minute, it was immediately treated with a catalyst solution consisting of palladium chloride and stannous chloride (HS101B manufactured by Hitachi Chemical Co., Ltd.) for 5 minutes.
After soaking for a minute, it was washed with water. Next, it was activated with 3.6% hydrochloric acid and then washed with water. Thereafter, it was dried at 120°C for 15 minutes. Next, a plating resist ink (NT-30 manufactured by Tokyo Ohka Kogyo Co., Ltd.) was coated on the area other than the circuit forming area using a screen printing method, and cured at 150°C for 30 minutes. After conditioning with a surfactant, washing with water and using a thick electroless copper plating solution,
A plating layer having a thickness of about 31 μm was deposited in the circuit forming portion and the through hole at −10 h to form a circuit.
After washing with water, it was dried at 150°C for 40 minutes. Table 1 shows the plating defects (non-uniform deposition, reaction stoppage) of the circuit portion of the printed wiring board thus obtained. Figure 1 shows the insulation resistance between circuits at 500V DC (circuit spacing 1.25mm, length between circuits 150mm).
In Table 1, non-uniform deposition of defective plating is shown as a failure rate of 100% when no plating is deposited on all plated parts (circuits) of the printed wiring board. In addition, the reaction is stopped using a 0.25 mm square independent land.
Defective rate is when reaction stops for 100 pieces.
It was set as 100%. As is clear from Table 1, it can be seen that the higher the hot water washing temperature and the longer the washing time, the lower the failure rate.
以上、本発明によれば、めつき不良発生率を減
少させることができるだけでなく、回路間絶縁抵
抗も向上をさせることができる。
As described above, according to the present invention, not only can the incidence of plating defects be reduced, but also the insulation resistance between circuits can be improved.
第１図はDC500Vにおける回路間絶縁抵抗を示
す図である。
FIG. 1 is a diagram showing inter-circuit insulation resistance at 500V DC.
Claims (1)
し、該接着剤表面を化学粗化した後、該表面に無
電解めつき用触媒を付与し、しかる後、無電解め
つきにて該表面を金属化する方法に於て、接着剤
表面を化学粗化する工程と無電解めつき用触媒を
付与する工程との間に、湯洗工程を行うことを特
徴とする無電解めつき前処理法。 ２ 特許請求の範囲第１項に於て、湯洗条件が50
〜100℃で１分以上であることを特徴とする無電
解めつき前処理法。 ３ 下記(a)〜(f)工程 (a) 絶縁積層板上に熱硬化性接着剤を塗布し、次
いで硬化する工程 (b) 必要個所にスルーホールを形成する工程 (c) 該接着剤表面を化学粗化する工程 (d) 無電解めつき用触媒を付与した後、該触媒を
活性化する工程 (e) 乾燥した後、回路形成部以外をめつきレジス
トで被覆する工程 (f) 回路形成部及びスルーホール内に無電解めつ
きにて金属を析出させて回路形成する工程、及
び乾燥する工程 とからなるプリント配線板の製造法に於て、工程
(c)と(d)との間に湯洗工程を行うことを特徴とする
プリント配線板の製造法。 ４ 特許請求の範囲第３項に於て、湯洗条件が50
〜100℃で１分以上であることを特徴とするプリ
ント配線板の製造法。[Scope of Claims] 1. A thermosetting adhesive is applied onto an insulating substrate, cured, and the surface of the adhesive is chemically roughened. Then, an electroless plating catalyst is applied to the surface, and then, The method of metallizing the surface by electroless plating is characterized in that a hot water washing step is performed between the step of chemically roughening the adhesive surface and the step of applying a catalyst for electroless plating. Electroless plating pretreatment method. 2 In claim 1, the hot water washing condition is 50
An electroless plating pretreatment method characterized by a temperature of ~100°C for 1 minute or more. 3 Steps (a) to (f) below (a) Step of applying a thermosetting adhesive onto the insulating laminate and then curing it (b) Step of forming through holes at necessary locations (c) Step of forming the adhesive on the surface of the adhesive (d) A step of applying an electroless plating catalyst and then activating the catalyst. (e) After drying, a step of covering the area other than the circuit formation area with a plating resist. (f) A step of coating the circuit with a plating resist. In the manufacturing method of a printed wiring board, the process consists of a step of depositing metal in the forming part and through holes by electroless plating to form a circuit, and a step of drying.
A method for manufacturing a printed wiring board, characterized in that a hot water washing step is performed between (c) and (d). 4 In claim 3, the hot water washing condition is 50
A method for manufacturing a printed wiring board characterized by a temperature of ~100°C for 1 minute or more.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7271084A JPS60217695A (en) | 1984-04-13 | 1984-04-13 | Method of treating before electroless plating and method of producing printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7271084A JPS60217695A (en) | 1984-04-13 | 1984-04-13 | Method of treating before electroless plating and method of producing printed circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60217695A JPS60217695A (en) | 1985-10-31 |
| JPH0455358B2 true JPH0455358B2 (en) | 1992-09-03 |
Family
ID=13497176
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7271084A Granted JPS60217695A (en) | 1984-04-13 | 1984-04-13 | Method of treating before electroless plating and method of producing printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60217695A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6151990A (en) * | 1984-08-22 | 1986-03-14 | 株式会社日立製作所 | Surface metallized insulating substrate and method of producing same |
| JPH0660416B2 (en) * | 1986-11-18 | 1994-08-10 | 三共化成株式会社 | Manufacturing method of plastic molded products |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5388164A (en) * | 1977-01-12 | 1978-08-03 | Matsushita Electric Ind Co Ltd | Method of producing printed circuit board |
| JPS585336A (en) * | 1981-07-03 | 1983-01-12 | Kokusan Kinzoku Kogyo Co Ltd | Treatment of resin surface |
| JPS585337A (en) * | 1981-07-03 | 1983-01-12 | Kokusan Kinzoku Kogyo Co Ltd | Treatment of resin surface |
| JPS58128788A (en) * | 1982-01-27 | 1983-08-01 | 株式会社日立製作所 | Method of producing printed board |
| JPS6074599A (en) * | 1983-09-30 | 1985-04-26 | 株式会社日立製作所 | Printed circuit board and method of producing same |
| JPS60180191A (en) * | 1984-02-27 | 1985-09-13 | 日立化成工業株式会社 | Method of producing circuit board |
-
1984
- 1984-04-13 JP JP7271084A patent/JPS60217695A/en active Granted
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5388164A (en) * | 1977-01-12 | 1978-08-03 | Matsushita Electric Ind Co Ltd | Method of producing printed circuit board |
| JPS585336A (en) * | 1981-07-03 | 1983-01-12 | Kokusan Kinzoku Kogyo Co Ltd | Treatment of resin surface |
| JPS585337A (en) * | 1981-07-03 | 1983-01-12 | Kokusan Kinzoku Kogyo Co Ltd | Treatment of resin surface |
| JPS58128788A (en) * | 1982-01-27 | 1983-08-01 | 株式会社日立製作所 | Method of producing printed board |
| JPS6074599A (en) * | 1983-09-30 | 1985-04-26 | 株式会社日立製作所 | Printed circuit board and method of producing same |
| JPS60180191A (en) * | 1984-02-27 | 1985-09-13 | 日立化成工業株式会社 | Method of producing circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60217695A (en) | 1985-10-31 |
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