JPH0447806A - Delay adjusting circuit - Google Patents

Abstract

PURPOSE:To take out two base band signals without any delay phase difference by providing a variable delay circuit for one input base band signal and controlling the variable delay circuit so as to eliminate relative delay phase difference by a phase comparator for detecting phase difference between both the base band signals and an integrator. CONSTITUTION:One of the base band signals inputted from input terminals 1 and 2 is branched to signals to a phase comparator 7 and an output terminal 9 by a variable delay circuit 3 and a branching circuit 6A after passing through an LPF 5A, and the other signal is branched to signals to the comparator 7 and an output terminal 10 by a fixed delay circuit 4, LPF 5B and branching circuit 6B. The comparator 7 detects the phase difference between the both base band signals and outputs a detection signal. An integrator 8 smooths this detection signal and outputs a direct current voltage. The circuit 3 inputs this direct current voltage and changes a delay amount in a certain direction so that the phase difference of the comparator 7 can be zero. Thus, at the outputs of output terminals 9 and 10, the two base band signals can be obtained without any relative delay phase difference.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は遅延調整回路に関し、特に２系列のローパスフ
ィルタ等の相対遅延差を最小にする機能を有する遅延調
整回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a delay adjustment circuit, and more particularly to a delay adjustment circuit having a function of minimizing the relative delay difference between two series of low-pass filters and the like.

〔従来の技術〕[Conventional technology]

従来、この種の遅延調整回路は、初期調整の段階で作業
者が調整すると、そのまま回路系に組み込んでおり、２
系列のローパスフィルタの相対遅延位相差を検出して自
動的にこの位相差を最小にするような回路はなく、相対
遅延が存在してもそのまま出力されていた。Conventionally, this type of delay adjustment circuit has been adjusted by an operator at the initial adjustment stage and then incorporated into the circuit system as is.
There is no circuit that detects the relative delay phase difference of a series of low-pass filters and automatically minimizes this phase difference, and even if there is a relative delay, it is output as is.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の遅延調整回路はなかったので、相対遅延
が生じてもそのまま信号が出力されるという欠点がある
。また、作業者が帯域内の遅延量を個々のパネルによっ
て調整するので、パネルによって遅延量が同じとは限ら
ず、個々のパネルによって相対遅延量が違うという欠点
がある。したがって運用時において温度変化により相対
遅延も変化することに対しては無防備である欠点もある
。Since there is no conventional delay adjustment circuit as described above, there is a drawback that the signal is output as is even if a relative delay occurs. Furthermore, since the operator adjusts the amount of delay within the band for each individual panel, there is a drawback that the amount of delay is not necessarily the same depending on the panel, and the relative amount of delay differs depending on the individual panel. Therefore, it also has the disadvantage that it is vulnerable to changes in relative delay due to temperature changes during operation.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の遅延調整回路は制御端子に供給される電圧によ
り入力される信号の遅延量を変化させる可変遅延回路と
、この可変遅延回路の出力に接続される第１のローパス
フィルタと、この第１のローパスフィルタの出力を主出
力と第１の分岐出力に分岐する第１の分岐回路と、入力
される信号に一定の遅延量を与える固定遅延回路と、こ
の固定遅延回路の出力に接続される第２のローパスフィ
ルタと、この第２のローパスフィルタの出力を主出力と
第２の分岐出力に分岐する第２の分岐回路と、前記第１
および第２の分岐出力を入力して相互の位相差を検出す
る位相比較器と、この位相比較器の出力を積分して前記
可変遅延回路の制御端子に前記第１および第２のローパ
スフィルタの相対遅延位相差がなくなるように制御する
電圧を出力する積分器とを有する。The delay adjustment circuit of the present invention includes a variable delay circuit that changes the amount of delay of an input signal depending on a voltage supplied to a control terminal, a first low-pass filter connected to the output of the variable delay circuit, and a first low-pass filter connected to the output of the variable delay circuit. a first branch circuit that branches the output of the low-pass filter into a main output and a first branch output; a fixed delay circuit that provides a fixed amount of delay to the input signal; and a fixed delay circuit that is connected to the output of the fixed delay circuit. a second low-pass filter; a second branch circuit that branches the output of the second low-pass filter into a main output and a second branch output;
and a phase comparator which inputs the second branch output and detects the mutual phase difference, and integrates the output of this phase comparator and sends the output to the control terminal of the variable delay circuit to the first and second low-pass filters. and an integrator that outputs a voltage controlled so that the relative delay phase difference is eliminated.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第１図は本発明の一実施例のブロック図である。第１図
の実施例は入力端子１，２、可変遅延回路３、固定遅延
回路４、ローパスフィルタ５Ａ。FIG. 1 is a block diagram of one embodiment of the present invention. The embodiment shown in FIG. 1 includes input terminals 1 and 2, a variable delay circuit 3, a fixed delay circuit 4, and a low-pass filter 5A.

５Ｂ、分岐回路６Ａ、６Ｂ、位相比較器７、積分器８か
ら構成されている０次に本実施例の動作を説明する。入
力端子１，２から入力されたベースバンド信号の一方は
可変遅延回路３、ローパスフィルタ５Ａ経由分岐回路６
Ａで位相比較器７へと出力端子９への信号に分岐され、
他方は固定遅延回路４、ローパスフィルタ５Ｂ、分岐回
路６Ｂで位相比較器７へと出力端子１０への信号に分岐
される０位相比較器７は両方のベースバント信号の位相
差を検出して検出信号を出力する。積分器８はこの検出
信号を平滑化して直流電圧を出力する。5B, branch circuits 6A and 6B, a phase comparator 7, and an integrator 8. One of the baseband signals input from input terminals 1 and 2 is sent to a branch circuit 6 via a variable delay circuit 3 and a low-pass filter 5A.
At A, the signal is branched to the phase comparator 7 and output terminal 9,
The other is a fixed delay circuit 4, a low-pass filter 5B, and a branch circuit 6B, which branches the signal to a phase comparator 7 and an output terminal 10.The phase comparator 7 detects and detects the phase difference between both baseband signals. Output a signal. The integrator 8 smoothes this detection signal and outputs a DC voltage.

可変遅延回路３はこの直流電圧を入力して位相比較器７
の位相差を零とする方向に遅延量を変化させる。このよ
うな動作を行うことにより出力端子９．１０の出力には
相対的な遅延位相差のない二つのベースバンド信号が得
られる。The variable delay circuit 3 inputs this DC voltage to the phase comparator 7.
The amount of delay is changed in the direction that makes the phase difference zero. By performing such an operation, two baseband signals having no relative delay phase difference are obtained at the outputs of the output terminals 9 and 10.

この回路は、例えば４相位相変復調に用いるローパスフ
ィルタの場合だと、相対遅延を最小にすることで２系列
の信号の出力位相がそろい、２系列共、最良点で判別で
きるので、符号誤り率が良くなる。For example, in the case of a low-pass filter used for four-phase phase modulation and demodulation, this circuit can minimize the relative delay so that the output phases of two series of signals are aligned, and both series can be discriminated at the best point, so the bit error rate gets better.

〔発明の効果〕〔Effect of the invention〕

本発明は、２系列の信号の位相を比較して、入力ベース
パント信号の一方に可変遅延回路を設け、両ベースバン
ド信号の位相差検出用位相比較器と積分器とにより相対
遅延位相差をなくするように可変遅延回路を制御するこ
とにより、遅延位相差のない２つのベースバンド信号を
取り出すことができる効果がある。したがって両方のロ
ーパスフィルタの温度変化等による小さい遅延量の変化
に対しても、自動的に常に相対遅延量を最小にできる効
果がある。The present invention compares the phases of two series of signals, provides a variable delay circuit for one of the input baseband signals, and calculates the relative delay phase difference using a phase comparator for detecting the phase difference between both baseband signals and an integrator. By controlling the variable delay circuit so as to eliminate the delay phase difference, it is possible to extract two baseband signals having no delay phase difference. Therefore, even when there is a small change in the delay amount due to a temperature change in both low-pass filters, the relative delay amount can be automatically minimized at all times.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の一実施例のブロック図である。 １．２・・・入力端子、３・・・可変遅延回路、４・・
・固定遅延回路、５Ａ、５Ｂ・・・ローパスフィルタ、
６Ａ、６Ｂ・・・分岐回路、７・・・位相比較器、８・
・・積分器、９，１０・・・出力端子。FIG. 1 is a block diagram of one embodiment of the present invention. 1.2...Input terminal, 3...Variable delay circuit, 4...
・Fixed delay circuit, 5A, 5B...low pass filter,
6A, 6B... Branch circuit, 7... Phase comparator, 8.
... Integrator, 9, 10... Output terminal.

Claims (1)

【特許請求の範囲】[Claims] 制御端子に供給される電圧により入力される信号の遅延
量を変化させる可変遅延回路と、この可変遅延回路の出
力に接続される第１のローパスフィルタと、この第１の
ローパスフィルタの出力を主出力と第１の分岐出力に分
岐する第１の分岐回路と、入力される信号に一定の遅延
量を与える固定遅延回路と、この固定遅延回路の出力に
接続される第２のローパスフィルタと、この第２のロー
パスフィルタの出力を主出力と第２の分岐出力に分岐す
る第２の分岐回路と、前記第１および第２の分岐出力を
入力して相互の位相差を検出する位相比較器と、この位
相比較器の出力を積分して前記可変遅延回路の制御端子
に前記第１および第２のローパスフィルタの相対遅延位
相差がなくなるように制御する電圧を出力する積分器と
を有することを特徴とする遅延調整回路。A variable delay circuit that changes the amount of delay of an input signal depending on a voltage supplied to a control terminal, a first low-pass filter connected to the output of this variable delay circuit, and a first low-pass filter that mainly controls the output of this first low-pass filter. a first branch circuit that branches into an output and a first branch output; a fixed delay circuit that provides a fixed amount of delay to an input signal; and a second low-pass filter connected to the output of the fixed delay circuit; a second branch circuit that branches the output of the second low-pass filter into a main output and a second branch output; and a phase comparator that receives the first and second branch outputs and detects a mutual phase difference. and an integrator that integrates the output of the phase comparator and outputs a voltage to a control terminal of the variable delay circuit so as to eliminate the relative delay phase difference between the first and second low-pass filters. A delay adjustment circuit featuring: