JPH0445620A - Radio selective call receiver - Google Patents
Radio selective call receiverInfo
- Publication number
- JPH0445620A JPH0445620A JP15459090A JP15459090A JPH0445620A JP H0445620 A JPH0445620 A JP H0445620A JP 15459090 A JP15459090 A JP 15459090A JP 15459090 A JP15459090 A JP 15459090A JP H0445620 A JPH0445620 A JP H0445620A
- Authority
- JP
- Japan
- Prior art keywords
- cpu
- resistor
- signal line
- signal
- frequency noise
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005855 radiation Effects 0.000 abstract description 4
- 230000035945 sensitivity Effects 0.000 abstract description 3
- 230000006866 deterioration Effects 0.000 abstract description 2
- 239000003990 capacitor Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000007493 shaping process Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
Landscapes
- Noise Elimination (AREA)
- Mobile Radio Communication Systems (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は無線選択呼出受信機に関し、特にデータ処理等
のロジック動作を行なうＩＣを有する無線選択呼出受信
機に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a radio selective call receiver, and more particularly to a radio selective call receiver having an IC that performs logic operations such as data processing.
従来、この種の無線選択呼出受信機のロジック回路はＩ
Ｃ１個で構成され、このＩＣは、電池電圧で動作し、デ
ータ処理用のクロックは数１００ＫＨｚであるため、ロ
ジックの信号ラインからのノイズ輻射は無線部の特性に
特に大きな問題はもたらさなかった。しかし、近年無線
選択呼出受信機の高機能化に伴ない、ロジック回路もｃ
ｐｕ。Conventionally, the logic circuit of this type of radio selective call receiver is I
Consisting of one C, this IC operates on battery voltage, and the clock for data processing is several 100 KHz, so noise radiation from the logic signal line did not pose any particular problem to the characteristics of the radio section. However, as wireless selective calling receivers have become more sophisticated in recent years, logic circuits have also become more sophisticated.
pu.
ＲＯＭ、ＲＡＭ、周辺ＩＣ，ＬＣＤドライバ等の複数の
ＩＣにより構成されるようになってきた。It has come to be composed of multiple ICs such as ROM, RAM, peripheral ICs, and LCD drivers.
上述した従来の無線選択呼出受信機は、ロジック回路を
構成する複数のＩＣ間の信号ラインが共通線構造（バス
方式）で接続されていて、プリント基板上に複雑に配線
されている。また、これらのＩＣは電池電圧で動作する
ものはほとんどなく、ＤＣ−ＤＣコンバータ等で電池電
圧を昇圧し、この昇圧された電圧により動作する。In the conventional radio selective calling receiver described above, signal lines between a plurality of ICs constituting a logic circuit are connected in a common line structure (bus system), and are wired in a complicated manner on a printed circuit board. Furthermore, almost none of these ICs operate on battery voltage, but instead operate on the boosted voltage by boosting the battery voltage using a DC-DC converter or the like.
さらに、クロックも周波数が高くなってきている。従っ
て、信号ラインを流れる信号レベルも大きくなり周波数
も高くなっている。Furthermore, clock frequencies are also becoming higher. Therefore, the level of the signal flowing through the signal line increases and the frequency also increases.
さらには、バス方式により各ＩＣに信号ラインが接続さ
れるため信号ラインの引き廻しが長くなリ、ノイズ輻射
量は一段と増加し、無線部の受信感度を著しく劣化させ
るという欠点がある。Furthermore, since a signal line is connected to each IC using the bus method, the signal line has to be routed for a long time, which further increases the amount of noise radiation, which significantly deteriorates the reception sensitivity of the radio section.
本発明の無線選択呼出受信機は、少なくとも２つの集積
回路を有し、これら集積回路の間でディジタル信号の入
出力を行なう無線選択呼出受信機において、前記集積回
路の間の信号ラインの少なくとも１つに直列に抵抗を入
れて構成される。The radio selective call receiver of the present invention has at least two integrated circuits and inputs and outputs digital signals between these integrated circuits, in which at least one of the signal lines between the integrated circuits It consists of a resistor in series with the
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の一実施例のブロック図である。FIG. 1 is a block diagram of one embodiment of the present invention.
アンテナ１により受信された無線信号は、無線部２で増
幅後復調される。復調された信号は、波形整形回路３に
より、デコーダ４で読みとり可能な波形に変換される。A radio signal received by antenna 1 is amplified and demodulated by radio section 2 . The demodulated signal is converted by the waveform shaping circuit 3 into a waveform that can be read by the decoder 4.
デコーダ４では、ＰＲＯＭ（Ｐｒｏｇｒａｌｌａｂｌｅ
Ｒｅａｄ ０ｎｌｙ Ｍｅｍｏｒｙ）５に予め書き込
まれている自己の呼出番号と波形整形回路３がらの信号
の中の呼出番号とを比較して、両者が一致したときは呼
出番号に引き続くメツセージ信号をＣＰＵ６に出力する
。In the decoder 4, PROM (Prograllable
It compares its own calling number written in advance in Read 0nly Memory) 5 with the calling number in the signal from the waveform shaping circuit 3, and when the two match, it outputs a message signal following the calling number to the CPU 6. do.
ＣＰＵ６では、メツセージ信号に関して誤り検呂、誤り
訂正等の処理を行ない、ＬＣＤドライバ１２にメツセー
ジデータを出力すると供に、デコーダ４に呼出しがあっ
たことを知らせるための通報命令を出力する。デコーダ
４は、ＣＰＵ６がらの通報命令により、増幅器９に鳴音
信号を出力してスピーカ１０を駆動する。同時に、ＬＣ
Ｄドライバ１２はＬＣＤ表示部１３にメツセージデータ
を表示させる。The CPU 6 performs processing such as error checking and error correction on the message signal, outputs the message data to the LCD driver 12, and outputs a notification command to notify the decoder 4 that there is a call. The decoder 4 outputs a sound signal to the amplifier 9 and drives the speaker 10 according to a notification command from the CPU 6 . At the same time, L.C.
The D driver 12 causes the LCD display section 13 to display message data.
ＲＯＭ７にはＣＰｔＪ６をコントロールするためのプロ
グラムが書き込まれている。ＲＡＭ８は、ＣＰｔＪ６の
処理の中で、データまたは各種変数の一時記憶場所とし
て活用される。クロック発振器１１は、各種タイミング
の発生及びＣＰＵ６の処理用クロックの発生を行なう。A program for controlling CPtJ6 is written in ROM7. The RAM 8 is utilized as a temporary storage location for data or various variables during the processing of the CPtJ6. The clock oscillator 11 generates various timings and a processing clock for the CPU 6.
抵抗１４は、実装上長く引き廻してし珪ったＬＣＤドラ
イバ１２への信号ラインに直列に挿入され、高周波ノイ
ズ電流の流れを遮断する。The resistor 14 is inserted in series with the signal line to the LCD driver 12, which is long and thin due to mounting, and blocks the flow of high-frequency noise current.
第２図は、ＣＰＩＪ６の出力ボートからＬＣＤドライバ
１２の入力ボートへ流れる信号電流について説明するた
めの、ＣＭＯＳロジックＩＣの等価回路である。FIG. 2 is an equivalent circuit of a CMOS logic IC for explaining the signal current flowing from the output port of the CPIJ 6 to the input port of the LCD driver 12.
ＣＭＯＳロジックＩＣの出力ボートは、等価的に電源２
１と、電流源（Ｐ）２２と、電流源（ｎ）２５と、スイ
ッチ（Ｐ）２３とスイッチ（ｎ）２４とで構成され、第
２図ではスイッチ（Ｐ）２３がオンになりハイレベルを
出力している状態を表わしている。また、入力ボートは
等価的に容量２７で表わされる。従って、電流源（Ｐ）
２２により容量２７が充電されることにより、入力ボー
トはハイレベルになる。この容量２７が充電される時定
数は、容量２７の容量値をＣ１抵抗２６の抵抗値をＲと
すると、ＲＣで表わされ、この抵抗値Ｒを適当に選ぶこ
とにより、本来のデータを表わす電流を伝送し高周波ノ
イズ電流を低減する信号ラインが実現できる。The output port of a CMOS logic IC is equivalent to power supply 2.
1, a current source (P) 22, a current source (n) 25, a switch (P) 23, and a switch (n) 24. In Fig. 2, the switch (P) 23 is turned on and the high level This shows the state in which . Further, the input port is equivalently represented by a capacitor 27. Therefore, the current source (P)
22 charges the capacitor 27, so that the input port becomes high level. The time constant for charging this capacitor 27 is expressed as RC, where the capacitance value of the capacitor 27 is C1 and the resistance value of the resistor 26 is R. By appropriately selecting this resistance value R, the original data can be expressed. A signal line that transmits current and reduces high-frequency noise current can be realized.
以上説明したように本発明は、無線選択呼出受信機のロ
ジック系で使われるＩＣ間の信号ラインに抵抗を直列に
挿入することにより、信号ラインに流れる高周波ノイズ
を低減でき、信号ラインからの高周波ノイズの輻射を低
減できるので、受信部の受信感度の劣化を防止できる効
果がある。As explained above, the present invention can reduce high frequency noise flowing in the signal line by inserting a resistor in series in the signal line between ICs used in the logic system of a radio selective calling receiver. Since noise radiation can be reduced, there is an effect of preventing deterioration of the receiving sensitivity of the receiving section.
第１図は本発明の一実施例のブロック図、第２図は第１
図におけるＣＰＵ６からＬＣＤドライバ１２へ流れる信
号電流について説明するための等価回路図である。
１・・・アンテナ、２・・・無線部、３・・・波形整形
回路、４・・・デコーダ、５・・・ＰＲＯＭ、６・・・
ｃｐｕ、７・・・ＲＯＭ、８・・・ＲＡＭ、９・・・増
幅器、１０・・・スピーカ、１１・・・クロック発振器
、１２・・・ＬＣＤドライバ、１３・・・ＬＣＤ表示部
、１４・・・抵抗。FIG. 1 is a block diagram of one embodiment of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention.
FIG. 2 is an equivalent circuit diagram for explaining a signal current flowing from the CPU 6 to the LCD driver 12 in the figure. DESCRIPTION OF SYMBOLS 1... Antenna, 2... Radio part, 3... Waveform shaping circuit, 4... Decoder, 5... PROM, 6...
cpu, 7... ROM, 8... RAM, 9... amplifier, 10... speaker, 11... clock oscillator, 12... LCD driver, 13... LCD display section, 14... ··resistance.
Claims (1)
でディジタル信号の入出力を行なう無線選択呼出受信機
において、前記集積回路の間の信号ラインの少なくとも
１つに直列に抵抗を入れたことを特徴とする無線選択呼
出受信機。In a radio selective calling receiver that has at least two integrated circuits and inputs and outputs digital signals between these integrated circuits, a resistor is inserted in series with at least one of the signal lines between the integrated circuits. Features: Wireless selective calling receiver.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2154590A JP2845577B2 (en) | 1990-06-13 | 1990-06-13 | Radio selective call receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2154590A JP2845577B2 (en) | 1990-06-13 | 1990-06-13 | Radio selective call receiver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0445620A true JPH0445620A (en) | 1992-02-14 |
| JP2845577B2 JP2845577B2 (en) | 1999-01-13 |
Family
ID=15587518
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2154590A Expired - Lifetime JP2845577B2 (en) | 1990-06-13 | 1990-06-13 | Radio selective call receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2845577B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08195615A (en) * | 1995-01-12 | 1996-07-30 | Nec Corp | Portable radio equipment |
| JPH08237713A (en) * | 1995-02-28 | 1996-09-13 | Nec Corp | Radio selective calling receiver with infrared ray data transmission function |
| JPH1094014A (en) * | 1997-08-19 | 1998-04-10 | Nec Corp | Selective radio call receiver |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5890837A (en) * | 1981-11-19 | 1983-05-30 | Nec Corp | Signal detecting circuit |
| JPS5938769U (en) * | 1982-09-07 | 1984-03-12 | 三原 六郎 | fishing line winder |
| JPS61156330U (en) * | 1984-12-04 | 1986-09-27 | ||
| JPS63174742U (en) * | 1986-09-29 | 1988-11-14 |
-
1990
- 1990-06-13 JP JP2154590A patent/JP2845577B2/en not_active Expired - Lifetime
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5890837A (en) * | 1981-11-19 | 1983-05-30 | Nec Corp | Signal detecting circuit |
| JPS5938769U (en) * | 1982-09-07 | 1984-03-12 | 三原 六郎 | fishing line winder |
| JPS61156330U (en) * | 1984-12-04 | 1986-09-27 | ||
| JPS63174742U (en) * | 1986-09-29 | 1988-11-14 |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08195615A (en) * | 1995-01-12 | 1996-07-30 | Nec Corp | Portable radio equipment |
| JPH08237713A (en) * | 1995-02-28 | 1996-09-13 | Nec Corp | Radio selective calling receiver with infrared ray data transmission function |
| US5764393A (en) * | 1995-02-28 | 1998-06-09 | Nec Corporation | Data transmission control device of radio selection call receiver |
| JPH1094014A (en) * | 1997-08-19 | 1998-04-10 | Nec Corp | Selective radio call receiver |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2845577B2 (en) | 1999-01-13 |
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