JPH04329626A - Processor of semiconductor device - Google Patents

Processor of semiconductor device

Info

Publication number
JPH04329626A
JPH04329626A JP10072691A JP10072691A JPH04329626A JP H04329626 A JPH04329626 A JP H04329626A JP 10072691 A JP10072691 A JP 10072691A JP 10072691 A JP10072691 A JP 10072691A JP H04329626 A JPH04329626 A JP H04329626A
Authority
JP
Japan
Prior art keywords
reaction gas
semiconductor substrate
reaction
semiconductor
uniform
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10072691A
Other languages
Japanese (ja)
Inventor
Keiichi Furukawa
恵一 古川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP10072691A priority Critical patent/JPH04329626A/en
Publication of JPH04329626A publication Critical patent/JPH04329626A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide a processor of semiconductor devices which enables treatment of high uniformity in a semiconductor substrate plane. CONSTITUTION:A semiconductor substrate 2 is held by a susceptor 3 in a reactor 1 through a semiconductor introducer 4, and a reaction gas supplied through a reaction gas supplier 5 is turned plasmatic by a plasma forming electrode 10: in this atmosphere the semiconductor substrate 2 undergoes plasma film formation. The reaction gas flows over the semiconductor substrate 2 in a uniform state and is exhausted through reaction gas exhaust parts 21 independently controlled in exhaust speed. As above-mentioned, providing a plurality of reaction gas exhaust parts 21 in the reactor 1 to each of which a pressure controller 22 is connected can keep the flow of reaction gas uniform and improve an irregularity in the flow of reaction gas as well as an ununiformity in pressure in the reactor 1, thereby providing a uniform plasmatic state. As a result, the semiconductor substrate 2 with a film is excellent in uniformity in its plane.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、半導体基板処理時に、
その半導体基板面内の均一性を高める半導体素子の製造
装置に関するものである。
[Industrial Application Field] The present invention provides a method for processing semiconductor substrates.
The present invention relates to a semiconductor device manufacturing apparatus that improves the uniformity within the surface of a semiconductor substrate.

【0002】0002

【従来の技術】従来より、半導体素子を形成する半導体
基板の成膜処理,エッチング処理には半導体基板を所望
の真空度になし得る容器内に収容保持した状態で所望の
処理を行う、真空装置が用いられている。
[Prior Art] Conventionally, for film formation and etching processing of semiconductor substrates forming semiconductor elements, vacuum equipment is used to carry out the desired processing while holding the semiconductor substrate in a container capable of achieving the desired degree of vacuum. is used.

【0003】以下、従来の半導体素子の製造装置につい
て、プラズマ成膜法を例に説明する。
[0003] Hereinafter, a conventional semiconductor device manufacturing apparatus will be explained using a plasma film forming method as an example.

【0004】図2は従来の半導体素子の製造装置の構成
を模式的に示す構成図である。図2において、1は反応
容器であり、2は反応容器1内に保持され処理される半
導体基板、3は半導体基板2を保持するための基板保持
台であり、4は反応容器1に連結され半導体基板2を反
応容器1に導入する半導体基板導入装置、5は半導体基
板2を処理するための反応ガスを所定の流量に制御し供
給する反応ガス供給装置、6は反応ガスを反応容器1に
導入するために反応容器1に連結された反応ガス導入部
、7は反応容器1を真空に保つための真空装置、8は反
応容器1に連結され真空装置7により反応ガスを排出す
るための反応ガス排出部、9は真空装置7と反応ガス排
出部8の間に接続され反応ガスの排気速度を制御する圧
力制御器、10は反応ガス供給装置5より供給された反
応ガスをプラズマにするプラズマ形成用電極、11はプ
ラズマ形成用電極10に接続されたプラズマ発生用電源
である。
FIG. 2 is a block diagram schematically showing the structure of a conventional semiconductor device manufacturing apparatus. In FIG. 2, 1 is a reaction vessel, 2 is a semiconductor substrate held and processed in the reaction vessel 1, 3 is a substrate holding stand for holding the semiconductor substrate 2, and 4 is a substrate holding stand connected to the reaction vessel 1. A semiconductor substrate introduction device for introducing the semiconductor substrate 2 into the reaction container 1; 5 a reaction gas supply device that controls and supplies a reaction gas to a predetermined flow rate for processing the semiconductor substrate 2; 6 a reaction gas supply device that supplies the reaction gas to the reaction container 1; 7 is a vacuum device for keeping the reaction container 1 in vacuum; 8 is a reaction gas inlet connected to the reaction container 1 to discharge the reaction gas by the vacuum device 7; A gas exhaust section, 9 is a pressure controller connected between the vacuum device 7 and the reaction gas exhaust section 8 and controls the exhaust speed of the reaction gas, and 10 is a plasma that converts the reaction gas supplied from the reaction gas supply device 5 into plasma. The formation electrode 11 is a plasma generation power supply connected to the plasma formation electrode 10.

【0005】以上のように構成された半導体素子の製造
装置について、以下その動作を説明する。
The operation of the semiconductor device manufacturing apparatus constructed as described above will be described below.

【0006】まず、半導体基板導入装置4により半導体
基板2は、反応容器1内の基板保持台3に保持され、反
応ガス供給装置5より供給された反応ガスはプラズマ形
成用電極9によりプラズマ状態にされ、この雰囲気中に
おいて半導体基板2はプラズマ成膜される。なおこの時
、反応容器1は真空装置7および圧力制御器9により一
定のガス圧の真空度に保たれる。
First, the semiconductor substrate 2 is held on the substrate holding table 3 in the reaction vessel 1 by the semiconductor substrate introduction device 4, and the reaction gas supplied from the reaction gas supply device 5 is turned into a plasma state by the plasma forming electrode 9. In this atmosphere, the semiconductor substrate 2 is subjected to plasma deposition. At this time, the reaction vessel 1 is maintained at a constant gas pressure by the vacuum device 7 and the pressure controller 9.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、上記従
来の構成の半導体素子の製造装置においては、その処理
条件によっては、反応ガス導入部6と反応ガス排出部8
との位置関係またはその形状等により、反応ガスの流れ
が偏り、反応容器1内の圧力も一様な状態では無くなる
。その結果、成膜された半導体基板2は、その面内の均
一性において劣化したものとなってしまう。
[Problems to be Solved by the Invention] However, in the conventional semiconductor device manufacturing apparatus described above, depending on the processing conditions, the reaction gas introduction section 6 and the reaction gas discharge section 8 may
Due to the positional relationship with the reaction vessel 1 or its shape, the flow of the reaction gas becomes uneven, and the pressure inside the reaction vessel 1 is no longer uniform. As a result, the in-plane uniformity of the formed semiconductor substrate 2 deteriorates.

【0008】本発明は上記従来の課題を解決するもので
、半導体基板面内の均一性の良好な処理を可能とする半
導体素子の製造装置を提供することを目的とする。
The present invention is intended to solve the above-mentioned conventional problems, and an object thereof is to provide a semiconductor device manufacturing apparatus that enables processing with good uniformity within the plane of a semiconductor substrate.

【0009】[0009]

【課題を解決するための手段】この目的を達成するため
に本発明の半導体素子の製造装置は、反応容器内に複数
個のガス排出部を設け、なおかつ各々の排気速度を独立
に制御できる構造を有している。
[Means for Solving the Problems] In order to achieve this object, the semiconductor device manufacturing apparatus of the present invention has a structure in which a plurality of gas exhaust sections are provided in a reaction vessel, and the exhaust speed of each can be independently controlled. have.

【0010】0010

【作用】この構成によって反応ガスの流れを均一に保つ
ことができるため、反応ガスの流れの偏り、反応容器内
の圧力の不均一も改善され、半導体基板処理時の面内に
おける均一性を改善することができる。
[Action] This configuration allows the flow of the reaction gas to be maintained uniformly, thereby improving unevenness in the flow of the reaction gas and non-uniform pressure within the reaction vessel, improving in-plane uniformity during semiconductor substrate processing. can do.

【0011】[0011]

【実施例】以下、本発明の一実施例について、図面を参
照しながら説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

【0012】図1は本発明の一実施例における半導体素
子の製造装置の構成を模式的に示す構成図である。図2
と同一部分には同一番号を付し、説明を省略する。すな
わち本発明の特徴は反応ガス排出部21にある。すなわ
ち反応容器1に連結され真空装置7により反応ガスを排
出するための反応ガス排出部21を複数個備えてあり、
その各々に排気速度を制御するための圧力制御器22が
接続されている。
FIG. 1 is a block diagram schematically showing the structure of a semiconductor device manufacturing apparatus according to an embodiment of the present invention. Figure 2
The same parts are given the same numbers and their explanations are omitted. That is, the feature of the present invention lies in the reaction gas discharge section 21. That is, a plurality of reaction gas discharge parts 21 connected to the reaction vessel 1 and for exhausting reaction gas by the vacuum device 7 are provided.
A pressure controller 22 for controlling the pumping speed is connected to each of them.

【0013】以上のように構成された本実施例の半導体
素子の製造装置について、従来例と同様にプラズマ成膜
法を例に説明する。
The semiconductor device manufacturing apparatus of this embodiment constructed as described above will be explained using the plasma film forming method as an example, similar to the conventional example.

【0014】まず、半導体基板導入装置4により半導体
基板2は、反応容器1内の基板保持台3に保持され、反
応ガス供給装置5より供給された反応ガスはプラズマ形
成用電極10によりプラズマ状態にされ、この雰囲気中
において半導体基板2はプラズマ成膜される。以上は従
来例と同様であるが、本実施例においては、反応ガスは
各々独立に排気速度を制御された反応ガス排出部21に
より、半導体基板2に対して均一な状態で流れ、排気さ
れる。
First, the semiconductor substrate 2 is held on the substrate holding table 3 in the reaction vessel 1 by the semiconductor substrate introduction device 4, and the reaction gas supplied from the reaction gas supply device 5 is turned into a plasma state by the plasma forming electrode 10. In this atmosphere, the semiconductor substrate 2 is subjected to plasma deposition. The above is the same as the conventional example, but in this example, the reaction gases flow uniformly to the semiconductor substrate 2 and are exhausted by the reaction gas discharge parts 21 whose exhaust speeds are independently controlled. .

【0015】以上のように本実施例によれば、反応ガス
排出部21を反応容器1内に複数個設け、その各々に圧
力制御器22を接続したことにより、反応ガスの流れを
均一に保つことができ、反応ガスの流れの偏り、反応容
器1内の圧力の不均一も改善され、均一なプラズマ状態
を得ることができる。その結果、成膜された半導体基板
2は、その面内の均一性において優れたものとなる。
As described above, according to this embodiment, a plurality of reaction gas discharge sections 21 are provided in the reaction vessel 1, and a pressure controller 22 is connected to each of them, thereby maintaining a uniform flow of the reaction gas. This also improves the unevenness of the flow of the reaction gas and the non-uniformity of the pressure within the reaction vessel 1, making it possible to obtain a uniform plasma state. As a result, the formed semiconductor substrate 2 has excellent in-plane uniformity.

【0016】なお、上記実施例では、プラズマ成膜法を
例に説明したが、プラズマエッチング法についても本発
明の効果は同じであることは言うまでもなく、また他の
半導体基板処理方法においても効果は明らかである。
In the above embodiments, the plasma film forming method was used as an example, but it goes without saying that the effects of the present invention are the same for plasma etching methods, and also for other semiconductor substrate processing methods. it is obvious.

【0017】[0017]

【発明の効果】以上のように本発明は、反応ガス排出部
が反応容器に複数個配置され、各々の排気速度を個別に
制御する圧力制御器を有するので、半導体基板面内の処
理の均一性を改善することができる優れた半導体素子の
製造装置を提供できる。
As described above, according to the present invention, a plurality of reaction gas exhaust sections are arranged in a reaction container, and a pressure controller is provided to individually control the exhaust speed of each gas discharge section. It is possible to provide an excellent semiconductor device manufacturing apparatus that can improve performance.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の一実施例の半導体素子の製造装置の構
成を模式的に示す構成図
FIG. 1 is a configuration diagram schematically showing the configuration of a semiconductor device manufacturing apparatus according to an embodiment of the present invention.

【図2】従来の半導体素子の製造装置の構成を模式的に
示す構成図
[Fig. 2] A configuration diagram schematically showing the configuration of a conventional semiconductor device manufacturing apparatus.

【符号の説明】[Explanation of symbols]

1  反応容器 2  半導体基板 3  基板保持台 4  半導体基板導入装置 5  反応ガス供給装置 6  反応ガス導入部 7  真空装置 10  プラズマ形成用電極 11  プラズマ発生用電源 21  反応ガス排出部 22  圧力制御器 1 Reaction container 2 Semiconductor substrate 3 Substrate holding stand 4 Semiconductor substrate introduction equipment 5 Reaction gas supply device 6 Reactant gas introduction part 7 Vacuum equipment 10 Electrode for plasma formation 11 Plasma generation power supply 21 Reactant gas discharge part 22 Pressure controller

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】半導体素子が形成される半導体基板を収容
保持するように構成された反応容器と、その反応容器内
に半導体基板を挿入する半導体基板導入装置と、前記反
応容器内に所望ガスを供給する反応ガス供給装置と、そ
の反応ガス供給装置を前記反応容器に連結した反応ガス
導入部と、前記反応容器内を所望の真空度に排気する真
空装置と、その真空装置を前記反応容器に連結した反応
ガス排気部とを備えた半導体素子の製造装置において、
前記反応ガス排出部が前記反応容器に複数個配置され、
その各々の反応ガス排出部の排気速度を独立に制御する
ための圧力制御器を備えていることを特徴とする半導体
素子の製造装置。
1. A reaction vessel configured to house and hold a semiconductor substrate on which a semiconductor element is formed, a semiconductor substrate introducing device for inserting the semiconductor substrate into the reaction vessel, and a desired gas introduced into the reaction vessel. a reaction gas supply device for supplying the reaction gas, a reaction gas introduction section connecting the reaction gas supply device to the reaction container, a vacuum device for evacuating the inside of the reaction container to a desired degree of vacuum, and the vacuum device being connected to the reaction container. In a semiconductor device manufacturing apparatus equipped with a connected reaction gas exhaust section,
A plurality of the reaction gas discharge parts are arranged in the reaction container,
1. A semiconductor device manufacturing apparatus comprising a pressure controller for independently controlling the exhaust speed of each of the reaction gas discharge sections.
JP10072691A 1991-05-02 1991-05-02 Processor of semiconductor device Pending JPH04329626A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10072691A JPH04329626A (en) 1991-05-02 1991-05-02 Processor of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10072691A JPH04329626A (en) 1991-05-02 1991-05-02 Processor of semiconductor device

Publications (1)

Publication Number Publication Date
JPH04329626A true JPH04329626A (en) 1992-11-18

Family

ID=14281627

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10072691A Pending JPH04329626A (en) 1991-05-02 1991-05-02 Processor of semiconductor device

Country Status (1)

Country Link
JP (1) JPH04329626A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100302114B1 (en) * 1998-03-27 2001-10-19 철 주 황 Device for Making Semiconductor Element by Using Plasma
JP2009117844A (en) * 2007-11-08 2009-05-28 Applied Materials Inc Multi-port pumping system for substrate treating chamber
JP2014027191A (en) * 2012-07-30 2014-02-06 Hitachi High-Technologies Corp Manufacturing method of photo-cvd film and manufacturing apparatus of photo-cvd film

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01305524A (en) * 1988-06-03 1989-12-08 Nec Corp Plasma cvd device
JPH0362514A (en) * 1989-07-31 1991-03-18 Babcock Hitachi Kk Vapor growth device
JPH0371622A (en) * 1989-08-10 1991-03-27 Fujitsu Ltd Vapor growth device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01305524A (en) * 1988-06-03 1989-12-08 Nec Corp Plasma cvd device
JPH0362514A (en) * 1989-07-31 1991-03-18 Babcock Hitachi Kk Vapor growth device
JPH0371622A (en) * 1989-08-10 1991-03-27 Fujitsu Ltd Vapor growth device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100302114B1 (en) * 1998-03-27 2001-10-19 철 주 황 Device for Making Semiconductor Element by Using Plasma
JP2009117844A (en) * 2007-11-08 2009-05-28 Applied Materials Inc Multi-port pumping system for substrate treating chamber
JP2014027191A (en) * 2012-07-30 2014-02-06 Hitachi High-Technologies Corp Manufacturing method of photo-cvd film and manufacturing apparatus of photo-cvd film

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