JPH04326885A - Television receiver - Google Patents

Abstract

PURPOSE:To improve the picture quality of a displayed picture by varying the moving amount of the input of a motion adaptation processing integrated circuit HD49405 in accordance with the S/N of the input video signal in a system using a motion detecting integrated circuit HD49404 and the motion adaptation processing integrated circuit HD49405 in the video signal processing circuit of a clearvision, etc. CONSTITUTION:A moving amount controlling memory ROM 8 in which the moving amount corresponding to the step of the S/N of the input video signal A is written beforehand is added between the moving amount output terminal M of the integrated circuit part 10 of the HD49404, etc., with functions for motion adaptative Y signal separation and motion detection, etc., and the moving amount input terminal M of the integrated circuit part 11 of the HD49405, etc., with the function for motion scanning interpolation processing, etc., and the moving amount adaptive to the S/N and to vary the moving amount 13 of the ROM 8 in accordance with the level of the S/N of the input video signal A is detected.

Description

【発明の詳細な説明】[Detailed description of the invention]

【０００１】0001

【産業上の利用分野】テレビ受像機等映像関連機器にお
ける動き検出用集積回路ＨＤ４９４０４　および動き適
応処理用集積回路ＨＤ４９４０５　からなる映像信号処
理システムのＳ／Ｎに適応した動き検出回路に関する。FIELD OF INDUSTRIAL APPLICATION This invention relates to a motion detection circuit adapted to the S/N ratio of a video signal processing system comprising a motion detection integrated circuit HD49404 and a motion adaptive processing integrated circuit HD49405 in video related equipment such as television receivers.

【０００２】0002

【従来技術】動き検出出力を決定するファクターには輝
度信号Ｙ動き量、色度信号Ｃ動き量、画像のエッジ量等
あり、クリアビジョンＥＤＴＶ等のＹ動き回路処理にお
いては動き適応Ｙ分離、動き検出用集積回路ＨＤ４９４
０４　と後段の動き量による動き適応処理用集積回路Ｈ
Ｄ４９４０５　との組み合わせからなり、動き検出用集
積回路ＨＤ４９４０４　出力の動き量データおよびＹ信
号を動き適応走査補間等を行う動き適応処理用集積回路
ＨＤ４９４０５に直接出力して動き適応処理を行う。上
記動き量データの直接処理に於いて、入力映像信号のＳ
／Ｎの良い状態では画質の劣化する問題はないが、Ｓ／
Ｎの悪化した場合には本来動きがなく静止画処理をして
いる時にも静止画像に細かいノイズが現れ総合画質の劣
化する場合がある。[Prior Art] Factors that determine motion detection output include luminance signal Y motion amount, chromaticity signal C motion amount, image edge amount, etc. In Y motion circuit processing such as clear vision EDTV, motion adaptive Y separation, motion Detection integrated circuit HD494
04 and an integrated circuit H for motion adaptive processing based on the amount of motion in the subsequent stage
D49405, the motion amount data and Y signal output from the motion detection integrated circuit HD49404 are directly output to the motion adaptive processing integrated circuit HD49405, which performs motion adaptive scanning interpolation, etc., to perform motion adaptive processing. In the direct processing of the above motion amount data, the input video signal S
There is no problem with image quality deterioration in good /N conditions, but
If N deteriorates, fine noise may appear in the still image even when there is no movement and still image processing is being performed, and the overall image quality may deteriorate.

【０００３】0003

【発明が解決しようとする課題】本発明は上記従来例に
鑑みてなされたもので、クリアビジョンＥＤＴＶ等にお
ける動き検出用集積回路ＨＤ４９４０４　と走査補間処
理等の動き適応処理用集積回路ＨＤ４９４０５　との組
み合わせを変えることなく、同集積回路ＨＤ４９４０５
　入力の動き量を入力映像信号のＳ／Ｎに応じて切り換
え表示画像の総合画質の向上を図ることを目的とする。The present invention has been made in view of the above conventional example, and is a combination of an integrated circuit HD49404 for motion detection in clear vision EDTV etc. and an integrated circuit HD49405 for motion adaptive processing such as scan interpolation processing. The same integrated circuit HD49405
It is an object of the present invention to improve the overall image quality of a displayed image by changing the input motion amount according to the S/N of an input video signal.

【０００４】0004

【課題を解決するための手段】本発明は、動き検出用集
積回路ＨＤ４９４０４の動き量データ出力端子と動き適
応処理用集積回路ＨＤ４９４０５　の動き量データ入力
端子との間に入力映像信号のＳ／Ｎに応じた動き量を予
め書き込んだ動き量コントロール用読み出し専用メモリ
ＲＯＭ　を付加し、同ＲＯＭ　出力の動き量データを入
力映像信号のＳ／Ｎのレベルに応じて可変することを特
徴とする。Means for Solving the Problems The present invention provides an S/N ratio of an input video signal between a motion amount data output terminal of a motion detection integrated circuit HD49404 and a motion amount data input terminal of a motion adaptive processing integrated circuit HD49405. The present invention is characterized in that a read-only memory ROM for motion amount control in which a motion amount corresponding to the amount of motion is written in advance is added, and the motion amount data output from the ROM is varied in accordance with the S/N level of the input video signal.

【０００５】[0005]

【作用】図１に示すように、輝度信号Ｙ動き検出用集積
回路部１０、動き適応処理用集積回路部１１、映像信号
Ａのアナログ／ディジタル変換器１、入力信号を一時保
持するラッチ回路２，４，７、加算器３、読み出し専用
メモリＲＯＭ　６，８の回路構成からなり、ラッチ回路
２およびラッチ回路４出力の映像信号をそれぞれ図２の
Ａに示す垂直ブランキング期間内のフロントポーチ期間
ＦＰ加算した加算器３出力信号９をＲＯＭ　６に入力し
、同ＲＯＭ６は入力映像信号ＡのＳ／Ｎに基づく加算器
３出力信号９に応じてＳ／Ｎを決定しラッチ回路７にデ
ータを出力し、同データに基づくラッチ回路７出力のラ
ッチＳ／Ｎ制御データ１４のレベルにより予めＳ／Ｎに
応じた動き量を書き込んでおいた前記ＲＯＭ　８を制御
して、映像信号ＡのＳ／Ｎの悪い場合は前記動き適応処
理用集積回路部１１入力の動き量（ＭＯＴＩＯＮ）１３
を多くする。[Operation] As shown in FIG. 1, an integrated circuit unit 10 for detecting motion of the luminance signal Y, an integrated circuit unit 11 for motion adaptive processing, an analog/digital converter 1 for video signal A, and a latch circuit 2 for temporarily holding the input signal. , 4, 7, an adder 3, and a read-only memory ROM 6, 8, the video signals of the latch circuit 2 and latch circuit 4 are output during the front porch period within the vertical blanking period shown in A of FIG. 2, respectively. The FP-added adder 3 output signal 9 is input to the ROM 6, and the ROM 6 determines the S/N according to the adder 3 output signal 9 based on the S/N of the input video signal A, and sends the data to the latch circuit 7. Based on the level of the latch S/N control data 14 output from the latch circuit 7 based on the same data, the ROM 8, in which the amount of movement corresponding to the S/N has been written in advance, is controlled to control the S/N of the video signal A. If N is bad, the motion amount (MOTION) 13 of the input of the motion adaptive processing integrated circuit section 11
increase.

【０００６】[0006]

【実施例】図１にクリアビジョンＥＤＴＶ等における入
力映像信号のＳ／Ｎに適応した動き検出回路のブロック
図を示し、回路動作波形のタイミングを図２に示す。１
０は水平垂直エッジ検出、動き検出、動き適応輝度信号
Ｙ分離機能等を有し輝度信号Ｙおよび動き量データ１２
を出力するＨＤ４９４０４等の集積回路部、１１はＹ信
号および動き量データ１３を入力して倍速変換回路（図
示せず）へ信号１５を出力する動き検出信号の時空間フ
ィルタ、動き適応走査補間機能等を有するＨＤ４９４０
５　等の集積回路部、１は映像信号Ａ（図２のＡ）のア
ナログ／ディジタル変換器、２は同アナログ／ディジタ
ル変換器１出力信号を保持するラッチ回路、３は同ラッ
チ回路２出力信号を一方の入力とする加算器、４は同加
算器３出力信号９を保持し再度同加算器３の他方の入力
に信号を帰還する、クリアＣＬＲ　信号Ｂ（図２のＢ）
およびクロックＣＬＫ　信号とクロックコントロール信
号Ｃ（図２のＣ）とを入力とするアンドゲート回路５出
力によるラッチ回路、６は入力映像信号ＡのＳ／Ｎに基
づく加算器３出力信号９に応じてＳ／Ｎを決定したデー
タを出力する読み出し専用メモリＲＯＭ　、７は同ＲＯ
Ｍ　６出力データを保持し予めＳ／Ｎの任意の段階に応
じた動き量を書き込んでおいた動き量コントロール用読
み出し専用メモリＲＯＭ　８にＳ／Ｎ制御データ１４を
出力するＲＯＭ　クロック信号Ｄ（図２のＤ）によるラ
ッチ回路である。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a block diagram of a motion detection circuit adapted to the S/N of an input video signal in a clear vision EDTV, etc., and FIG. 2 shows the timing of circuit operation waveforms. 1
0 has horizontal/vertical edge detection, motion detection, motion adaptive luminance signal Y separation functions, etc., and luminance signal Y and motion amount data 12
11 is a motion detection signal spatiotemporal filter that inputs the Y signal and motion amount data 13 and outputs a signal 15 to a double speed conversion circuit (not shown), and a motion adaptive scanning interpolation function. HD4940 with etc.
5 and other integrated circuit units, 1 is an analog/digital converter for video signal A (A in Figure 2), 2 is a latch circuit that holds the analog/digital converter 1 output signal, and 3 is the same latch circuit 2 output signal. The adder 4 receives the adder 3 output signal 9 and feeds the signal back to the other input of the adder 3. Clear CLR signal B (B in Figure 2)
and a latch circuit based on the output of an AND gate circuit 5 which inputs the clock CLK signal and the clock control signal C (C in FIG. 2); Read-only memory ROM that outputs data that determines the S/N, 7 is the same RO
A read-only memory ROM for motion amount control, which holds the output data M6 and has previously written the amount of motion according to an arbitrary stage of S/N. A ROM that outputs the S/N control data 14 to 8. Clock signal D (Fig. This is a latch circuit according to D) of 2.

【０００７】タイミング的に説明すると、アナログ／デ
ィジタル変換器１出力の映像信号をラッチ回路２に一度
保持した後、加算器３出力のラッチ回路４の出力映像信
号とともに加算器３に入力して和の信号９を出力する。 この和の信号９部分は図２のＡに示す入力ＮＴＳＣ映像
信号Ａの垂直ブランキング期間内のフロントポーチ期間
ＦＰの黒レベルを利用する。即ち、各水平ラインＨの立
上がりで図２のＢに示すラッチ回路４のクリアＣＬＲ信
号Ｂを発生させ黒レベル部を加算器３で加算していき、
フロントポーチの黒レベルの終了した時点ｔでＲＯＭ　
６出力データをラッチ回路７で保持する。また、ＲＯＭ
　６出力データの内容は加算器３出力の信号９により決
定するもので、映像信号ＡのＳ／Ｎが良い場合、即ち、
信号の変動がない場合ＲＯＭ　６入力信号９は一定レベ
ルとなり、逆にＳ／Ｎが悪い場合ＲＯＭ　６入力信号９
は前記一定レベルからシフトしたレベルとなることから
、一定レベルからのシフトした量によりＳ／Ｎを決定す
る。よって、ラッチ回路７出力のＳ／Ｎ制御データ１４
のレベルにより予めＳ／Ｎの任意の段階に応じた動き量
を書き込んでおいた動き量コントロール用ＲＯＭ　８を
制御して所定の動き量データ１３を読み出し、映像信号
のＳ／Ｎが悪い場合は動き量を多くして動領域での適応
処理とし静止画像の画質改善を図る。In terms of timing, the video signal output from the analog/digital converter 1 is once held in the latch circuit 2, and then input to the adder 3 together with the output video signal from the latch circuit 4, which is the output of the adder 3, and summed. outputs signal 9. The nine portions of the sum signal utilize the black level of the front porch period FP within the vertical blanking period of the input NTSC video signal A shown in FIG. 2A. That is, at the rise of each horizontal line H, a clear CLR signal B of the latch circuit 4 shown in FIG. 2B is generated, and the black level portion is added by the adder 3.
ROM at the end of the black level of the front porch
6 output data is held in the latch circuit 7. Also, ROM
The content of the 6 output data is determined by the signal 9 of the adder 3 output, and when the S/N of the video signal A is good, that is,
If there is no signal fluctuation, the ROM 6 input signal 9 will be at a constant level, and if the S/N is poor, the ROM 6 input signal 9 will be at a constant level.
Since this is a level shifted from the constant level, the S/N is determined by the amount shifted from the constant level. Therefore, the S/N control data 14 of the latch circuit 7 output
The predetermined motion amount data 13 is read out by controlling the motion amount control ROM 8 in which the amount of motion corresponding to an arbitrary stage of S/N is written in advance according to the level of S/N. The image quality of still images is improved by increasing the amount of motion and using adaptive processing in the moving area.

【０００８】[0008]

【発明の効果】以上のように本発明は、動き検出用集積
回路ＨＤ４９４０４　の動き量データ出力端子と動き適
応処理用集積回路ＨＤ４９４０５　の動き量データ入力
端子との間に入力映像信号のＳ／Ｎの段階に応じた動き
量を予め書き込んだ動き量コントロール用メモリＲＯＭ
　を付加し、同ＲＯＭ　出力の動き量データを入力映像
信号のＳ／Ｎのレベルに応じて可変することで、Ｓ／Ｎ
が悪い場合は動き量を多くして静止画像の画質の向上を
図ることができる。As described above, the present invention provides an S/N ratio of an input video signal between the motion amount data output terminal of the motion detection integrated circuit HD49404 and the motion amount data input terminal of the motion adaptive processing integrated circuit HD49405. A memory ROM for controlling the amount of movement in which the amount of movement according to the stage is written in advance.
By adding a ROM and varying the amount of motion data output from the same ROM according to the S/N level of the input video signal, the S/N
If the image quality is poor, the quality of the still image can be improved by increasing the amount of motion.

【図面の簡単な説明】[Brief explanation of drawings]

【図１】入力信号のＳ／Ｎに適応した動き検出回路のブ
ロック図である。FIG. 1 is a block diagram of a motion detection circuit adapted to the S/N of an input signal.

【図２】同図１を説明するための各部動作波形のタイミ
ング図である。FIG. 2 is a timing diagram of operation waveforms of each part for explaining FIG. 1;

【符号の説明】[Explanation of symbols]

１　　アナログ／ディジタル変換器 ２　　ラッチ回路 ３　　加算器 ４　　ラッチ回路 ５　　アンドゲート回路 ６　　メモリ ７　　ラッチ回路 ８　　メモリ １０　　動き検出用集積回路部 １１　　動き適応処理用集積回路部 1 Analog/digital converter 2 Latch circuit 3 Adder 4 Latch circuit 5 AND gate circuit 6 Memory 7 Latch circuit 8 Memory 10 Motion detection integrated circuit section 11 Integrated circuit for motion adaptive processing

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】　　クリアビジョン等の動き検出用集積回
路部および動き適応処理用集積回路部からなる映像信号
処理システムにおいて、アナログ／ディジタル変換した
映像信号を第１のラッチ回路を介して加算器の一方の入
力に接続し、同加算器出力をクロック信号およびクロッ
クコントロール信号を入力とするアンドゲート回路出力
信号制御の第２のラッチ回路に接続するとともに第１の
読み出し専用メモリＲＯＭ　に接続し、同第２のラッチ
回路出力を前記加算器の他方の入力に帰還し、前記第１
のＲＯＭ　出力を第３のラッチ回路に接続し、同第３の
ラッチ回路出力データと前記動き検出用集積回路部出力
の動き量データとをそれぞれ第２の読み出し専用メモリ
ＲＯＭ　に接続し、同第２のＲＯＭ　出力データを前記
動き適応処理用集積回路部の動き量データ入力端子に接
続してなる入力映像信号のＳ／Ｎに適応した動き検出を
特徴とするテレビ受像機。Claim 1: In a video signal processing system consisting of a motion detection integrated circuit unit such as Clear Vision and a motion adaptive processing integrated circuit unit, an analog/digital converted video signal is passed through a first latch circuit to an adder. The output of the adder is connected to a second latch circuit of AND gate output signal control which inputs a clock signal and a clock control signal, and is connected to a first read-only memory ROM. A second latch circuit output is fed back to the other input of the adder, and the second latch circuit output is fed back to the other input of the adder, and
The ROM output of the third latch circuit is connected to a third latch circuit, and the output data of the third latch circuit and the motion amount data of the motion detection integrated circuit section are respectively connected to a second read-only memory ROM. 2. A television receiver characterized by motion detection adapted to the S/N of an input video signal by connecting the ROM output data of No. 2 to the motion amount data input terminal of the motion adaptive processing integrated circuit section.