JPH0427194A - High density multilayer wiring board and manufacture thereof - Google Patents
High density multilayer wiring board and manufacture thereofInfo
- Publication number
- JPH0427194A JPH0427194A JP13231090A JP13231090A JPH0427194A JP H0427194 A JPH0427194 A JP H0427194A JP 13231090 A JP13231090 A JP 13231090A JP 13231090 A JP13231090 A JP 13231090A JP H0427194 A JPH0427194 A JP H0427194A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- mixture
- hole
- thermosetting resin
- holes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 31
- 239000000203 mixture Substances 0.000 claims abstract description 27
- 239000011347 resin Substances 0.000 claims abstract description 26
- 229920005989 resin Polymers 0.000 claims abstract description 26
- 229910052802 copper Inorganic materials 0.000 claims abstract description 24
- 239000010949 copper Substances 0.000 claims abstract description 24
- 239000011521 glass Substances 0.000 claims abstract description 20
- 229910052751 metal Inorganic materials 0.000 claims abstract description 18
- 238000000034 method Methods 0.000 claims abstract description 18
- 229920001187 thermosetting polymer Polymers 0.000 claims abstract description 18
- 239000002184 metal Substances 0.000 claims abstract description 17
- 239000002245 particle Substances 0.000 claims abstract description 11
- 229910000679 solder Inorganic materials 0.000 claims abstract description 10
- 238000010438 heat treatment Methods 0.000 claims abstract description 7
- 239000010954 inorganic particle Substances 0.000 claims abstract description 6
- 239000002923 metal particle Substances 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims description 14
- 238000005498 polishing Methods 0.000 claims description 7
- 238000005553 drilling Methods 0.000 claims description 6
- 239000004593 Epoxy Substances 0.000 abstract description 15
- 238000007747 plating Methods 0.000 abstract description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 abstract description 8
- 238000007772 electroless plating Methods 0.000 abstract description 8
- 239000011888 foil Substances 0.000 abstract description 8
- 229910052759 nickel Inorganic materials 0.000 abstract description 3
- 229910052782 aluminium Inorganic materials 0.000 abstract description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 229910052745 lead Inorganic materials 0.000 abstract 1
- 239000002075 main ingredient Substances 0.000 abstract 1
- 239000013528 metallic particle Substances 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- -1 stainless Chemical compound 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052718 tin Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 60
- 238000005530 etching Methods 0.000 description 15
- 239000004744 fabric Substances 0.000 description 9
- 239000003795 chemical substances by application Substances 0.000 description 8
- 239000003054 catalyst Substances 0.000 description 7
- 239000011889 copper foil Substances 0.000 description 7
- 229920001721 polyimide Polymers 0.000 description 7
- YMWUJEATGCHHMB-UHFFFAOYSA-N Dichloromethane Chemical compound ClCCl YMWUJEATGCHHMB-UHFFFAOYSA-N 0.000 description 6
- OWYWGLHRNBIFJP-UHFFFAOYSA-N Ipazine Chemical compound CCN(CC)C1=NC(Cl)=NC(NC(C)C)=N1 OWYWGLHRNBIFJP-UHFFFAOYSA-N 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 239000011256 inorganic filler Substances 0.000 description 4
- 229910003475 inorganic filler Inorganic materials 0.000 description 4
- 238000010899 nucleation Methods 0.000 description 4
- 238000007650 screen-printing Methods 0.000 description 4
- 230000035939 shock Effects 0.000 description 4
- 239000000243 solution Substances 0.000 description 4
- 229910000881 Cu alloy Inorganic materials 0.000 description 3
- 229910000990 Ni alloy Inorganic materials 0.000 description 3
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 3
- 239000009719 polyimide resin Substances 0.000 description 3
- 239000002344 surface layer Substances 0.000 description 3
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 2
- 229910000831 Steel Inorganic materials 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 229920001577 copolymer Polymers 0.000 description 2
- 238000007598 dipping method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000012948 isocyanate Substances 0.000 description 2
- 150000002513 isocyanates Chemical class 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000013034 phenoxy resin Substances 0.000 description 2
- 229920006287 phenoxy resin Polymers 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920000728 polyester Polymers 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 239000011342 resin composition Substances 0.000 description 2
- 239000010959 steel Substances 0.000 description 2
- ZNQVEEAIQZEUHB-UHFFFAOYSA-N 2-ethoxyethanol Chemical compound CCOCCO ZNQVEEAIQZEUHB-UHFFFAOYSA-N 0.000 description 1
- NLHHRLWOUZZQLW-UHFFFAOYSA-N Acrylonitrile Chemical compound C=CC#N NLHHRLWOUZZQLW-UHFFFAOYSA-N 0.000 description 1
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 1
- 239000005751 Copper oxide Substances 0.000 description 1
- SECXISVLQFMRJM-UHFFFAOYSA-N N-Methylpyrrolidone Chemical compound CN1CCCC1=O SECXISVLQFMRJM-UHFFFAOYSA-N 0.000 description 1
- 239000004677 Nylon Substances 0.000 description 1
- 239000004962 Polyamide-imide Substances 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 239000004840 adhesive resin Substances 0.000 description 1
- 229920006223 adhesive resin Polymers 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910000431 copper oxide Inorganic materials 0.000 description 1
- 230000001351 cycling effect Effects 0.000 description 1
- 239000000645 desinfectant Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000006224 matting agent Substances 0.000 description 1
- 230000003472 neutralizing effect Effects 0.000 description 1
- 229920001778 nylon Polymers 0.000 description 1
- PIBWKRNGBLPSSY-UHFFFAOYSA-L palladium(II) chloride Chemical compound Cl[Pd]Cl PIBWKRNGBLPSSY-UHFFFAOYSA-L 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920002312 polyamide-imide Polymers 0.000 description 1
- 229920001225 polyester resin Polymers 0.000 description 1
- 239000004645 polyester resin Substances 0.000 description 1
- 239000012286 potassium permanganate Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000000454 talc Substances 0.000 description 1
- 229910052623 talc Inorganic materials 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- KAKZBPTYRLMSJV-UHFFFAOYSA-N vinyl-ethylene Natural products C=CC=C KAKZBPTYRLMSJV-UHFFFAOYSA-N 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、接続信鯨性に優れた高密度多層配線板および
その製造法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a high-density multilayer wiring board with excellent connection reliability and a method for manufacturing the same.
電子機器の発達に伴い、配線板の配線密度も非常に高い
ものが要求されるようになってきた。With the development of electronic equipment, wiring boards with extremely high wiring density are now required.
このような配線密度の高い配線板として、必要な配線パ
ターンにワイヤを使用した配線板〔以下マルチワイヤ配
線Ｉ（日立化成工業株式会社製。As a wiring board with such a high wiring density, a wiring board using wires for the necessary wiring pattern [hereinafter referred to as multi-wire wiring I (manufactured by Hitachi Chemical Co., Ltd.).
商品名）と呼ぶ〕や多層印刷配線板がある。(product name)] and multilayer printed wiring boards.
マルチワイヤ配線板は、特公昭４５−２１４３４号公報
によって開示されているように、電源層やグランド層な
どの回路を形成した内層基板上に接着性を有する樹脂層
（接着性絶縁層）を形成した後、数値制御布線機により
ポリイミド樹脂などで被覆されたワイヤを布＆Ｉ（ワイ
ヤを樹脂層にはわせてゆくと同時に超音波接着する）し
、プレス等によりワイヤを固定し、上記ワイヤを横切る
穴をあけ、その内部に無電解金属層を形成して製造され
ている。As disclosed in Japanese Patent Publication No. 45-21434, multi-wire wiring boards are manufactured by forming an adhesive resin layer (adhesive insulating layer) on an inner layer substrate on which circuits such as a power supply layer and a ground layer are formed. After that, the wire coated with polyimide resin etc. is coated with cloth & I (the wire is laid on the resin layer and simultaneously ultrasonically bonded) using a numerically controlled wiring machine, the wire is fixed with a press etc., and the wire is It is manufactured by drilling a horizontal hole and forming an electroless metal layer inside the hole.
また多層印刷配線板は、内層回路板の最外層を、銅箔の
不要部分をエツチング除去して形成する方法と必要な部
分に銅をめっきして形成する方法があり、複数の回路板
を積層接着する方法としては、この複数の回路板とプリ
プレグを位置合セのピンを用いて、交互に重ね合せ加圧
加熱して積層するピンラミネーション法と、内層回路板
の上にプリプレグを介して銅箔を重ねＪｆｉ層一体化し
て、このｗ４箔の不要部分をエツチング除去する工程を
繰り返すビルドアップ法がある。In addition, multilayer printed wiring boards can be formed by forming the outermost layer of an inner layer circuit board by etching away unnecessary parts of the copper foil, or by plating copper on the necessary parts, and by laminating multiple circuit boards. The bonding methods are pin lamination, in which multiple circuit boards and prepreg are stacked alternately using positioning pins and heated under pressure, and copper is bonded onto the inner layer circuit board via the prepreg. There is a build-up method in which the process of stacking foils to integrate the Jfi layer and etching away unnecessary parts of the W4 foil is repeated.
さらに、マルチワイヤ配線板や多層印刷配線板において
、配線密度をより一層向上させ、配線板の両面に部品を
実装できる配線板が増加しつつある。Furthermore, in multi-wire wiring boards and multilayer printed wiring boards, the number of wiring boards that can further improve wiring density and mount components on both sides of the wiring board is increasing.
すなわち、内層回路板として、スルーホールと必要に応
じて回路パターンを形成したものをプリプレグと交互に
重ね合せ、加圧加熱により一体化すると同時に、スルー
ホール内にプリプレグの樹脂を充填させたのち、さらに
、スルーホールと表面層を形成してなる多層印刷配線板
である。That is, as an inner layer circuit board, through-holes and circuit patterns formed as necessary are alternately stacked on prepreg, and are integrated by pressurizing and heating, and at the same time, after filling the through-holes with prepreg resin, Furthermore, it is a multilayer printed wiring board formed by forming through holes and a surface layer.
このように両面に部品を実装できる高密度のマルチワイ
ヤ配線板は、前記したようにプレス等によりワイヤを固
定したのち、この表面に銅層を設け、スルーホールと必
要に応じて回路パターンを形成したものを内層回路板と
し、これをプリプレグと交互に重ね合せ、加圧加熱によ
り一体化すると同時にスルーホール内にプリプレグの樹
脂を充填させたのち、さらに、スルーホールと表面層を
形成して製造されている。In order to create a high-density multi-wire wiring board that allows components to be mounted on both sides, the wires are fixed using a press as described above, then a copper layer is provided on this surface, and through holes and circuit patterns are formed as necessary. This is used as an inner layer circuit board, and this is layered alternately with prepreg, integrated by pressure and heating, and at the same time, the through holes are filled with prepreg resin, and then the through holes and surface layer are formed. has been done.
ところが、内層回路板のスルーホールにプリプレグの樹
脂が充填されている高密度の多層印刷配線板やマルチワ
イヤ配ｗＡ板において、内層回路板の板厚が厚い場合や
スルーホールの穴径が小さい場合に、熱衝撃サイクル試
験の比較的低サイクルでスルーホールの鋼壁にクランク
が発生することがある。However, in high-density multilayer printed wiring boards and multi-wire distribution A boards in which the through holes of the inner layer circuit board are filled with prepreg resin, when the inner layer circuit board is thick or the diameter of the through hole is small. Additionally, cranks may occur in the steel walls of through-holes during relatively low cycles of thermal shock cycling tests.
これを解決する手法として、スルーホールの鋼壁厚を厚
くして熱衝撃サイクル試験における応力に耐えうるよう
に機械的強度を向上させることが考えられる。しかしな
がら、穴内壁に銅めっき層を形成すると同時に基板表面
にも銅めっきされるため、表面銅層が厚くなり、エツチ
ングによる微細パターン形成が困難となる。One possible solution to this problem is to increase the thickness of the steel wall of the through-hole to improve its mechanical strength so that it can withstand stress during thermal shock cycle tests. However, since the surface of the substrate is also plated with copper at the same time as the copper plating layer is formed on the inner wall of the hole, the surface copper layer becomes thick and it becomes difficult to form a fine pattern by etching.
また、基板に使用されている樹脂を熱膨張係数の小さい
ポリイミド樹脂などに変更する手法が考えられるが、２
００℃以上で加熱する必要があり、経済性の点から好ま
しくない。Another possible method is to change the resin used for the substrate to a polyimide resin with a small coefficient of thermal expansion, but 2.
It is necessary to heat at 00° C. or higher, which is not preferable from an economic point of view.
本発明は、このような点に鑑みてなされたものであり、
高倍転性で高密度の配線板を効率よく製造する方法を貨
供するものである。The present invention has been made in view of these points,
The objective is to provide a method for efficiently manufacturing high-density wiring boards with high convertibility.
（課題を解決するための手段）
本発明は、高密度の配線板において、内層回路板のスル
ーホール内に金属、あるいは金属粒子と熱硬化性樹脂の
混合物あるいは無機粒子と熱硬化性樹脂の混合物を充填
することによって高信幀性化する方法を捉供する。(Means for Solving the Problems) The present invention provides a high-density wiring board in which a metal, a mixture of metal particles and a thermosetting resin, or a mixture of inorganic particles and a thermosetting resin is used in a through hole of an inner layer circuit board. We will provide a method to increase reliability by filling in the information.
本発明の配線板は、第１図に示すようにグランドＮ１お
よび／または電源層２と、信号層３とスルーホール４を
有する内層回路板５と、必要に応じてスルーホールのな
い内層回路板６と、これら内層回路板５．６とを積層接
着すゐためのプリプレグ７とスルーホール８と表面層Ｉ
ｓ９よりなる多層印刷配線板において、内層回路板５の
スルーホール４に金［１０あるいは金属粒子と熱硬化性
樹脂の混合物あるいは無機粒子と熱硬化性樹脂の混合物
が充填されていることを特徴とするものである。As shown in FIG. 1, the wiring board of the present invention includes an inner layer circuit board 5 having a ground N1 and/or a power layer 2, a signal layer 3 and a through hole 4, and an inner layer circuit board without through holes as required. 6, a prepreg 7 for laminating and adhering these inner layer circuit boards 5.6, through holes 8, and a surface layer I.
s9, the through holes 4 of the inner layer circuit board 5 are filled with gold [10] or a mixture of metal particles and a thermosetting resin, or a mixture of inorganic particles and a thermosetting resin. It is something to do.
この時、信号線路は必ずしも金属箔である必要はなく、
第２図に示すように絶縁ワイヤ１１でも使用できる。At this time, the signal line does not necessarily have to be made of metal foil,
An insulated wire 11 can also be used as shown in FIG.
本発明の配線板の製造法は、多層印刷配線板の場合を第
３Ａ〜第３Ｄ図に示した。すなわち、第３Ａ図に示した
ように、金属箔張り積層板を用いてエツチドフォイル法
などでグランド層ｌや電源層２や信号層３を形成したの
ち、プリプレグ７を介して加圧加熱一体化する０次に、
穴あけを行ったのち、電気めっきや無電解めっきなどで
スルーホール４を第３Ｂ図のように形成する。The method for manufacturing a wiring board of the present invention is shown in FIGS. 3A to 3D in the case of a multilayer printed wiring board. That is, as shown in FIG. 3A, after forming the ground layer 1, power supply layer 2, and signal layer 3 using a metal foil-clad laminate by the etched foil method, etc., the metal foil-clad laminate is pressurized and heated to form an integral layer through the prepreg 7. The zeroth order becomes
After drilling, a through hole 4 is formed by electroplating or electroless plating as shown in FIG. 3B.
金属箔張り積層板やプリプレグとしては、ガラス布−エ
ポキシ製、ガラス布−エポキシ／フェノール製、ガラス
布−ガラス祇−エポキシ製、ガラス祇−ポリエステル製
、ガラス布−エポキシ変性ポリイミド製、ガラス布−フ
ッ素樹脂製などが使用できる。また、これらの樹脂中に
無電解めっき触媒を添加して、表面のみ触媒活性化処理
をすることなく、スルーホール４を形成してもよい。Metal foil-clad laminates and prepregs include glass cloth made of epoxy, glass cloth made of epoxy/phenol, glass cloth made of glass cloth made of epoxy, glass cloth made of polyester, glass cloth made of epoxy-modified polyimide, and glass cloth made of epoxy-modified polyimide. Materials such as fluororesin can be used. Alternatively, an electroless plating catalyst may be added to these resins to form the through holes 4 without subjecting only the surface to catalyst activation treatment.
次に、この内層回路の表面に耐熱性を有する市鈑のレジ
ストを第３Ｃ図のように形成し、スルーホール内に金１
＊１０を熔融させて充填する。この金属としては、Ｓｎ
とｐｂを主成分とするはんだが使用できる。また、はん
だにニッケル、ニッケル合金、銅、銅合金の粒子を添加
したものを使用してもよい、さらに、はんだや金属粒子
含有はんだをペースト状にしてスクリーン印刷法で、ス
ルーホール内に充填させたのち加熱溶融させてもよい。Next, a heat-resistant sheet resist is formed on the surface of this inner layer circuit as shown in FIG.
*10 is melted and filled. This metal is Sn
Solder whose main components are PB and PB can be used. In addition, solder with nickel, nickel alloy, copper, or copper alloy particles added may be used.Furthermore, solder or solder containing metal particles may be made into a paste and filled into the through hole using a screen printing method. It may be heated and melted afterwards.
さらに、エポキシ、エポキシ／フェノール、ポリエステ
ル、エポキシ変性ポリイミドなどの熱硬化性樹脂に銅、
銅合金、ニッケル、ニッケル合金、ステンレス、アルミ
、アルミ合金などの粒子を５０〜７５ｖｏ１％添加した
混合物や、上記熱硬化性樹脂にガラスＳｉｎ、、アルミ
ナ、ケイ酸ジルユニウム、タルクなどの無機粒子を５０
〜７５ＶＯ■％添加した混合物をスルーホール４に充填
させてもよい。Furthermore, copper, thermosetting resins such as epoxy, epoxy/phenol, polyester, and epoxy-modified polyimide
A mixture in which 50 to 75 vol.% of particles of copper alloy, nickel, nickel alloy, stainless steel, aluminum, aluminum alloy, etc. are added, or inorganic particles such as glass Sin, alumina, zirunium silicate, talc, etc.
The through hole 4 may be filled with a mixture to which ~75% of VO is added.
これらの混合物の充填方法は、特に制限するものではな
いが、スクリーン印刷による方法が好ましい、すなわち
、スルーホール４に位置する部分以外をマスクしたスク
リーンを用いて、この１合物を印刷によりスルーホール
内に充填させる。そして硬化させたのち、表面研磨によ
り銅表面に飛散した混合物を除去する方法である。The method for filling these mixtures is not particularly limited, but it is preferable to use screen printing. In other words, using a screen that masks areas other than those located in the through holes 4, this mixture is printed to fill the through holes. Fill it inside. After curing, the mixture scattered on the copper surface is removed by surface polishing.
このほか、この混合物を半硬化のフィルム状にしたのち
、レジスト１３の上に配して加圧加熱によって混合物を
スルーホール４に流動充填させ、表面研磨後レジストを
除去する方法も使用可能である。In addition, it is also possible to use a method in which this mixture is made into a semi-cured film, placed on top of the resist 13, fluidized and filled into the through-holes 4 by pressure and heating, and the resist is removed after surface polishing. .
次に、第３Ｄ図に示したように、必要に応じて片面ある
いは両面に回路を公知の方法で形成し、プリプレグと共
に多層化接着後、必要に応じて穴あけスルーホールめっ
きを行い、さらに公知の方法で表面回路を形成すること
により第１図の本発明の高密度多層配線板を得ることが
できる。Next, as shown in Figure 3D, a circuit is formed on one side or both sides as necessary by a known method, and after multi-layer adhesion with prepreg, drilling and through-hole plating are performed as necessary. The high-density multilayer wiring board of the present invention shown in FIG. 1 can be obtained by forming surface circuits by this method.
本発明は、信号ラインに絶縁ワイヤを用いたマルチワイ
ヤ配線板においても達成できる。第４八図に示したよう
に金属箔張り積層板を用いて、エツチドフォイル法など
て電源層やグランド層を形成し、さらに、この表面に接
着性絶縁層１４を設ける。The present invention can also be achieved in a multi-wire wiring board using insulated wires for signal lines. As shown in FIG. 48, a power supply layer and a ground layer are formed using the etched foil method using a metal foil-clad laminate, and an adhesive insulating layer 14 is further provided on the surface thereof.
金属箔張り積層板としては、前記した多層印刷配線板の
場合と同様のものが使用可能である。As the metal foil-clad laminate, the same ones as in the case of the multilayer printed wiring board described above can be used.
接着性絶縁層１４としては、アクリロニトリルブタジェ
ン共重合体（ＮＢＲ）とフェノールと硬化剤と無機充填
剤よりなるものや、ＮＢＲとエポキシと硬化剤、無機充
填剤よりなるものや、フェノキシ樹脂とイソシアネート
系硬化剤と無機充填剤よりなるものや、フェノキシ樹脂
とエポキシ樹脂とイソシアネート系硬化剤と無機充填剤
よりなるものなどが使用可能である。The adhesive insulating layer 14 may be made of acrylonitrile butadiene copolymer (NBR), phenol, a curing agent, and an inorganic filler, or may be made of NBR, epoxy, a curing agent, and an inorganic filler, or may be made of a phenoxy resin and isocyanate. It is possible to use those made of a curing agent and an inorganic filler, or those made of a phenoxy resin, an epoxy resin, an isocyanate curing agent, and an inorganic filler.
次に、数値制御布ｖＡｌｌを用いて絶縁ワイヤ１１を配
設固定する。Next, the insulated wire 11 is arranged and fixed using the numerical control cloth vAll.
絶縁ワイヤ１１としては、銅、銅合金あるいはニッケル
合金などの、例えば直径０．０６〜０．１０１の電線芯
線に予め塗布する絶縁層として、ポリイミド樹脂、共重
合ナイロン、ポリエステル樹脂、ポリアミドイミド樹脂
などがあげられる。The insulated wire 11 may be made of copper, copper alloy, or nickel alloy, and may be made of polyimide resin, copolymerized nylon, polyester resin, polyamide-imide resin, etc. as an insulating layer coated in advance on a wire core wire with a diameter of 0.06 to 0.101, for example. can be given.
次に、前記した絶縁ワイヤを配設した表面にプリプレグ
７を置き、さらに、あらかじめ回路形成した回路板を置
き、加圧加熱することによって第４Ｃ図に示した基板を
得ることができる。Next, prepreg 7 is placed on the surface on which the insulated wires described above are provided, and a circuit board on which a circuit has been formed in advance is placed and heated under pressure to obtain the substrate shown in FIG. 4C.
ここで用いるプリプレグ７も前記した多層印刷配線板の
場合と同様なものが使用可能である。As the prepreg 7 used here, the same prepreg as in the case of the multilayer printed wiring board described above can be used.
そして、第４Ｄ図に示したように穴あけしたのち、スル
ーホール４を形成し、多層印刷配線板の場合と同様の工
程により第２図に示した本発明のマルチワイヤ配線板を
得ることができる。Then, after drilling as shown in FIG. 4D, through holes 4 are formed, and the multi-wire wiring board of the present invention shown in FIG. 2 can be obtained by the same process as in the case of the multilayer printed wiring board. .
本発明による高密度多層配線板では、内層回路板のスル
ーホール内に、プリプレグの樹脂の熱膨張係数より小さ
いスルーホールの金属層、例えば銅の熱膨張係数に近い
材料を充填するため、熱膨張係数の差による熱応力が小
さくなる。このため、熱衝撃サイクル試験によるスルー
ホール壁のクランクが発生しにくくなり、接続信頼性が
向上する。In the high-density multilayer wiring board according to the present invention, the through holes of the inner layer circuit board are filled with a material whose thermal expansion coefficient is close to that of the metal layer of the through hole, such as copper, which has a coefficient of thermal expansion smaller than that of the prepreg resin. Thermal stress due to the difference in coefficients is reduced. Therefore, cranking of the through-hole wall during thermal shock cycle tests is less likely to occur, and connection reliability is improved.
〔実施例１〕
ｌ）両面粗化銅箔張ガラス・エポキシ積層板ＭＣＬ−Ｅ
−６７（日立化成工業株式会社、商品名）の表面に所望
のエツチングレジストを形成し、不要の銅箔をエツチン
グ除去して、電源、グランド層あるいは信号層を形成す
る。[Example 1] l) Double-sided roughened copper foil-clad glass/epoxy laminate MCL-E
A desired etching resist is formed on the surface of -67 (trade name, Hitachi Chemical Co., Ltd.), and unnecessary copper foil is removed by etching to form a power supply, ground layer, or signal layer.
２）この基板間にガラス・エポキシ製プリプレグＧＥＡ
−６７（日立化成工業株式会社、商品名）を配置し、１
７０℃−４０ｋｇ／ｄ−９０分の条件で加圧加熱する。2) Glass epoxy prepreg GEA is placed between these substrates.
-67 (Hitachi Chemical Co., Ltd., product name) is placed, 1
Heat under pressure at 70° C.-40 kg/d-90 minutes.
３）所望の位置に穴あけし、シーディングを行ったのち
スルーホール銅めっきを約３０μｍ施す。3) After drilling holes at desired positions and performing seeding, through-hole copper plating is applied to approximately 30 μm.
４）第３Ｃ図に示したように、スルーホール部を除くよ
うにソノレダーレジスト５Ｒ−３０００（日立化成工業
株式会社、商品名）を形成する。4) As shown in FIG. 3C, sonoleder resist 5R-3000 (trade name, Hitachi Chemical Co., Ltd.) is formed so as to exclude the through-hole portions.
５）ウェーブソルダーマシンを用いて、６／４はんだを
スルーホール内に充填する。なお、この時のはんだ浴温
度は２４５℃、コンベアー速度ハ４ｍ／分である。5) Using a wave solder machine, fill the through holes with 6/4 solder. Note that the solder bath temperature at this time was 245° C., and the conveyor speed was 4 m/min.
６）塩化メチレンに浸漬してソルダーレジストを除去し
た後、サンドペーパーＮｏ８００で機械研磨を行う。6) After removing the solder resist by dipping in methylene chloride, mechanical polishing is performed using sandpaper No. 800.
７）この表面に所望のエツチングレジストを形成し、不
要の銅箔をエツチング除去する。7) A desired etching resist is formed on this surface, and unnecessary copper foil is removed by etching.
８）上記基板表面のｗ４箔とプリプレグの接着性を向上
させるために、Ｎ ａ Ｃ１０ｔ ６０ ｇ ／ １、
ＮａＯＨ１Ｂｇ／ｌ、Ｎａ５ＰＯａ ５８／１、ｐＪａ
＊ＣＯ５５ｇ／ｌの８５℃水溶液に２分間浸漬して、酸
化銅皮膜を形成する。8) In order to improve the adhesion between the W4 foil and the prepreg on the surface of the substrate, N a C10t 60 g/1,
NaOH1Bg/l, Na5POa 58/1, pJa
*Immerse in 85°C aqueous solution containing 55 g/l of CO for 2 minutes to form a copper oxide film.
９）このようにして得られた内層回路板と前記ガラス・
エポキシ製プリプレグＧＥＡ−６７を交互に重ね合せ、
１７０℃−４０ｋｇ／ｃｄ−９０分の条件で加圧加熱す
る。9) The inner layer circuit board thus obtained and the glass
Alternating layers of epoxy prepreg GEA-67,
Heat under pressure at 170° C.-40 kg/cd-90 minutes.
１０）必要に応じて所望位置に穴あてし、シーディング
を行った後、スルーホール銅めっきを約３５μｍ施す。10) After making holes at desired positions as necessary and performing seeding, through-hole copper plating is applied to approximately 35 μm.
１１）必要に所望のエツチングレジストを形成し、不要
の銅箔をエツチング除去して、高密度多層印刷配線板を
作製した。11) A desired etching resist was formed as necessary, and unnecessary copper foil was removed by etching to produce a high-density multilayer printed wiring board.
（実施例２）
ｌ）無電解めつき触媒含有の両面粗化銅箔張ガラス・エ
ポキシ積層板ＭＣＬ−Ｅ−１６８（日立化成工業株式会
社、商品名）の表面に所望のエツチングレジストを形成
し、不要の銅箔をエツチング除去して、電源、グランド
層あるいは信号層を形成する。(Example 2) l) A desired etching resist was formed on the surface of a double-sided roughened copper foil-clad glass/epoxy laminate MCL-E-168 (trade name, Hitachi Chemical Co., Ltd.) containing an electroless plating catalyst. Then, remove unnecessary copper foil by etching to form a power supply, ground layer, or signal layer.
２）この基板間に無電解めっき触媒含有のガラス・エポ
キシ製プリプレグＧＥＡ−１６８Ｎ （Ｍ）（日立化成
工業株式会社、商品名）を配置し、１７０℃−４０ｋｇ
／ｊ−９０分の条件で加圧加熱する。2) A glass epoxy prepreg GEA-168N (M) (trade name, Hitachi Chemical Co., Ltd.) containing an electroless plating catalyst was placed between the substrates, and the temperature was 40 kg at 170°C.
/j-Heat under pressure for 90 minutes.
３）所望の位置に穴あけし、シーディングすることなく
、スルーホールに無電解銅めっきを約３０μｍ施す。3) Drill a hole at the desired position and apply electroless copper plating to approximately 30 μm on the through hole without seeding.
４）第３Ｃ図に示したようにスルーホール部を除くよう
にフォトレジストＴ−１２１５（デュポン社製、商品名
）を形成する。4) As shown in FIG. 3C, photoresist T-1215 (manufactured by DuPont, trade name) is formed so as to exclude the through-hole portion.
５）スクリーン印刷機を用いて、銅粒子と熱硬化性樹脂
よりなるインクＡＣＰ−００７Ｐ （株式会社アサヒ化
学研究所、商品名）をスルーホール内に充填した後、９
０℃−６０分乾燥した後、さらに１４０℃−６０分の条
件で硬化させる。5) After filling the through hole with ink ACP-007P (trade name, manufactured by Asahi Chemical Research Institute Co., Ltd.) consisting of copper particles and thermosetting resin using a screen printing machine, 9
After drying at 0°C for 60 minutes, it is further cured at 140°C for 60 minutes.
６）塩化メチレンに浸漬してソルダーレジストを除去し
た後、サンドペーパーＮｏ８００で機械研磨を行う。6) After removing the solder resist by dipping in methylene chloride, mechanical polishing is performed using sandpaper No. 800.
７）実施例１の７）〜８）と同様の工程を行う。7) Perform the same steps as 7) to 8) of Example 1.
８）このようにして得られた内層回路板と前記した無電
解めっき触媒含有のガラス・エポキシ製プリプレグＧＥ
Ａ−１６８Ｎ （Ｍ）を交互に重ね合せ、１７０℃−４
０ｋ＋ｒ／ｃｄ −９０分の条件で加圧加熱する。8) The thus obtained inner layer circuit board and the glass epoxy prepreg GE containing the electroless plating catalyst described above.
Alternately stack A-168N (M) and heat at 170℃-4
Heat under pressure at 0k+r/cd for -90 minutes.
９）必要に応じて所望の位置に穴あけし、シーディング
をすることなく、スルーホールに無電解銅めっきを約３
５μｍ施す。9) Drill a hole at the desired position as necessary and apply electroless copper plating to the through hole for approximately 30 minutes without seeding.
Apply 5 μm.
１０）表面に所望のエツチングレジストを形成し、不要
の銅箔をエツチング除去して高密度多層印刷配線板を作
製した。10) A desired etching resist was formed on the surface and unnecessary copper foil was removed by etching to produce a high-density multilayer printed wiring board.
〔実施例３〕
ｌ）無電解めっき触媒含有の両面粗化銅箔張ガラス・エ
ポキシ積層１ｉＭｃｔ、−Ｅ−１６８（日立化成工業株
式会社、商品名）の表面に所望のエツチングレジストを
形成し、不要の銅箔をエンチング除去して、電源、グラ
ンド層を形成する。[Example 3] l) Forming a desired etching resist on the surface of a double-sided roughened copper foil-clad glass/epoxy laminate 1iMct, -E-168 (Hitachi Chemical Co., Ltd., trade name) containing an electroless plating catalyst, Unnecessary copper foil is removed by etching to form a power supply and ground layer.
２）この基板の表面に、下記組成物■を厚さ１５０μｍ
のドライフィルムにしたものを１５０℃−１０ｋｇ／ｃ
ｍ −５分間のプレス条件でラミネートした。2) Apply the following composition (1) to a thickness of 150 μm on the surface of this substrate.
150℃-10kg/c
Lamination was carried out under pressing conditions of m -5 minutes.
〔組成物１〕
以下の組成の樹脂３００ｇに塩化パラジウム１ｇ ヲＮ
−メチルー２−ピロリドン５０ｇに熔解した溶液を混合
する。[Composition 1] 300 g of resin with the following composition and 1 g of palladium chloride.
- Mix the solution dissolved in 50 g of methyl-2-pyrrolidone.
・エチレングリコールモノエチルエーテルアセテート：
６００ｇ／ｊ！
・エポキシ樹脂 １０９ｇ／７！・アクリ
ロニトリルブタジェン共重合体ゴム：ｌ６４ｇ／ｌ
・フェノール樹脂 ： ６０ｇ／７！・
ケイ酸ジルユニウム１９１末 ： ５０ｇ／１３）
この表面に導体径０．１ ｖｗのポリイミド皮膜の自己
融着ワイヤ１１ＭＷ−ＯＨＢＨ（日立電線株式会社、商
品名）を数値制御布線機によって、所望のパターンに布
線した。・Ethylene glycol monoethyl ether acetate:
600g/j!・Epoxy resin 109g/7!・Acrylonitrile butadiene copolymer rubber: 164g/l ・Phenol resin: 60g/7!・
Zylunium silicate 191 powder: 50g/13)
On this surface, self-bonding wire 11 MW-OHBH (trade name, manufactured by Hitachi Cable, Ltd.) with a conductor diameter of 0.1 vw and a polyimide film was wired in a desired pattern using a numerically controlled wiring machine.
４）この基板表面に無電解めっき触媒含有のガラス・エ
ポキシ製プリプレグＧＥＡ−１６８Ｎ （Ｍ）（日立化
成工業株式会社、商品名）と電源層又はグランド層を有
する基板を重ね、１７０℃４０ ｋｇ／ｄ −９０分の
条件で加圧加熱して一体化した後、基板の所望の位置に
穴あけをし、洗浄後、無電解銅めっきを行い、厚さ約３
５μｍの無電解銅めっき層を形成する。4) Layer a glass epoxy prepreg GEA-168N (M) (Hitachi Chemical Co., Ltd., trade name) containing an electroless plating catalyst on the surface of this substrate and a substrate having a power layer or a ground layer, and heat at 170℃ 40 kg/ d After being integrated by pressure heating under conditions of -90 minutes, holes were drilled at desired positions on the board, and after cleaning, electroless copper plating was performed to form a film with a thickness of approximately 3.
A 5 μm electroless copper plating layer is formed.
５）スクリーン印刷機を用いて、下記に示すガラスピー
ス含有の熱硬化樹脂組成物ｎをスルーホール内に充填し
た後、９０℃−６０分乾燥した後、さらに１５０℃−６
０分の条件で硬化させる。5) Using a screen printer, fill the through hole with a thermosetting resin composition n containing glass pieces as shown below, dry at 90°C for 60 minutes, and then dry at 150°C for 60 minutes.
Cure for 0 minutes.
以下の組成の樹脂溶液５００ｇにガラス粒子（平均粒子
５μｍ）７５０ｇを混練する。750 g of glass particles (average particle size: 5 μm) are kneaded into 500 g of a resin solution having the following composition.
・主剤４７４１１１ｆ、プロピマー５２（チバガイギー
、商品名） ：５０部・ｆ
ｕ消剤、プロピマーｏｗ９２（チバガイギー商品名）
〜３０部・硬化剤、プロピ
マーＨ２３２（チバガイギー商品名）
：＋０部６）この基板の表面をサンドペ
ーパーＮ０８００で機械的に研磨した後、アルカリ性過
マンガン酸カリ水溶液（ＫＭｎＯａ ５０ｇ／ｌ、Ｎａ
Ｏｌ（３２ｇ／ｅ、液温６０℃）に３０分間浸消した後
、Ｓ ｎ Ｃ１ｔ ３０ ｇ ／ ｌ 、 ＨＣｊ！
１００ ／ １の中和液に５分間浸漬後、さらに水洗
して、銅表面に付着した不要の組成物■を除去する。・Base agent 474111f, Propimer 52 (Ciba Geigy, trade name): 50 parts・f
u disinfectant, propimer ow92 (Ciba Geigy brand name)
~30 parts / Hardening agent, Propimer H232 (Ciba Geigy brand name)
: +0 parts 6) After mechanically polishing the surface of this substrate with sandpaper N0800, an alkaline potassium permanganate aqueous solution (KMnOa 50 g/l, Na
After soaking in Ol (32 g/e, liquid temperature 60°C) for 30 minutes, S n C1t 30 g/l, HCj!
After being immersed in a 100/1 neutralizing solution for 5 minutes, it is further washed with water to remove unnecessary composition (1) attached to the copper surface.
７）実施例２の７）〜１０）と同様の工程を行う。7) Perform the same steps as 7) to 10) of Example 2.
〔実施例４〕 １）実施例３の１）〜４）と同様の工程を行う。[Example 4] 1) Perform the same steps as 1) to 4) of Example 3.
２）スクリーン印刷機を用いて、下記に示すＮｉ粉末含
有の熱硬化性樹脂組成物■をスルーホール内に充填した
後、９０℃−６０分乾燥した後、さらに１５０℃−６０
分の条件で硬化させる。2) Using a screen printing machine, the through holes were filled with a thermosetting resin composition (1) containing Ni powder shown below, dried at 90°C for 60 minutes, and then dried at 150°C at 60°C.
Cure under conditions of 1 minute.
［＆ｌｌ成物ｍ〕
以下の組成の樹脂溶液５００ＢにＮｉ粒子（平均粒径２
μｍ）７００ｇを混練する。[&ll product m] Ni particles (average particle size 2
μm) 700g are kneaded.
・主剤、プロピマ−５２（チバガイギー、商品名）：５
０部
・艶消剤、プロピマーＤＷ９２（チバガイギー商品名）
：３０部・硬化剤、プロ
ピマーＨ２３２（チバガイギー商品名）
：１０部３）実施例３の６）〜７）と同
様の工程を行う。・Main agent, Propima-52 (Ciba Geigy, trade name): 5
0 parts Matting agent, Propimer DW92 (Ciba Geigy brand name)
: 30 parts / Hardening agent, Propimer H232 (Ciba Geigy brand name)
: 10 parts 3) Perform the same steps as 6) to 7) of Example 3.
〔比較例１〕
実施例１において４）〜６）の工程を除いて作製した多
層印刷配線板。[Comparative Example 1] A multilayer printed wiring board produced in Example 1 except for steps 4) to 6).
〔比較例２〕
実施例３において５）〜６）の工程を除いて作製したマ
ルチワイヤ配！＃ｌ板。[Comparative Example 2] Multi-wire arrangement produced by excluding steps 5) and 6) in Example 3! #l board.
（発明の効果）
以上述べたようにして製造した配線板の熱衝撃サイクル
試験（１２５℃、３０分＝−６５℃、３０分）において
、内層回路板のスルーホールに発生ずるバレルクランク
は下記の通りて、本発明によって接続体転性が大幅に向
上した効果を確認できた。(Effects of the invention) In a thermal shock cycle test (125°C, 30 minutes = -65°C, 30 minutes) of the wiring board manufactured as described above, the barrel crank occurring in the through hole of the inner layer circuit board was as follows. As a result, it was confirmed that the present invention significantly improved the connection property.
第１図は、本発明の多層印刷配線板の断面である。第２
図は、本発明のマルチワイヤ配線板の断面である。第３
Ａ〜３Ｄ図は、本発明の多層印刷配線板における内層回
路板の製法を示した断面図である。第４Ａ〜４Ｄ図は、
本発明のマルチワイヤ配線板における内層回路板の製法
を示した断面図である。
グランド層 ２ｉ源層
信号層
内層回路板のスルーホール
スルーホールを有する内層回路板
スルーホールのない内層回路板
プリプレグ
配線板のスルーホール
表面回路 ＩＯ金属
絶縁ワイヤ １２ 絶縁板
レジスト １４ 接着性絶縁層第
図
第
図FIG. 1 is a cross section of a multilayer printed wiring board of the present invention. Second
The figure is a cross section of a multi-wire wiring board of the present invention. Third
Figures A to 3D are cross-sectional views showing a method of manufacturing an inner layer circuit board in a multilayer printed wiring board of the present invention. Figures 4A to 4D are
FIG. 3 is a cross-sectional view showing a method of manufacturing an inner layer circuit board in a multi-wire wiring board of the present invention. Ground layer 2i source layer signal layer Through hole of inner layer circuit board Inner layer circuit board with through hole Inner layer circuit board without through hole Through hole of prepreg wiring board Surface circuit IO metal insulated wire 12 Insulating plate resist 14 Adhesive insulating layer Fig. Diagram
Claims (6)
ね合せ、加圧加熱により一体化した後、スルーホールと
表面回路層を形成した多層配線板において、内層回路板
のスルーホールに金属あるいは金属粒子と熱硬化性樹脂
の混合物あるいは無機粒子と熱硬化性樹脂の混合物が充
填されているいることを特徴とする多層配線板。1. In a multilayer wiring board in which an inner layer circuit board having through holes is stacked with a prepreg and integrated by pressure heating, through holes and a surface circuit layer are formed, metal or metal particles are heat-cured into the through holes of the inner layer circuit board. A multilayer wiring board characterized in that it is filled with a mixture of thermosetting resin or a mixture of inorganic particles and thermosetting resin.
請求第１項の多層配線板。2. 2. The multilayer wiring board according to claim 1, wherein an insulated wire is used for the signal line.
を特徴とする請求第１，２項の多層配線板。3. 3. A multilayer wiring board according to claim 1, wherein the through holes of the inner layer circuit board are filled with solder.
の混合物を充填したことを特徴とする請求第１，２項の
多層配線板。4. 3. The multilayer wiring board according to claim 1, wherein the through holes of the inner layer circuit board are filled with a mixture of copper particles and thermosetting resin.
樹脂の混合物を充填したことを特徴とする請求第１，２
項の多層配線板。5. Claims 1 and 2, characterized in that the through holes of the inner layer circuit board are filled with a mixture of glass particles and thermosetting resin.
Multilayer wiring board.
造法。 Ａ）表面に金属層を有する基板に穴あけ後スルーホール
を形成し、さらにスルーホールに金属あるいは金属粒子
と熱硬化性樹脂の混合物、あるいは無機粒子と熱硬化性
樹脂の混合物を充填する工程。 Ｂ）基板表面の金属層を化学的研磨、あるいは機械的研
磨する工程。 Ｃ）少なくとも一つの表面に回路層を形成する工程。 Ｄ）上記基板とプリプレグを交互に重ね合せ、加圧加熱
により一体化する工程。 Ｅ）スルーホールと表面回路層を形成する工程。6. A method for manufacturing a multilayer wiring board, comprising the following steps. A) A step of forming a through hole in a substrate having a metal layer on its surface after drilling, and then filling the through hole with metal or a mixture of metal particles and a thermosetting resin, or a mixture of inorganic particles and a thermosetting resin. B) A step of chemically polishing or mechanically polishing the metal layer on the surface of the substrate. C) Forming a circuit layer on at least one surface. D) A step of alternately stacking the above substrate and prepreg and integrating them by pressurizing and heating. E) Step of forming through holes and surface circuit layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13231090A JPH0427194A (en) | 1990-05-22 | 1990-05-22 | High density multilayer wiring board and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13231090A JPH0427194A (en) | 1990-05-22 | 1990-05-22 | High density multilayer wiring board and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0427194A true JPH0427194A (en) | 1992-01-30 |
Family
ID=15078325
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13231090A Pending JPH0427194A (en) | 1990-05-22 | 1990-05-22 | High density multilayer wiring board and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0427194A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000062588A1 (en) * | 1999-04-13 | 2000-10-19 | Ibiden Co., Ltd. | Multilayer printed wiring board |
| US6193910B1 (en) | 1997-11-11 | 2001-02-27 | Ngk Spark Plug Co., Ltd. | Paste for through-hole filling and printed wiring board using the same |
| US6376052B1 (en) | 1997-10-14 | 2002-04-23 | Ibiden Co., Ltd. | Multilayer printed wiring board and its production process, resin composition for filling through-hole |
-
1990
- 1990-05-22 JP JP13231090A patent/JPH0427194A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6376052B1 (en) | 1997-10-14 | 2002-04-23 | Ibiden Co., Ltd. | Multilayer printed wiring board and its production process, resin composition for filling through-hole |
| US6376049B1 (en) | 1997-10-14 | 2002-04-23 | Ibiden Co., Ltd. | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
| USRE40947E1 (en) | 1997-10-14 | 2009-10-27 | Ibiden Co., Ltd. | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
| US6193910B1 (en) | 1997-11-11 | 2001-02-27 | Ngk Spark Plug Co., Ltd. | Paste for through-hole filling and printed wiring board using the same |
| WO2000062588A1 (en) * | 1999-04-13 | 2000-10-19 | Ibiden Co., Ltd. | Multilayer printed wiring board |
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