JPH04261057A - Memory module - Google Patents
Memory moduleInfo
- Publication number
- JPH04261057A JPH04261057A JP3004819A JP481991A JPH04261057A JP H04261057 A JPH04261057 A JP H04261057A JP 3004819 A JP3004819 A JP 3004819A JP 481991 A JP481991 A JP 481991A JP H04261057 A JPH04261057 A JP H04261057A
- Authority
- JP
- Japan
- Prior art keywords
- memory module
- memory
- male
- memory modules
- female
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 6
Landscapes
- Coupling Device And Connection With Printed Circuit (AREA)
Abstract
Description
【０００１】0001
【産業上の利用分野】この発明は、複数の半導体メモリ
装置を一つにまとめたメモリモジュールに関するもので
ある。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory module in which a plurality of semiconductor memory devices are integrated into one.
【０００２】0002
【従来の技術】図３は従来のメモリモジュールを示す斜
視図であり、図において、１はメモリモジュール、２は
基板、３は半導体で形成された多数のメモリセルを有す
る半導体メモリ装置で、基板２に複数個搭載されている
。４は半導体メモリ装置３を外部と電気的に接続するた
めの端子部で、複数のクリップリード５で構成されてい
る。基板２にはプリント回路（図示せず）が形成されて
いて、これにより半導体メモリ装置３とクリップリード
５とが互いに接続されている。以上の２〜４でメモリモ
ジュール１を構成している。2. Description of the Related Art FIG. 3 is a perspective view showing a conventional memory module. In the figure, 1 is a memory module, 2 is a substrate, and 3 is a semiconductor memory device having a large number of memory cells formed of a semiconductor. Multiple units are installed in 2. Reference numeral 4 denotes a terminal portion for electrically connecting the semiconductor memory device 3 to the outside, and is composed of a plurality of clip leads 5. A printed circuit (not shown) is formed on the substrate 2, by which the semiconductor memory device 3 and the clip leads 5 are connected to each other. The above 2 to 4 constitute the memory module 1.
【０００３】図４は図３のメモリモジュール１の実装状
態を示す側面図であり、プリント回路（図示せず）が形
成されたマザーボード６に数個のメモリモジュール１の
それぞれのクリップリード４が挿入、はんだ付けされて
いる。FIG. 4 is a side view showing the mounting state of the memory module 1 of FIG. 3, in which the clip leads 4 of several memory modules 1 are inserted into the motherboard 6 on which a printed circuit (not shown) is formed. , soldered.
【０００４】上記のようにメモリモジュール１は複数の
半導体メモリ装置３を備えているので大きなメモリ容量
が得られ、また、図４のように数個のメモリモジュール
１をマザーボード６へ実装すると全体としてさらに大き
なメモリ容量が得られる。As mentioned above, since the memory module 1 is equipped with a plurality of semiconductor memory devices 3, a large memory capacity can be obtained, and when several memory modules 1 are mounted on the motherboard 6 as shown in FIG. Even larger memory capacity can be obtained.
【０００５】[0005]
【発明が解決しようとする課題】メモリモジュールが搭
載される装置の高密度化、小形化に伴ってメモリモジュ
ールが実装されるマザーボードも小形化の傾向があり、
一方、装置のメモリ容量増強のためにメモリモジュール
の増設が必要となることもある。しかしながら、従来の
メモリモジュールは上記のように構成されていてそれぞ
れ接続部を直接マザーボードへ接続するようになってい
るので高密度実装が難しく、また増設も、マザーボード
に余分なスペースを設けていない限り難しいなどの問題
点があった。[Problem to be Solved by the Invention] As devices on which memory modules are mounted become denser and smaller, motherboards on which memory modules are mounted also tend to become smaller.
On the other hand, it may be necessary to add memory modules to increase the memory capacity of the device. However, since conventional memory modules are configured as described above, and each connection part is connected directly to the motherboard, high-density mounting is difficult, and expansion is only possible unless extra space is provided on the motherboard. There were some problems, such as difficulty.
【０００６】この発明は上記のような問題点を解消する
ためになされたもので、高密度実装および増設が容易な
メモリモジュールを得ることを目的とする。The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a memory module that can be easily mounted at high density and expanded.
【０００７】[0007]
【課題を解決するための手段】この発明に係るメモリモ
ジュールは、雄コンタクトと雌コンタクトとを備えたコ
ネクタで端子部を構成し、雄コンタクトを基板の一面側
に、そして雌コンタクトを基板の多面側に配置したもの
である。[Means for Solving the Problems] A memory module according to the present invention has a terminal portion composed of a connector having male contacts and female contacts, with the male contacts on one side of the board and the female contacts on multiple sides of the board. It is placed on the side.
【０００８】[0008]
【作用】この発明におけるメモリモジュールは、複数個
を重ね合せて、隣合うメモリモジュールの一方の雄コン
タクトと他方の雌コンタクトとを互いに接続するように
して実装できる。[Operation] The memory modules of the present invention can be mounted by stacking a plurality of memory modules and connecting the male contacts of one side and the female contacts of the other side of adjacent memory modules to each other.
【０００９】[0009]
【実施例】図１はこの発明の一実施例によるメモリモジ
ュールを示す斜視図であり、図において、２，３は図３
の場合と同様であるので説明を省略する。７はメモリモ
ジュール、８は半導体メモリ装置３を外部と電気的に接
続するための端子部、９は端子部８を構成するディップ
タイプコネクタで、一端部に雄コンタクト１０を備え、
他端部には雌コンタクト１１を備えている。雄コンタク
ト１０は基板２の一面側である裏面側１２に、そして雌
コンタクト１１は基板２の他面側である表面側１３に配
置されている。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a perspective view showing a memory module according to an embodiment of the present invention.
Since this is the same as in the case of , the explanation will be omitted. 7 is a memory module; 8 is a terminal portion for electrically connecting the semiconductor memory device 3 with the outside; 9 is a dip type connector constituting the terminal portion 8, which has a male contact 10 at one end;
A female contact 11 is provided at the other end. The male contacts 10 are arranged on the back side 12, which is one side of the substrate 2, and the female contacts 11 are arranged on the front side 13, which is the other side of the substrate 2.
【００１０】図２は図１のメモリモジュール７の実装状
態を示す側面図であり、図において最も下側のメモリモ
ジュール７の雄コンタクト１０がマザーボード６に挿入
、はんだ付けされている。このメモリモジュール７の雌
コンタクト１１に次のメモリモジュール７の雄コンタク
ト１０が挿入、接続され、このような接続が順次繰り返
されて数個のメモリモジュール７が重なって実装されて
いる。FIG. 2 is a side view showing the mounting state of the memory module 7 of FIG. 1, in which the male contacts 10 of the lowest memory module 7 in the figure are inserted into the motherboard 6 and soldered. The male contact 10 of the next memory module 7 is inserted and connected to the female contact 11 of this memory module 7, and such connection is repeated one after another, so that several memory modules 7 are mounted one on top of the other.
【００１１】上記のようなメモリモジュール７において
は、例えば当初、最も下側のメモリモジュール７だけが
実装されていて、後になってメモリ容量を増強する必要
が生じたような場合、図２のようにその上へ新たにメモ
リモジュール７を重ね合せて増設することが可能である
。また、当初から図２のように数個のメモリモジュール
７を重ね合せて実装すると、実装密度が高くなる。In the memory module 7 as described above, for example, if only the lowest memory module 7 is initially installed and it becomes necessary to increase the memory capacity later, the memory module 7 as shown in FIG. It is possible to add a new memory module 7 on top of it. Furthermore, if several memory modules 7 are mounted one on top of the other as shown in FIG. 2 from the beginning, the mounting density will be increased.
【００１２】0012
【発明の効果】以上のように、この発明によれば、雄コ
ンタクトと雌コンタクトとを備えたコネクタを用い、雄
および雌コンタクトをそれぞれ基板の一面側と他面側と
に配置するように構成したので、複数個のメモリモジュ
ールを重ね合せて実装することができ、そのため、メモ
リモジュールの増設および高密度実装が容易になる。As described above, according to the present invention, a connector having male contacts and female contacts is used, and the male and female contacts are arranged on one side and the other side of the substrate, respectively. Therefore, a plurality of memory modules can be mounted one on top of the other, which facilitates the expansion of memory modules and high-density mounting.
【図１】この発明の一実施例によるメモリモジュールを
示す斜視図である。FIG. 1 is a perspective view showing a memory module according to an embodiment of the present invention.
【図２】図１のメモリモジュールの実装状態を示す側面
図である。FIG. 2 is a side view showing the mounting state of the memory module of FIG. 1;
【図３】従来のメモリモジュールを示す斜視図である。FIG. 3 is a perspective view of a conventional memory module.
【図４】図３のメモリモジュールの実装状態を示す側面
図である。FIG. 4 is a side view showing the mounting state of the memory module of FIG. 3;
２ 基板 ３ 半導体メモリ装置 ７ メモリモジュール ８ 端子部 ９ ディップタイプコネクタ １０ 雄コンタクト １１ 雌コンタクト １２ 裏面側 １３ 表面側 2 Board 3 Semiconductor memory device 7 Memory module 8 Terminal section 9 Dip type connector 10 Male contact 11 Female contact 12 Back side 13 Surface side
Claims (1)
され、これらの半導体メモリ装置を外部と接続する端子
部を備えたメモリモジュールにおいて、上記端子部を、
一端部に雄コンタクトを備えるとともに他端部に雌コン
タクトを備えたコネクタで構成し、上記雄コンタクトを
上記基板の一面側に配置するとともに上記雌コンタクト
を上記基板の他面側に配置したことを特徴とするメモリ
モジュール。1. A memory module in which a plurality of semiconductor memory devices are mounted on a substrate and is provided with a terminal portion for connecting these semiconductor memory devices to the outside, the terminal portion comprising:
The connector is configured with a male contact at one end and a female contact at the other end, and the male contact is arranged on one side of the board and the female contact is arranged on the other side of the board. Characteristic memory module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3004819A JPH04261057A (en) | 1991-01-21 | 1991-01-21 | Memory module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3004819A JPH04261057A (en) | 1991-01-21 | 1991-01-21 | Memory module |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04261057A true JPH04261057A (en) | 1992-09-17 |
Family
ID=11594335
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3004819A Pending JPH04261057A (en) | 1991-01-21 | 1991-01-21 | Memory module |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04261057A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002298939A (en) * | 2001-03-28 | 2002-10-11 | Fci Japan Kk | Connection structure for board, connection structure for memory board, and holding structure for memory board |
-
1991
- 1991-01-21 JP JP3004819A patent/JPH04261057A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002298939A (en) * | 2001-03-28 | 2002-10-11 | Fci Japan Kk | Connection structure for board, connection structure for memory board, and holding structure for memory board |
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