JPH04255433A - Battery charging circuit and semiconductor memory - Google Patents
Battery charging circuit and semiconductor memoryInfo
- Publication number
- JPH04255433A JPH04255433A JP1407591A JP1407591A JPH04255433A JP H04255433 A JPH04255433 A JP H04255433A JP 1407591 A JP1407591 A JP 1407591A JP 1407591 A JP1407591 A JP 1407591A JP H04255433 A JPH04255433 A JP H04255433A
- Authority
- JP
- Japan
- Prior art keywords
- battery
- voltage
- cpu
- charging circuit
- charging current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title description 11
- 239000013256 coordination polymer Substances 0.000 claims 1
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 2
- 230000000717 retained effect Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 1
Abstract
Description
【０００１】0001
【産業上の利用分野】本発明はバッテリ充電回路および
半導体記憶装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a battery charging circuit and a semiconductor memory device.
【０００２】0002
【従来の技術】従来の半導体記憶装置は、図３に示すよ
うに、ＳＲＡＭ１と、電源電圧を発生する電源２と、電
源を切った状態で記憶している情報を保持するために必
要な電圧をＳＲＡＭ１に供給するバッテリ６と、ＳＲＡ
Ｍ１に供給する電源電圧を電源２又はバッテリ６に切換
えるバッテリ切換器３と、電源２が入っている状態では
バッテリ６を一定の充電電流で充電するバッテリ充電回
路１１と、ホストコンピュータとのインタフェースを制
御するＣＰＵ９とを有している。2. Description of the Related Art A conventional semiconductor memory device, as shown in FIG. A battery 6 that supplies SRAM 1 with
A battery switching device 3 that switches the power supply voltage supplied to M1 to the power supply 2 or the battery 6, a battery charging circuit 11 that charges the battery 6 with a constant charging current when the power supply 2 is on, and an interface with the host computer. It has a CPU 9 for control.
【０００３】この従来の半導体記憶装置は、電源２が入
っている状態ではＣＰＵ９がＳＲＡＭ１に対してデータ
の書き込み，読み出しができ、電源２が切れている状態
ではバッテリ６の出力電圧によりＳＲＡＭ１に記憶され
ているデータが保持される。In this conventional semiconductor memory device, when the power supply 2 is on, the CPU 9 can write and read data to and from the SRAM 1, and when the power supply 2 is off, data can be stored in the SRAM 1 using the output voltage of the battery 6. data is retained.
【０００４】0004
【発明が解決しようとする課題】この従来の半導体記憶
装置では、電源が入っている状態のとき一定の充電電流
でバッテリを充電しているだけで充電電流の制御を全く
行っていないため、バッテリの残量に対する最適な充電
が行えなかった。[Problems to be Solved by the Invention] This conventional semiconductor storage device only charges the battery with a constant charging current when the power is on, and does not control the charging current at all. Optimum charging could not be performed for the remaining amount of battery.
【０００５】また、図４に一例を示すように、バッテリ
の放電電圧と放電時間との関係は温度条件に大きく依存
しおり、本例では、−４０°Ｃのような低温度下で使用
する場合、４０°Ｃの高温度下で使用する場合と比較し
て放電電圧は約０．２Ｖ／セル低く、放電可能時間が短
くなる。従来の半導体記憶装置は、温度情報については
全く考慮されていないため、温度条件により変化する放
電電圧からバッテリの残量を特定することはできないと
いう問題点があった。[0005] Furthermore, as shown in FIG. 4, the relationship between the discharge voltage and discharge time of a battery largely depends on the temperature conditions. , the discharge voltage is lower by about 0.2 V/cell than when used at a high temperature of 40° C., and the dischargeable time is shortened. Conventional semiconductor memory devices do not take temperature information into consideration at all, so there is a problem in that the remaining capacity of the battery cannot be determined from the discharge voltage that changes depending on the temperature conditions.
【０００６】本発明の目的は、バッテリの残量に対する
最適な充電が行えるバッテリ充電回路、および、このバ
ッテリ充電回路を用いた半導体記憶装置を提供すること
にある。SUMMARY OF THE INVENTION An object of the present invention is to provide a battery charging circuit that can optimally charge the remaining amount of battery, and a semiconductor storage device using this battery charging circuit.
【０００７】[0007]
【課題を解決するための手段】本発明のバッテリ充電回
路は、バッテリの電圧を計測する電圧検出器と、周囲温
度を計測する温度検出器と、前記電圧検出器により計測
されたバッテリ電圧及び前記温度検出器により計測され
た周囲温度をディジタル量に変換するＡ／Ｄ変換器と、
このＡ／Ｄ変換器からのデータに基づき前記バッテリを
充電する電流を制御する信号を出力するＣＰＵと、この
ＣＰＵからの信号に制御されて前記バッテリに可変な充
電電流を出力するバッテリ充電電流制御器とを備えてい
る。[Means for Solving the Problems] A battery charging circuit of the present invention includes a voltage detector for measuring battery voltage, a temperature detector for measuring ambient temperature, a battery voltage measured by the voltage detector, and a battery charging circuit for measuring the battery voltage. an A/D converter that converts the ambient temperature measured by the temperature detector into a digital quantity;
A CPU that outputs a signal to control the current for charging the battery based on data from the A/D converter, and a battery charging current control that outputs a variable charging current to the battery under the control of the signal from the CPU. It is equipped with a container.
【０００８】また、本発明のバッテリ充電回路は、表示
器を含み、前記ＣＰＵが前記Ａ／Ｄ変換器からのデータ
に基づき前記バッテリの放電持続時間を判断して前記表
示器に表示するように構成されていてもよい。Further, the battery charging circuit of the present invention includes a display, and the CPU determines the discharge duration of the battery based on data from the A/D converter and displays it on the display. may be configured.
【０００９】本発明の半導体記憶装置は、ＳＲＡＭと、
このＳＲＡＭに電圧供給可能な電源およびバッテリと、
このバッテリを充電する上述したバッテリ充電回路と、
前記電源が切れている状態で前記ＳＲＡＭへの電圧供給
を前記電源から前記バッテリに切り換えるバッテリ切換
器とを備えている。The semiconductor memory device of the present invention includes an SRAM,
A power source and battery capable of supplying voltage to this SRAM,
the above-mentioned battery charging circuit that charges this battery;
and a battery switcher that switches the voltage supply to the SRAM from the power source to the battery when the power source is turned off.
【００１０】0010
【実施例】次に本発明の実施例について図面を参照して
説明する。Embodiments Next, embodiments of the present invention will be described with reference to the drawings.
【００１１】図１は本発明の半導体記憶装置の第１の実
施例を示すブロック図である。図１中、破線で囲んだ部
分は本発明のバッテリ充電回路の第１の実施例を示す。FIG. 1 is a block diagram showing a first embodiment of a semiconductor memory device of the present invention. In FIG. 1, a portion surrounded by a broken line shows a first embodiment of the battery charging circuit of the present invention.
【００１２】電源２が入っている状態で、ＣＰＵ９はバ
ッテリ６の端子電圧をバッテリ電圧検出器５から、また
、周囲温度を温度検出器７から、Ａ／Ｄ変換器８を介し
て入力している。ＣＰＵ９は図４に示す周囲温度と放電
電圧の関係に基づいて、バッテリ６の残量を判断する。
また、ＣＰＵ９はバッテリ６の充電率をある一定の値に
保持させるために、バッテリ充電電流制御器４に対し、
充電電流の増減の命令を出力している。While the power supply 2 is on, the CPU 9 inputs the terminal voltage of the battery 6 from the battery voltage detector 5 and the ambient temperature from the temperature detector 7 via the A/D converter 8. There is. The CPU 9 determines the remaining capacity of the battery 6 based on the relationship between the ambient temperature and the discharge voltage shown in FIG. Further, in order to maintain the charging rate of the battery 6 at a certain constant value, the CPU 9 causes the battery charging current controller 4 to
Outputs commands to increase/decrease charging current.
【００１３】電源２が切れている状態で、バッテリ６の
放電電圧はバッテリ切換器３によりＳＲＡＭ１に供給さ
れ、ＳＲＡＭ１に記憶されている情報は保持される。When the power supply 2 is off, the discharge voltage of the battery 6 is supplied to the SRAM 1 by the battery switch 3, and the information stored in the SRAM 1 is retained.
【００１４】図２は本発明の半導体記憶装置の第２の実
施例を示すブロック図である。FIG. 2 is a block diagram showing a second embodiment of the semiconductor memory device of the present invention.
【００１５】図２中、破線で囲んだ部分は本発明のバッ
テリ充電回路の第２の実施例を示す。この実施例は、図
１に示した実施例のＣＰＵ９に表示器１０を接続して構
成されている。ＣＰＵ９は入力されたバッテリ端子電圧
及び周囲温度を図４に示す周囲温度と電圧の放電時間の
関係に基づいて処理を行い、電源２を切った後のバッテ
リ６の放電持続時間を判断し表示器１０に出力している
。In FIG. 2, a portion surrounded by a broken line shows a second embodiment of the battery charging circuit of the present invention. This embodiment is constructed by connecting a display 10 to the CPU 9 of the embodiment shown in FIG. The CPU 9 processes the input battery terminal voltage and ambient temperature based on the relationship between ambient temperature and voltage discharge time shown in FIG. 4, determines the discharge duration of the battery 6 after the power supply 2 is turned off, and displays the display It is output to 10.
【００１６】[0016]
【発明の効果】以上説明したように本発明は、バッテリ
の残量により充電電流を制御しているので、バッテリの
残量に対する最適な充電ができ、バッテリの長寿命化に
つながり、バッテリの定期交換の回数を減らすことがで
き、ＳＲＡＭに記憶されているデータの信頼性を高める
ことができる。また、必要に応じて充電電流を増加させ
ることにより、短時間でのバッテリ充電を行うようなこ
とも可能であるという効果を有する。Effects of the Invention As explained above, the present invention controls the charging current according to the remaining amount of the battery, so it is possible to optimally charge the remaining amount of the battery, which leads to a longer life of the battery. The number of exchanges can be reduced and the reliability of data stored in the SRAM can be increased. Further, by increasing the charging current as necessary, it is possible to charge the battery in a short time.
【００１７】更に、電源を切ったときからのバッテリの
電圧放電持続時間を表示するようにすれば、電源を切っ
ている時間の長い装置においては、ＳＲＡＭに記憶され
ているデータの信頼性をより高めることができるという
効果を有する。Furthermore, if the battery voltage discharge duration from the time the power is turned off is displayed, the reliability of the data stored in the SRAM can be improved in devices that are turned off for a long time. It has the effect of increasing
【図１】本発明の第１の実施例を示すブロック図である
。FIG. 1 is a block diagram showing a first embodiment of the present invention.
【図２】本発明の第２の実施例を示すブロック図である
。FIG. 2 is a block diagram showing a second embodiment of the invention.
【図３】従来の半導体記憶装置を示すブロック図である
。FIG. 3 is a block diagram showing a conventional semiconductor memory device.
【図４】温度を変化させた場合のバッテリの放電電圧と
放電時間との関係を示す図である。FIG. 4 is a diagram showing the relationship between battery discharge voltage and discharge time when the temperature is changed.
１ ＳＲＡＭ ２ 電源 ３ バッテリ切換器 ４ バッテリ充電電流制御器 ５ バッテリ電圧検出器 ６ バッテリ ７ 温度検出器 ８ Ａ／Ｄ変換器 ９ ＣＰＵ １０ 表示器 1 SRAM 2 Power supply 3 Battery switch 4 Battery charging current controller 5 Battery voltage detector 6 Battery 7 Temperature detector 8 A/D converter 9 CPU 10 Indicator
Claims (3)
と、周囲温度を計測する温度検出器と、前記電圧検出器
により計測されたバッテリ電圧及び前記温度検出器によ
り計測された周囲温度をディジタル量に変換するＡ／Ｄ
変換器と、このＡ／Ｄ変換器からのデータに基づき前記
バッテリを充電する電流を制御する信号を出力するＣＰ
Ｕと、このＣＰＵからの信号に制御されて前記バッテリ
に可変な充電電流を出力するバッテリ充電電流制御器と
を備えることを特徴とするバッテリ充電回路。1. A voltage detector that measures battery voltage, a temperature detector that measures ambient temperature, and a digital quantity that measures the battery voltage measured by the voltage detector and the ambient temperature measured by the temperature detector. A/D to convert to
a converter, and a CP that outputs a signal for controlling the current that charges the battery based on data from the A/D converter.
A battery charging circuit comprising a battery charging current controller that outputs a variable charging current to the battery under the control of a signal from the CPU.
Ｄ変換器からのデータに基づき前記バッテリの放電持続
時間を判断して前記表示器に表示することを特徴とする
請求項１記載のバッテリ充電回路。2. A display device, wherein the CPU is connected to the A/
2. The battery charging circuit according to claim 1, wherein a discharge duration of said battery is determined based on data from a D converter and displayed on said display.
可能な電源およびバッテリと、このバッテリを充電する
請求項１又は請求項２記載のバッテリ充電回路と、前記
電源が切れている状態で前記ＳＲＡＭへの電圧供給を前
記電源から前記バッテリに切り換えるバッテリ切換器と
を備えることを特徴とする半導体記憶装置。3. An SRAM, a power source and a battery that can supply voltage to the SRAM, a battery charging circuit according to claim 1 or 2 that charges the battery, and a battery charging circuit that charges the battery to the SRAM when the power is off. a battery switching device for switching voltage supply from the power supply to the battery.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1407591A JPH04255433A (en) | 1991-02-05 | 1991-02-05 | Battery charging circuit and semiconductor memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1407591A JPH04255433A (en) | 1991-02-05 | 1991-02-05 | Battery charging circuit and semiconductor memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04255433A true JPH04255433A (en) | 1992-09-10 |
Family
ID=11850989
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1407591A Pending JPH04255433A (en) | 1991-02-05 | 1991-02-05 | Battery charging circuit and semiconductor memory |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04255433A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20020080947A (en) * | 2001-04-18 | 2002-10-26 | 주식회사 이오니아 | Battery charger of mobile phone |
| KR100453883B1 (en) * | 2002-04-16 | 2004-10-26 | 삼지전자 주식회사 | charge device of battery |
| US7615969B2 (en) | 2006-07-27 | 2009-11-10 | Dell Products L.P. | Systems and methods for temperature-dependent battery charging |
-
1991
- 1991-02-05 JP JP1407591A patent/JPH04255433A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20020080947A (en) * | 2001-04-18 | 2002-10-26 | 주식회사 이오니아 | Battery charger of mobile phone |
| KR100453883B1 (en) * | 2002-04-16 | 2004-10-26 | 삼지전자 주식회사 | charge device of battery |
| US7615969B2 (en) | 2006-07-27 | 2009-11-10 | Dell Products L.P. | Systems and methods for temperature-dependent battery charging |
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