JPH04245679A - Solid-state imaging device - Google Patents
Solid-state imaging deviceInfo
- Publication number
- JPH04245679A JPH04245679A JP3011221A JP1122191A JPH04245679A JP H04245679 A JPH04245679 A JP H04245679A JP 3011221 A JP3011221 A JP 3011221A JP 1122191 A JP1122191 A JP 1122191A JP H04245679 A JPH04245679 A JP H04245679A
- Authority
- JP
- Japan
- Prior art keywords
- transfer
- shift
- channel
- imaging device
- state imaging
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000003384 imaging method Methods 0.000 title claims description 27
- 230000003287 optical effect Effects 0.000 claims abstract description 3
- 238000009825 accumulation Methods 0.000 claims description 2
- 239000000758 substrate Substances 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 230000006866 deterioration Effects 0.000 description 3
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 229910020968 MoSi2 Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
- Light Receiving Elements (AREA)
Abstract
Description
【0001】0001
【産業上の利用分野】本発明は固体撮像装置に関するも
のである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device.
【0002】0002
【従来の技術】従来の固体撮像装置の平面図を図5に示
す。この固体撮像装置は、アレイ状に配列された画素1
と、フィールドシフトゲート部2と、垂直CCDレジス
タ3と、水平CCDレジスタ4と出力回路5とを備えて
いる。フィールドシフトゲート部2は画素1に蓄積され
た信号電荷の、垂直CCDシフトレジスタ3への移送を
制御する。垂直CCDシフトレジスタ3は各画素列間に
設けられ、フィールドシフトゲート部2を介して移送さ
れた信号電荷を水平CCDレジスタ4に順次転送する。
水平CCDシフトレジスタ4は垂直CCDレジスタ3か
ら転送された信号電荷を出力回路5に順次転送する。出
力回路5は水平CCDレジスタ4からの信号電荷を外部
に出力する。2. Description of the Related Art FIG. 5 shows a plan view of a conventional solid-state imaging device. This solid-state imaging device has pixels 1 arranged in an array.
, a field shift gate section 2 , a vertical CCD register 3 , a horizontal CCD register 4 , and an output circuit 5 . The field shift gate section 2 controls the transfer of the signal charge accumulated in the pixel 1 to the vertical CCD shift register 3. A vertical CCD shift register 3 is provided between each pixel column, and sequentially transfers the signal charges transferred via the field shift gate section 2 to a horizontal CCD register 4. The horizontal CCD shift register 4 sequentially transfers the signal charges transferred from the vertical CCD register 3 to the output circuit 5. The output circuit 5 outputs the signal charge from the horizontal CCD register 4 to the outside.
【0003】図5に示す切断線A−A′で切断した固体
撮像装置の断面を図6に示す。図6において、上記固体
撮像装置は、N型半導体基板6上にpウェル領域7が形
成され、このpウェル領域7の表面付近に、表面がp+
領域によって電気的にシールドされたn+ 領域のフ
ォトダイオード8、及びn− 領域9が形成されている
。このn− 領域9は垂直CCDレジスタ3の埋込み型
の転送チャネルである。なお、素子分離はp+ 不純物
層のチャネルストップ領域10によって行う。フォトダ
イオード8と転送チャネル9との間のシフトチャネル1
2が図5のフィールドシフトゲート部2に対応している
。転送チャネル9上にはSiO2 からなる絶縁膜を介
して、転送電極11が設けられており、この転送電極1
1はフォトダイオード8の端部上まで延びている。FIG. 6 shows a cross section of the solid-state imaging device taken along the cutting line AA' shown in FIG. In FIG. 6, the solid-state imaging device has a p-well region 7 formed on an N-type semiconductor substrate 6, and near the surface of the p-well region 7, the surface is p+
A photodiode 8 in an n+ region and an n- region 9 are formed which are electrically shielded by the region. This n- region 9 is an embedded transfer channel of the vertical CCD register 3. Note that element isolation is performed by a channel stop region 10 of a p+ impurity layer. Shift channel 1 between photodiode 8 and transfer channel 9
2 corresponds to the field shift gate section 2 in FIG. A transfer electrode 11 is provided on the transfer channel 9 via an insulating film made of SiO2.
1 extends above the end of the photodiode 8.
【0004】又、転送電極11上には、絶縁膜を介して
例えばMoSi2 からなる光遮へい膜13が設けられ
ている。この光遮へい膜13は転送電極11を覆ってい
るばかりでなく、転送チャネル9への光の漏れ込みによ
るスミア成分を抑制するために、フォトダイオード8の
端部近傍まで延びて、この端部近傍も覆っている。この
光遮へい膜13上にはSiO2 からなる絶縁膜15を
介して金属、例えばAlからなる光遮へい膜14が設け
られている。なお、光遮へい膜13を形成しないで光遮
へい膜14のみを形成する場合もあるが、この場合はス
ミアの低減は困難である。A light shielding film 13 made of, for example, MoSi2 is provided on the transfer electrode 11 with an insulating film interposed therebetween. This light shielding film 13 not only covers the transfer electrode 11 but also extends to the vicinity of the end of the photodiode 8 in order to suppress smear components due to light leakage into the transfer channel 9. is also covered. A light shielding film 14 made of metal, for example Al, is provided on this light shielding film 13 with an insulating film 15 made of SiO2 interposed therebetween. Note that there are cases where only the light shielding film 14 is formed without forming the light shielding film 13, but in this case, it is difficult to reduce smear.
【0005】次に図6に示す従来の固体撮像装置の動作
を図7及び図8を参照して説明する。なお、半導体基板
6とpウェル7との間に逆バイアス電圧VOFD が印
加されている。転送電極11に印加電圧VG が印加さ
れた時に、転送チャネル9及びシフトチャネル12に形
成される電位井戸の特性を図7のグラフg1 及びg2
に各々示す。転送チャネル9は印加電圧VG が零V
でも値V5 の電位井戸が形成されるが、負電圧を大き
くしていくとやがてピンニング状態になり、電位井戸が
変調されなくなる(グラフg1 参照)。又、シフトチ
ャネル12は表面チャネルタイプのため、転送電極11
の印加電圧VG が負電圧になると電位井戸の値は零V
になるが、ショートチャネル効果が出ると印加電圧VG
が零Vでも電位井戸の値は零とならない(グラフg2
参照)。Next, the operation of the conventional solid-state imaging device shown in FIG. 6 will be explained with reference to FIGS. 7 and 8. Note that a reverse bias voltage VOFD is applied between the semiconductor substrate 6 and the p-well 7. The characteristics of the potential wells formed in the transfer channel 9 and shift channel 12 when the applied voltage VG is applied to the transfer electrode 11 are shown in graphs g1 and g2 in FIG.
are shown respectively. The transfer channel 9 has an applied voltage VG of zero V.
However, as the negative voltage is increased, a potential well with a value of V5 is formed, but eventually a pinning state occurs and the potential well is no longer modulated (see graph g1). In addition, since the shift channel 12 is a surface channel type, the transfer electrode 11
When the applied voltage VG becomes a negative voltage, the value of the potential well becomes zero V.
However, when the short channel effect occurs, the applied voltage VG
Even if is zero V, the value of the potential well does not become zero (graph g2
reference).
【0006】このような特性を有する固体撮像装置にお
いて、図6に示す切断線B−B′に沿った電位井戸のプ
ロファイルを図8に示す。図7及び図8において、符号
B1 は半導体基板領域6を、符号B2 はpウェル領
域7を、符号B3 はフォトダイオード領域8を、符号
B4 はシフトチャネル領域12を、符号B5 は転送
チャネル領域9を示している。pウェル7は図6から分
かるように零電位に設定されるが、pウェル7と半導体
基板6間及びpウェル7とフォトダイオード8間は各々
逆バイアスされているためB2 領域ではパンチスルー
状態になり、電位井戸Vβが形成された状態になってい
る。転送電極11にシフトパルスVFS(>0、図7参
照)が印加されるとシフトチャネル12の電位井戸が開
き、即ちその値がV4 になって、フォトダイオード部
8において発生した信号電荷が垂直CCDレジスタ3の
転送チャネル9に移送される(図8参照)。そして転送
電極11に転送パルスVL (<0),VM (=0)
が印加されると信号電荷は垂直CCDレジスタ3の転送
チャネル9中を転送される。FIG. 8 shows a potential well profile along the cutting line BB' shown in FIG. 6 in a solid-state imaging device having such characteristics. In FIGS. 7 and 8, B1 indicates the semiconductor substrate region 6, B2 indicates the p-well region 7, B3 indicates the photodiode region 8, B4 indicates the shift channel region 12, and B5 indicates the transfer channel region 9. It shows. As can be seen from FIG. 6, the p-well 7 is set to zero potential, but since the regions between the p-well 7 and the semiconductor substrate 6 and between the p-well 7 and the photodiode 8 are each reverse biased, a punch-through state occurs in the B2 region. Thus, a potential well Vβ is formed. When a shift pulse VFS (>0, see FIG. 7) is applied to the transfer electrode 11, the potential well of the shift channel 12 opens, that is, its value becomes V4, and the signal charge generated in the photodiode section 8 is transferred to the vertical CCD. The data is transferred to transfer channel 9 of register 3 (see FIG. 8). Then, the transfer pulse VL (<0), VM (=0) is applied to the transfer electrode 11.
When is applied, the signal charge is transferred through the transfer channel 9 of the vertical CCD register 3.
【0007】[0007]
【発明が解決しようとする課題】このような従来の固体
撮像装置において、スミアを低減するために、光遮へい
膜13は転送電極11の周囲を覆う必要があり、シフト
チャネル12の端部からフォトダイオード部8側に光遮
へい膜13の端部が寸法L2 だけ延びている(図6参
照)。これによりフォトダイオード8の受光面積が小さ
くなって感度が低下する。そして上記寸法L2 は通常
0.5〜1μm程度であり、微細化する上で障害となる
。[Problems to be Solved by the Invention] In such a conventional solid-state imaging device, in order to reduce smear, the light shielding film 13 needs to cover the periphery of the transfer electrode 11. The end of the light shielding film 13 extends by a dimension L2 toward the diode portion 8 (see FIG. 6). This reduces the light-receiving area of the photodiode 8 and lowers the sensitivity. The above-mentioned dimension L2 is usually about 0.5 to 1 μm, which is an obstacle to miniaturization.
【0008】又、シフトチャネル12の長さL1 (図
6参照)も通常1.5〜2.0μm程度となるため、や
はり微細化する上で障害となる。次に、図8の電荷井戸
プロファイルから分かるように、垂直CCDレジスタ3
によって転送できる電荷量は電位井戸の差V5 −V2
に比例する。しかし転送するためのクロックのハイレ
ベルVM が通常零Vで、ロウレベルVL がピンニン
グ電位VP 以下であるためクロックの電位振幅は増え
ず、電位振幅におのずと制限がある。特に固体撮像装置
を微細化した場合は、単位面積当りの転送電荷量は、チ
ャネル幅が2μm以下になると急激に減少するため、こ
の電位振幅の制限は大きな障害となる。Further, the length L1 (see FIG. 6) of the shift channel 12 is usually about 1.5 to 2.0 μm, which also poses an obstacle to miniaturization. Next, as can be seen from the charge well profile in FIG.
The amount of charge that can be transferred by is the difference between the potential wells V5 - V2
is proportional to. However, since the high level VM of the clock for transfer is normally zero V and the low level VL is less than the pinning potential VP, the potential amplitude of the clock does not increase, and there is a natural limit to the potential amplitude. In particular, when a solid-state imaging device is miniaturized, the amount of transferred charge per unit area decreases rapidly when the channel width becomes 2 μm or less, so this restriction on potential amplitude becomes a major obstacle.
【0009】又、シフトチャネル12において電位井戸
の開きV1 があると、フォトダイオード部8からN型
基板6に過剰電荷を捨てる、いわゆるオーバフロー動作
の際に、過剰光照射時に発生する過剰キャリアによって
表面電位が上昇し、過剰電荷が垂直CCDシフトレジス
タ3の転送チャネル9に漏れ出す現象(ブルーミング現
象)が起こる。このブルーミング現象が生じるのを抑制
するためには、N型基板6に印加する逆バイアス電圧V
OFD を大きくすることによりフォトダイオード部8
下のpウェル7の電位Vβを大きくし、ブルーミング電
位マージンVβ−V1 を確保する必要がある。pウェ
ル7の電位Vβを大きくすることはフォトダイオード部
8に蓄積できる電荷量を決める電位差Vα−Vβを小さ
くすることになり、飽和出力電圧が小さくなってしまう
。このことは固体撮像装置を微細化する上で大きな問題
となる。Furthermore, if there is an opening V1 in the potential well in the shift channel 12, during a so-called overflow operation in which excess charges are dumped from the photodiode section 8 to the N-type substrate 6, the surface is damaged by excess carriers generated during excessive light irradiation. The potential increases, and a phenomenon (blooming phenomenon) occurs in which excess charge leaks into the transfer channel 9 of the vertical CCD shift register 3. In order to suppress the occurrence of this blooming phenomenon, it is necessary to apply a reverse bias voltage V to the N-type substrate 6.
By increasing the OFD, the photodiode section 8
It is necessary to increase the potential Vβ of the lower p-well 7 to ensure a blooming potential margin Vβ-V1. Increasing the potential Vβ of the p-well 7 reduces the potential difference Vα−Vβ that determines the amount of charge that can be stored in the photodiode portion 8, resulting in a decrease in the saturated output voltage. This becomes a big problem when miniaturizing solid-state imaging devices.
【0010】又、シフトチャネル12に電位井戸の開き
V1 があると、この部分での表面において発生する暗
電流がフォトダイオード部8に流入し、暗時出力を増大
させてしまう。本発明は上記事情を考慮してなされたも
のであって、微細化を行っても、性能の低下を可及的に
防止することのできる固体撮像装置を提供することを目
的とする。Furthermore, if there is an opening V1 in the potential well in the shift channel 12, a dark current generated on the surface of this portion flows into the photodiode section 8, increasing the dark output. The present invention has been made in consideration of the above circumstances, and it is an object of the present invention to provide a solid-state imaging device that can prevent performance deterioration as much as possible even when miniaturized.
【0011】[0011]
【課題を解決するための手段】本発明の固体撮像装置は
光信号を信号電荷に変換するフォトダイオードを有する
画素部と、転送チャネル及び転送電極を有し、転送電極
に印加される転送パルスに基づいて信号電荷を転送チャ
ネル内において順次で転送する転送部と、シフトゲート
を有し、このシフトゲートに印加されるシフトパルスに
基づいて画素部の信号電荷を転送部の転送チャネルに移
送する移送部とを備え、シフトゲートは転送チャネルへ
の光の漏れ込みを防止する光遮へい膜を兼ねていること
を特徴とする。[Means for Solving the Problems] A solid-state imaging device of the present invention has a pixel portion having a photodiode that converts an optical signal into a signal charge, a transfer channel and a transfer electrode, and has a transfer pulse applied to the transfer electrode. a transfer section that sequentially transfers signal charges within a transfer channel based on the shift gate; and a transfer section that transfers signal charges in the pixel section to the transfer channel of the transfer section based on a shift pulse applied to the shift gate. The shift gate is characterized in that it also serves as a light shielding film that prevents light from leaking into the transfer channel.
【0012】0012
【作用】このように構成された本発明の固体撮像装置に
よれば、シフトゲートが光遮へい膜を兼ねている。これ
により転送電極とシフトゲートが分離されて、転送電極
に印加される転送パルスの振幅を大きくすることができ
て転送電荷量を増すことができる。又、転送電極を移送
部まで延ばして移送部を覆う必要がなくなることにより
フォトダイオードの受光面積の減少を可及的に防止する
ことができる。以上により微細化を行っても性能の低下
を可及的に防止することができる。[Operation] According to the solid-state imaging device of the present invention constructed as described above, the shift gate also serves as a light shielding film. As a result, the transfer electrode and the shift gate are separated, and the amplitude of the transfer pulse applied to the transfer electrode can be increased, thereby increasing the amount of transferred charge. Furthermore, since there is no need to extend the transfer electrode to the transfer section to cover the transfer section, it is possible to prevent the light-receiving area of the photodiode from decreasing as much as possible. As described above, even if miniaturization is performed, deterioration in performance can be prevented as much as possible.
【0013】[0013]
【実施例】本発明による固体撮像装置の一実施例の断面
を図1に示す。この実施例の固体撮像装置は、図6に示
す従来の固体撮像装置において、フィールドシフトゲー
ト部(移送部)のシフトチャネル12のシフトゲートを
転送電極11と分離し、この転送電極11への光の漏れ
込みを防止する光遮へい膜13がシフトゲートを兼ねる
ように形成したものである。こうすることにより、微細
化しても転送電極11をシフトチャネル12上まで延ば
す必要がなくなり、光遮へい膜13がフォトダイオード
8の境界近傍部分を覆わなくてもスミアを防止すること
が可能となるとともにフォトダイオード8の受光面積の
低下を防止することができ、感度が向上する。又、転送
電極11とシフトゲート13が分離されたことにより、
転送電極11に印加する転送パルスを正負のクロックパ
ルスとすることが可能となり、電位振幅を大きく取るこ
とができる。これにより転送電荷量を増すことができ微
細化する上で極めて有利である。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a cross section of an embodiment of a solid-state imaging device according to the present invention. In the solid-state imaging device of this embodiment, in the conventional solid-state imaging device shown in FIG. A light shielding film 13 for preventing leakage of light is formed so as to also serve as a shift gate. This eliminates the need to extend the transfer electrode 11 above the shift channel 12 even when miniaturized, and it becomes possible to prevent smearing even if the light shielding film 13 does not cover the portion near the boundary of the photodiode 8. It is possible to prevent the light receiving area of the photodiode 8 from decreasing, and the sensitivity is improved. Also, since the transfer electrode 11 and shift gate 13 are separated,
The transfer pulse applied to the transfer electrode 11 can be a positive or negative clock pulse, and the potential amplitude can be increased. This increases the amount of transferred charge and is extremely advantageous for miniaturization.
【0014】この実施例の固体撮像装置の転送チャネル
9及びシフトチャネル12に形成される電位井戸の特性
を図2のグラフh1 及びh2 に各々示す。この特性
グラフは従来の装置の特性グラフと同様であるが、本実
施例においては、シフトゲート13と転送電極11が分
離されているので、従来と異なりシフトゲート13に印
加されるシフトパルスのロウレベルVFSL を負電位
にとることができるとともに、転送電極11に印加され
る転送パルスのハイレベルVH を正の電位とすること
ができる。
なお、シフトパルスのハイレベルVFSH 及び転送パ
ルスのロウレベルVL は従来と同様の値とする。本実
施例において図2に示すように転送パルス及びシフトパ
ルスが印加された場合の、図1に示す切断線B−B′に
沿った電位井戸のプロファイルを図3に示す。図3にお
いて、符号B1 はN型基板領域6を、符号B2 はp
ウェル領域7を、符号B3 はフォトダイオード領域8
を、符号B4 はシフトチャネル領域12を、符号B5
は転送チャネル領域9を示している。そして、信号電
荷が転送チャネル領域を転送されているときはシフトゲ
ート13にはシフトパルスのロウレベルVFSL (<
0)が印加され、シフトチャネル12の電位井戸の開き
(図8のV1 に相当する部分)は零となる。又、転送
電極11には正及び負の転送パルスVH 及びVL が
印加されるため、電位井戸の変調分V7 −V2 を大
きく取ることができる。The characteristics of the potential wells formed in the transfer channel 9 and shift channel 12 of the solid-state imaging device of this embodiment are shown in graphs h1 and h2 of FIG. 2, respectively. This characteristic graph is similar to the characteristic graph of the conventional device, but in this embodiment, the shift gate 13 and the transfer electrode 11 are separated, so the low level of the shift pulse applied to the shift gate 13 is different from the conventional one. VFSL can be set to a negative potential, and the high level VH of the transfer pulse applied to the transfer electrode 11 can be set to a positive potential. Note that the high level VFSH of the shift pulse and the low level VL of the transfer pulse are set to the same values as in the prior art. FIG. 3 shows the profile of the potential well along the cutting line BB' shown in FIG. 1 when the transfer pulse and shift pulse are applied as shown in FIG. 2 in this embodiment. In FIG. 3, the symbol B1 indicates the N type substrate region 6, and the symbol B2 indicates the p
The well region 7 is denoted by B3, and the photodiode region 8 is denoted by B3.
, B4 indicates the shift channel region 12, and B5 indicates the shift channel region 12.
indicates the transfer channel region 9. When the signal charge is being transferred through the transfer channel region, the shift gate 13 has a low level VFSL (<
0) is applied, and the opening of the potential well of the shift channel 12 (the portion corresponding to V1 in FIG. 8) becomes zero. Further, since the positive and negative transfer pulses VH and VL are applied to the transfer electrode 11, the modulation amount V7 - V2 of the potential well can be increased.
【0015】以上述べたように本実施例においては、信
号電荷がフォトダイオード部8からシフトチャネル12
を介して転送チャネル8に移送される期間、すなわちシ
フト期間以外はシフトゲートに負電位VFSL (<0
)が印加されるため、フィールドシフトゲート長L1
を短くしてもショートチャネルが発生しにくく、微細化
に有利である。As described above, in this embodiment, signal charges are transferred from the photodiode section 8 to the shift channel 12.
During the period during which the transfer is transferred to the transfer channel 8 via
) is applied, the field shift gate length L1
Short channels are less likely to occur even if the length is shortened, which is advantageous for miniaturization.
【0016】又、フィールドシフトゲート長L1 を短
くしても、シフトチャネル12の電位井戸の開きが発生
しないため、ダイオード8下のpウェル電位はブルーミ
ング電位マージンVβだけ開けておけば良い。これによ
りフォトダイオード8に蓄積できる電荷量を決める電位
差Vα−Vβを大きくとることが可能となり、飽和出力
電圧が大きくとれて微細化に有利となる。更に、シフト
チャネル12に負電圧VFSL が印加されている時は
シフトチャネル12は蓄積状態になり、暗電流を抑制で
き、暗時出力特性が改善する。又、転送電極には正負の
2値のクロックパルスを印加すれば良く、従来の装置の
ように3値のクロックパルスが不要となって周辺回路が
容易となる。Furthermore, even if the field shift gate length L1 is shortened, the potential well of the shift channel 12 does not open, so the p-well potential under the diode 8 only needs to be opened by the blooming potential margin Vβ. This makes it possible to increase the potential difference Vα-Vβ that determines the amount of charge that can be stored in the photodiode 8, and increases the saturation output voltage, which is advantageous for miniaturization. Furthermore, when the negative voltage VFSL is applied to the shift channel 12, the shift channel 12 is in an accumulation state, so that dark current can be suppressed and the dark output characteristics are improved. Moreover, it is sufficient to apply binary clock pulses of positive and negative values to the transfer electrodes, and unlike conventional devices, three-value clock pulses are not required, which simplifies the peripheral circuitry.
【0017】なお、上記実施例の固体撮像装置において
、フォトダイオード部8をシフトゲート13とセルフア
ライ(自己整合)によって形成しても良い。又、図4に
示すように、光遮へい膜を兼ねているシフトゲート13
′は転送電極11の片側のみに形成し、反対側には電気
的に分離された光遮へい膜13″を形成し、この光遮へ
い膜13″に負電圧を印加して素子分離と兼ねても良い
。この時、図1に示す素子分離領域10は不要となる。
なおシフトゲート13′及び光遮へい膜13″に覆われ
ていない、転送電極11の部分は絶縁膜15を介して金
属からなる光遮へい膜14によって覆われる。In the solid-state imaging device of the above embodiment, the photodiode section 8 may be formed by self-alignment with the shift gate 13. In addition, as shown in FIG. 4, a shift gate 13 that also serves as a light shielding film
' is formed only on one side of the transfer electrode 11, and an electrically isolated light shielding film 13'' is formed on the other side, and a negative voltage is applied to this light shielding film 13'' to also serve as element isolation. good. At this time, the element isolation region 10 shown in FIG. 1 becomes unnecessary. Note that the portion of the transfer electrode 11 that is not covered by the shift gate 13' and the light shielding film 13'' is covered with a light shielding film 14 made of metal with an insulating film 15 interposed therebetween.
【0018】[0018]
【発明の効果】本発明によれば、微細化を行っても、性
能の低下を可及的に防止することができる。According to the present invention, even if miniaturization is performed, deterioration in performance can be prevented as much as possible.
【図1】本発明の一実施例の断面図。FIG. 1 is a sectional view of one embodiment of the present invention.
【図2】実施例の転送チャネル及びシフトチャネルに形
成される電位井戸の特性を示すグラフ。FIG. 2 is a graph showing characteristics of potential wells formed in a transfer channel and a shift channel in an example.
【図3】実施例の電位井戸のプロファイルを示すグラフ
。FIG. 3 is a graph showing a profile of a potential well in an example.
【図4】本発明の他の実施例の断面図。FIG. 4 is a cross-sectional view of another embodiment of the invention.
【図5】固体撮像装置の平面図。FIG. 5 is a plan view of the solid-state imaging device.
【図6】従来の固体撮像装置の断面図。FIG. 6 is a cross-sectional view of a conventional solid-state imaging device.
【図7】従来の固体撮像装置の転送チャネル及びシフト
チャネルに形成される電位井戸の特性を示すグラフ。FIG. 7 is a graph showing the characteristics of potential wells formed in transfer channels and shift channels of a conventional solid-state imaging device.
【図8】従来の固体撮像装置の電位井戸のプロファイル
を示すグラフ。FIG. 8 is a graph showing a potential well profile of a conventional solid-state imaging device.
6 半導体基板 7 pウェル 8 フォトダイオード 9 転送チャネル 10 素子分離領域 11 転送電極 12 シフトチャネル 13 シフトゲート及び光遮へい膜 14 光遮へい膜 15 絶縁膜 6 Semiconductor substrate 7 p-well 8 Photodiode 9 Transfer channel 10 Element isolation region 11 Transfer electrode 12 Shift channel 13 Shift gate and light shielding film 14 Light shielding film 15 Insulating film
Claims (4)
ードを有する画素部と、転送チャネル及び転送電極を有
し、前記転送電極に印加される転送パルスに基づいて前
記信号電荷を前記転送チャネル内において順次転送する
転送部と、シフトゲートを有し、このシフトゲートに印
加されるシフトパルスに基づいて前記画素部の信号電荷
を前記転送部の転送チャネルに移送する移送部とを備え
、前記シフトゲートは前記転送チャネルへの光の漏れ込
みを防止する光遮へい膜を兼ねていることを特徴とする
固体撮像装置。1. A pixel section having a photodiode that converts an optical signal into a signal charge, a transfer channel, and a transfer electrode, the signal charge being transferred into the transfer channel based on a transfer pulse applied to the transfer electrode. a transfer section that has a shift gate and that transfers the signal charge of the pixel section to a transfer channel of the transfer section based on a shift pulse applied to the shift gate; A solid-state imaging device characterized in that the gate also serves as a light shielding film that prevents light from leaking into the transfer channel.
に移送させるシフト期間以外には前記シフトゲートにシ
フトゲート下が蓄積状態になるような極性の電圧が印加
されていることを特徴とする請求項1記載の固体撮像装
置。2. A voltage having a polarity such that an area under the shift gate is in an accumulation state is applied to the shift gate except during a shift period in which signal charges in the pixel portion are transferred to the transfer channel. The solid-state imaging device according to claim 1.
加されることを特徴とする請求項1記載の固体撮像装置
。3. The solid-state imaging device according to claim 1, wherein a binary transfer pulse of positive and negative values is applied to the transfer electrode.
トゲートに対して自己整合によって形成したことを特徴
とする請求項1記載の固体撮像装置。4. The solid-state imaging device according to claim 1, wherein the photodiode in the pixel portion is formed by self-alignment with the shift gate.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3011221A JP2642519B2 (en) | 1991-01-31 | 1991-01-31 | Solid-state imaging device |
KR1019920001407A KR960003006B1 (en) | 1991-01-31 | 1992-01-30 | Solid state image pick-up device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3011221A JP2642519B2 (en) | 1991-01-31 | 1991-01-31 | Solid-state imaging device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04245679A true JPH04245679A (en) | 1992-09-02 |
JP2642519B2 JP2642519B2 (en) | 1997-08-20 |
Family
ID=11771913
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3011221A Expired - Fee Related JP2642519B2 (en) | 1991-01-31 | 1991-01-31 | Solid-state imaging device |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP2642519B2 (en) |
KR (1) | KR960003006B1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5654565A (en) * | 1994-06-30 | 1997-08-05 | Nec Corporation | Charge coupled device with filling film and method of manufacture thereof |
JP2005109021A (en) * | 2003-09-29 | 2005-04-21 | Sony Corp | Solid state imaging device |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56161580A (en) * | 1980-05-15 | 1981-12-11 | Ricoh Co Ltd | Electrophotographic copier |
JPS59172763A (en) * | 1983-03-22 | 1984-09-29 | Toshiba Corp | Manufacture of solid-state image pickup device |
JPS6065565A (en) * | 1983-09-20 | 1985-04-15 | Toshiba Corp | Solid-state image sensor |
JPS61198774A (en) * | 1985-02-28 | 1986-09-03 | Matsushita Electric Ind Co Ltd | Solid state image pick-up device and manufacture thereof |
-
1991
- 1991-01-31 JP JP3011221A patent/JP2642519B2/en not_active Expired - Fee Related
-
1992
- 1992-01-30 KR KR1019920001407A patent/KR960003006B1/en not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56161580A (en) * | 1980-05-15 | 1981-12-11 | Ricoh Co Ltd | Electrophotographic copier |
JPS59172763A (en) * | 1983-03-22 | 1984-09-29 | Toshiba Corp | Manufacture of solid-state image pickup device |
JPS6065565A (en) * | 1983-09-20 | 1985-04-15 | Toshiba Corp | Solid-state image sensor |
JPS61198774A (en) * | 1985-02-28 | 1986-09-03 | Matsushita Electric Ind Co Ltd | Solid state image pick-up device and manufacture thereof |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5654565A (en) * | 1994-06-30 | 1997-08-05 | Nec Corporation | Charge coupled device with filling film and method of manufacture thereof |
JP2005109021A (en) * | 2003-09-29 | 2005-04-21 | Sony Corp | Solid state imaging device |
Also Published As
Publication number | Publication date |
---|---|
KR920015589A (en) | 1992-08-27 |
JP2642519B2 (en) | 1997-08-20 |
KR960003006B1 (en) | 1996-03-02 |
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