JPH04206930A - Chuck for polishing semiconductor wafer - Google Patents

Chuck for polishing semiconductor wafer

Info

Publication number
JPH04206930A
JPH04206930A JP2338570A JP33857090A JPH04206930A JP H04206930 A JPH04206930 A JP H04206930A JP 2338570 A JP2338570 A JP 2338570A JP 33857090 A JP33857090 A JP 33857090A JP H04206930 A JPH04206930 A JP H04206930A
Authority
JP
Japan
Prior art keywords
wafer
polishing
chuck
suction
wafer chuck
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2338570A
Other languages
Japanese (ja)
Other versions
JP2588060B2 (en
Inventor
Kiyoto Nakajima
中島 清人
Masato Sakai
正人 坂井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KYUSHU ELECTRON METAL CO Ltd
Osaka Titanium Co Ltd
Original Assignee
KYUSHU ELECTRON METAL CO Ltd
Osaka Titanium Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KYUSHU ELECTRON METAL CO Ltd, Osaka Titanium Co Ltd filed Critical KYUSHU ELECTRON METAL CO Ltd
Priority to JP33857090A priority Critical patent/JP2588060B2/en
Publication of JPH04206930A publication Critical patent/JPH04206930A/en
Application granted granted Critical
Publication of JP2588060B2 publication Critical patent/JP2588060B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)

Abstract

PURPOSE:To prevent uneven polishing or flaws from appearing on a substrate to be polished, such as a wafer, and to increase the accuracy of the degree of local flatness of the substrate surface by using acrylic for a wafer chuck and by making the thickness of the wafer chuck thick and by specifying the diameter of a suction hole. CONSTITUTION:A wafer chuck 1 is made of acrylic material. On the surface of the wafer chuck 1, 0.5mm-wide spiral grooves for suction are formed. And, vacuum paths 3 to be connected to the spiral grooves for suction 2 are located in the specified pattern and are connected to a vacuum path 5 installed at the side of a rotary holder for polishing 4. The thickness of the acrylic material of the wafer chuck 1 is 3-50mm. When the thickness of the acrylic material is less than 3mm, the specified microroughness accuracy cannot be obtained. When the thickness of the acrylic material is more than 50mm, processing or adjustment of the wafer chuck 1 is hard to do. By making the diameter of the suction hole 3a the same as the width of the spiral groove for suction 2 or smaller, the surface pressure due to suction pressure can be held down for holding the local deformation below the devil mirror level.

Description

【発明の詳細な説明】 産業上の利用分野 この発明は、半導体集積回路、特に超LSI等に供する
半導体ウェーハを高精度に研磨する研磨装置用のウェー
ハチャックの改良に係り、ウェーハを真空吸着するだめ
の所要厚みの特定樹脂製のウェーハチャック部を設け、
吸着面に螺旋溝を設けかつ溝底に溝幅以下の開口径を有
するバキューム路への連通口を配設し、ウェーハに疵等
の欠陥を発生さぜず、さらに基板表面の極部的平坦度を
著しく向上させる半導体ウェーハの研磨用チA・ツクに
関する。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention relates to the improvement of a wafer chuck for a polishing device for highly accurate polishing of semiconductor wafers for use in semiconductor integrated circuits, particularly VLSIs, etc., which vacuum-chucks the wafers. A wafer chuck part made of a specific resin with the required thickness is installed.
A spiral groove is provided on the suction surface, and a communication port to the vacuum path with an opening diameter smaller than the groove width is provided at the bottom of the groove, which prevents defects such as scratches on the wafer and further improves the extremely flat surface of the substrate. This invention relates to a chip for polishing semiconductor wafers that significantly improves polishing performance.

従来の技術 超LSI等に供する半導体・ウェーハは高精度の平坦度
を要求され、該平坦度を得るための研磨方法として、ダ
イヤモンド砥粒による研磨や微細な砥粒を含む液中でポ
リラシャ−と相対させて回転さぜるメカノケミカル研磨
が実施され、この研磨の際のウェーハ保持構造が重要視
され、種々の被研磨基板の保持構造が提案されている。
Conventional technology Semiconductors and wafers used in VLSI etc. are required to have highly accurate flatness, and the polishing methods used to achieve this flatness include polishing with diamond abrasive grains and polishing with polyrasher in a liquid containing fine abrasive grains. Mechanochemical polishing in which wafers are rotated while facing each other has been carried out, and the structure for holding the wafer during this polishing is considered important, and various structures for holding the substrate to be polished have been proposed.

例えば、フレックス法として、特開平1−210259
号、特開平1−289657号が提案されているが、フ
レックス法は基板表面を基準にして平坦度を測定した場
合は、高精度の平坦度を得ることができるが、研磨時点
で基板がフレノギシブルに研磨定盤に倣うため、研摩前
の厚みバラツキ(平行度)の影響が研摩後にも引継がれ
、ウェーハ厚みハラツギ(Total Th1ckne
ss Variation;TTV)が良くないとされ
ている。
For example, as a flex method, JP-A-1-210259
No. 1-289657 proposes that the flex method can obtain highly accurate flatness when measuring the flatness based on the substrate surface, but the flex method can obtain highly accurate flatness when the substrate is flexibly formed at the time of polishing. Because it imitates the polishing surface plate, the influence of the thickness variation (parallelism) before polishing is inherited after polishing, and the wafer thickness variation (Total Thickne
ss Variation (TTV) is said to be bad.

また、特開平1−193171号、特開平1−2165
40号などに提案されているワックス法は、ウェーハを
平坦な貼付は定盤にワックスで貼付け、研磨定盤に押付
は研磨する方法であるが、ウェーハを貼イ」ける際に貼
付は定盤と基板間のワックスに空気が取込まれ、エアー
ポケットを形成する問題がある。
Also, JP-A No. 1-193171, JP-A No. 1-2165
In the wax method proposed in No. 40, etc., wafers are pasted flat on a surface plate with wax, and pressed on a polishing surface plate for polishing. There is a problem in that air is trapped in the wax between the substrate and the substrate, forming air pockets.

発明が解決しようとする課題 研磨時には、このエアーポケットによりウェーハが局部
的に弾性変形を起こし、結果的にその部分にエクボ状の
クボミを生じるという欠点がある。かかる問題点に鑑み
、例えば、特開昭64−2858号、特開昭64−45
567号などに提案されている機械的精度の高い真空吸
着による被研磨基板の保持が用いられるようになった。
Problems to be Solved by the Invention During polishing, the air pocket causes local elastic deformation of the wafer, resulting in the formation of bulges in that area. In view of such problems, for example, Japanese Patent Application Laid-Open No. 64-2858, Japanese Patent Application Laid-Open No. 64-45
Holding of the substrate to be polished by vacuum suction with high mechanical precision, as proposed in No. 567, has come to be used.

ところが、この方法によれば前述のエアーポケットに伴
うくぼみの問題は解決されたが、基板を保持し接触する
ウェーハチへ・ツクの材質等により基板の裏面に疵をつ
ける新たな問題が発生した。
However, although this method solved the problem of the dents caused by the air pockets mentioned above, a new problem occurred: scratches on the back side of the substrate due to the material of the wafer cutter that holds and contacts the substrate.

さらに、要求される研磨精度が著しく高くなると、ウェ
ーハの極部的平坦度(マイクロラフイ、ス)の精度が新
たに問題視されてきた。
Furthermore, as the required polishing accuracy becomes significantly higher, the accuracy of the micro-roughness of the wafer has become a new problem.

この発明は、真空吸着による被研磨基板保持を行うに際
し、ウェーハ等の被研磨基板に研磨むらや疵等の欠陥を
発生させず、さらに新たに問題r見されている基板表面
の極部的平坦度の精度を向上させることができる構成か
らなるウェーハチャックの提供を目的としている。
When holding a substrate to be polished by vacuum suction, this invention prevents defects such as polishing unevenness and scratches on the substrate to be polished such as a wafer, and also prevents the occurrence of defects such as uneven polishing and scratches on the substrate to be polished, which is a new problem. The object of the present invention is to provide a wafer chuck having a configuration that can improve the accuracy of the wafer.

課題を解決するだめの手段 この発明は、真空吸着による被研磨基板保持機構を有す
る半導体ウェーハの研磨装置において、ウェーハへの研
磨むらや疵等の発生防止、極部的平坦度の向」二を目的
に、・ウェーハチャックの材質及び真空吸着機構につい
て種々検討した結果、ウェーハチャックにアクリルを用
い、その板厚みを厚くして吸着孔径を特定することによ
り、該目的を達成できることを知見しこの発明を完成し
た。
Means for Solving the Problems This invention provides a semiconductor wafer polishing apparatus having a mechanism for holding a substrate to be polished by vacuum suction, which prevents the occurrence of polishing unevenness and scratches on the wafer, and improves local flatness. As a result of various studies regarding the material of the wafer chuck and the vacuum suction mechanism, it was discovered that the purpose could be achieved by using acrylic for the wafer chuck, increasing the thickness of the plate, and specifying the suction hole diameter. completed.

この発明は、 研磨用回転ホルダー上面に、ウェーハを吸着支持するた
めのウェーハチャックを着設し、かつウェーハチャック
及びボルダ−本体に、ウェーハを真空吸着するだめのバ
キューム路を配設した半導体ウェーハの研磨装置におい
て、 =4− アクリルからなるウェーハチャック表面に真空吸着のた
めの螺旋溝を設け、螺旋溝底に溝幅以下の開口径を有し
バキューム路へ連通ずる吸着孔を配設したことを特徴と
する半導体ウェーハの研磨用チャックである。
This invention provides a semiconductor wafer, in which a wafer chuck for suctioning and supporting the wafer is installed on the upper surface of a rotating polishing holder, and a vacuum path for vacuum suctioning the wafer is provided on the wafer chuck and the boulder body. In a polishing device, a spiral groove for vacuum suction is provided on the surface of a wafer chuck made of =4-acrylic, and a suction hole having an opening diameter smaller than the groove width and communicating with the vacuum path is provided at the bottom of the spiral groove. This is a chuck for polishing semiconductor wafers.

この発明は、上記構成において、 ・ウェーハチャックの板厚を3〜50mmとし、真空吸
着するための吸着孔口径を0.5mm以下としたことを
特徴とする半導体ウェーハの研磨用チャックである。
The present invention is a chuck for polishing semiconductor wafers having the above-mentioned configuration, characterized in that: - The thickness of the wafer chuck is 3 to 50 mm, and the suction hole diameter for vacuum suction is 0.5 mm or less.

さらにこの発明は、上記構成において、ウェーハを載置
するチャック表面形状が、研磨装置に装着後にウェーハ
を載置することなく研磨盤で直接ラッピングして形成さ
れた共ずり面であることを特徴とする半導体ウェーハの
研磨用チャックである。
Furthermore, in the above configuration, the present invention is characterized in that the surface shape of the chuck on which the wafer is placed is a coplanar surface formed by direct lapping with a polishing plate without placing the wafer on the polishing device. This is a chuck for polishing semiconductor wafers.

作  用 この発明は、被研磨基板保持材としてアクリルを使用し
たことを特徴とする。アクリルは半導体ウェーハ、特に
シリコンと較べて硬度が低いなめ、該ウェーハ基板を研
磨する際、それが直接的もしくは間接的保持にかかわら
ず、ウェーハの研磨しない方の所謂裏面の疵等の発生を
押さえることができる。
Function The present invention is characterized in that acrylic is used as the material for holding the substrate to be polished. Acrylic has lower hardness than semiconductor wafers, especially silicon, so when polishing the wafer substrate, regardless of whether it is held directly or indirectly, it prevents the occurrence of scratches on the so-called back side of the wafer that is not polished. be able to.

一方、従来の研磨用ウェーハチャックは平坦なため、研
磨中ラップ盤とチャックの間隙が小さくなり、ウェーハ
に作用する研磨液量が少なくなるためにくもりが発生し
易く、また得られる平坦度が低いという問題があった。
On the other hand, because conventional wafer chucks for polishing are flat, the gap between the lapping machine and the chuck becomes smaller during polishing, which reduces the amount of polishing liquid that acts on the wafer, which tends to cause clouding, and the resulting flatness is low. There was a problem.

そこで、研磨中にウェーハの面内に作用する力が均一に
なるように、ウェーハチャックの真空吸着面に直接、研
磨盤を接触させて、研磨液を供給しながら研磨盤とウェ
ーハチャックを相対運動させて共ずり面を形成すること
により、ウェーハが共ずり面に真空吸着保持されて研磨
中の研磨偏圧力がより均一に作用して、研磨後の平坦度
が良くなる。
Therefore, in order to make the force acting on the wafer uniform during polishing, the polishing disk is brought into direct contact with the vacuum suction surface of the wafer chuck, and the polishing disk and wafer chuck are moved relative to each other while supplying the polishing liquid. By forming a coplanar surface, the wafer is held by vacuum suction on the coplanar surface, and the uneven polishing pressure during polishing acts more uniformly, improving the flatness after polishing.

ところが、ウェーハの研磨方法にアクリルを使用した真
空吸着法を用いたことにより、研磨後の新たな問題とし
て発生したのが、マイクロラフネス評価法の一つである
魔鏡像の印象が悪くなることである。
However, by using the vacuum adsorption method using acrylic as a wafer polishing method, a new problem arose after polishing, which was that the impression of the magic mirror image, which is one of the micro-roughness evaluation methods, deteriorated. be.

真空吸着による研磨の場合、吸着による圧力は研磨圧よ
りもかなり大きな血圧となる。この吸着圧力と研磨圧と
がかかった状態では、アクリル板にかなり大きな曲げ応
力が生じ、それによってアクリル板の変形が起きる。
In the case of polishing by vacuum suction, the pressure due to suction becomes a much larger blood pressure than the polishing pressure. When this suction pressure and polishing pressure are applied, a considerably large bending stress is generated in the acrylic plate, which causes deformation of the acrylic plate.

この変形が生じた状態での半導体ウェーハの研磨では、
アクリル変形がウェーハにそのまま転写され、例えばア
クリル材をホルダーに接着用両面テープで固定した際の
接着剤のむら等の模様のある魔鏡像となる。
When polishing a semiconductor wafer with this deformation,
The deformation of the acrylic is directly transferred to the wafer, resulting in a magic mirror image with patterns such as unevenness in the adhesive when the acrylic material is fixed to a holder with double-sided adhesive tape, for example.

これは、曲げ応力によるアクリルの変形が、その材質の
ヤング率と厚みによって大きく作用されるためで、薄い
アクリルでは、魔鏡評価レベル(感度;0.01pmの
凹凸)で評価が可能なオーダーでの変形が発生するため
である。
This is because the deformation of acrylic due to bending stress is greatly affected by the Young's modulus and thickness of the material, and thin acrylic is on the order of being able to be evaluated at the magic mirror evaluation level (sensitivity: 0.01 pm unevenness). This is because deformation occurs.

そこでこの発明では、ウェーハチャックのアクリル材の
厚みをを3〜50mmとする。アクリル材の厚みが3m
m未満では所要のマイクロラフネス精度が得られず、5
0mmを超えるとその加工および修正が困難となるため
に使用不可能となる。好ましくは5mm〜20mm厚み
である。
Therefore, in this invention, the thickness of the acrylic material of the wafer chuck is set to 3 to 50 mm. The thickness of the acrylic material is 3m
If it is less than 5 m, the required micro-roughness accuracy cannot be obtained;
If it exceeds 0 mm, it becomes difficult to process and modify, making it unusable. Preferably the thickness is 5 mm to 20 mm.

また、発明者らは、吸着孔径が大きい場合も同様に、吸
着圧力による面圧が大きくなり、その歪により極部的に
真空吸着孔の影響のある魔鏡像ができ、前述した共ずり
面を形成することにより吸着孔径が拡大される傾向にあ
り、マイクロラフネス精度が低下することを知見した。
In addition, the inventors also found that when the suction hole diameter is large, the surface pressure due to the suction pressure increases, and the resulting distortion creates a magic mirror image that is affected by the vacuum suction hole in a very local area, causing the above-mentioned co-slip surface. It has been found that by forming such a material, the adsorption pore diameter tends to be enlarged, and the micro-roughness accuracy decreases.

そこで、この発明では、アクリルからなるウェーハチャ
ンク表面に真空吸着のための螺旋溝を設け、螺旋溝底に
溝幅以下の開口径を有するバキューム路への連通口を配
設して、吸着孔径を小さくすることにより、印象の良い
魔鏡像を得ることができる。すなわち所要のマイクロラ
フネス精度を得るには、螺旋溝幅が0.5mm以下であ
ることが必要である。
Therefore, in this invention, a spiral groove for vacuum suction is provided on the surface of a wafer chunk made of acrylic, and a communication port to a vacuum path having an opening diameter smaller than the groove width is provided at the bottom of the spiral groove to reduce the suction hole diameter. By making it smaller, you can get a good-looking magic mirror image. That is, in order to obtain the required micro-roughness accuracy, it is necessary that the spiral groove width be 0.5 mm or less.

この発明は、ウェーハチャックにアクリルを用いかつそ
の厚さを厚くすることにより、真空吸着による傷等の発
生を防止でき、魔鏡評価レベルよりはるかに小さい変形
で裏面の歪の影響をおさえることが可能なため、テープ
むら等の裏面の形状を転写しない魔鏡像が得られること
になる。
By using acrylic for the wafer chuck and increasing its thickness, this invention can prevent scratches caused by vacuum suction, and can suppress the effects of distortion on the back side with much smaller deformation than the magic mirror evaluation level. Since this is possible, a magic mirror image that does not transfer the shape of the back surface such as tape unevenness can be obtained.

さらに、吸着孔径を吸着用螺旋溝の溝幅以下にtJzさ
くすることにより、吸着圧力による面圧を押さえて極部
的変形を魔鏡レベルより押さえることができる。
Furthermore, by reducing the suction hole diameter to tJz less than the groove width of the suction spiral groove, it is possible to suppress surface pressure due to suction pressure and suppress local deformation to a level below that of a magic mirror.

実施例 第1図にこの発明による半導体ウェーハの研磨用ホルダ
ーとウェーハチャックを示す。
Embodiment FIG. 1 shows a holder for polishing a semiconductor wafer and a wafer chuck according to the present invention.

ここでは1枚のウェーハを真空吸着するため、ウェーハ
チャック(1)を研磨用回転ホルダー(4)に接着用の
両面粘着テープ(6)で着設する例を説明する。
Here, an example will be described in which a wafer chuck (1) is attached to a polishing rotating holder (4) using a double-sided adhesive tape (6) for adhesion in order to vacuum adsorb one wafer.

ウェーハチャック(1)をアクリル材で形成し、表面に
は0.5mm幅の吸着用螺旋溝(2)が設けられ、吸着
用螺旋溝(2)に連通ずるバキューム路(3)が所砦の
パターンで配設されて、研磨用回転ボルダ−(4)(I
llに設けられたバキューム路(5)と連通する構成か
らなる。
The wafer chuck (1) is made of acrylic material, and a 0.5 mm wide suction spiral groove (2) is provided on the surface, and a vacuum path (3) communicating with the suction spiral groove (2) is provided at the bottom of the wafer chuck (1). Polishing rotary boulders (4) (I
It consists of a structure that communicates with a vacuum path (5) provided in ll.

研磨のためウェーハをウェーハチャック(1)に固定、
離脱させる場合、ホルダー(4)側のバキューム路(5
)に接続したバキュームポンプのオン・オフのみで容易
にできる。
Fix the wafer to the wafer chuck (1) for polishing,
When detaching, use the vacuum path (5) on the holder (4) side.
) can be easily done by simply turning on and off the vacuum pump connected to the

まず、第2図に示す如く、ウェーハチャック(1)厚み
を2mmとし、吸着孔(3a)径を0.8mmに設定し
て共ずり面を形成したところ、研磨だれにより実際の孔
径が拡大しており、研磨後の魔鏡像を調べると第3図C
に示す如く、黒く点状に吸着孔の跡(IIX図では○で
表示)が多数見られ、また、裏面のテープむら(12X
図では横線で表示)が広範囲に見られた。
First, as shown in Figure 2, when the thickness of the wafer chuck (1) was set to 2 mm and the diameter of the suction hole (3a) was set to 0.8 mm to form a sliding surface, the actual hole diameter expanded due to polishing sag. If you examine the magic mirror image after polishing, you will see Figure 3C.
As shown in Figure 2, there are many black spots of suction holes (indicated by ○ in Figure IIX), and there are also tape irregularities on the back side (12X
(indicated by horizontal lines in the figure) were seen over a wide area.

次に、ウェーハチャック(1)のアクリル材の厚さを3
mmとし、吸着孔(3a)径を0.7mmに設定して共
ずり面を形成し研磨した際の魔鏡像を調べた。
Next, the thickness of the acrylic material of the wafer chuck (1) is 3
mm, and the diameter of the suction hole (3a) was set to 0.7 mm to form a co-sliding surface and the magic mirror image was examined.

その結果、アクリル材の厚さが2mmでは裏面のテープ
ムラの影響を大きく受けて像が歪んでいたが、第3図す
に示す如<3mm厚さではほぼ影響のない魔鏡像が得ら
れた。しかし、吸着孔(3a)径を0.7mmとしても
まだ吸着孔の跡(11)があり、吸着孔の影響が見られ
る。
As a result, when the thickness of the acrylic material was 2 mm, the image was distorted due to the influence of tape unevenness on the back side, but as shown in Figure 3, when the thickness was <3 mm, a magic mirror image with almost no influence was obtained. However, even if the suction hole (3a) diameter is set to 0.7 mm, there are still traces (11) of the suction hole, and the influence of the suction hole can be seen.

さらに、ウェーハチャック(1)厚みを5mmとなし、
吸着孔(3a)径を0.5mmにして、研磨した場合の
魔鏡像を調べ第3図aに示す。
Furthermore, the thickness of the wafer chuck (1) is set to 5 mm,
The magic mirror image obtained when the suction hole (3a) diameter was set to 0.5 mm and polished is shown in FIG. 3a.

第3図aに示す如く、裏面のテープむらの影響が全くで
ておらず、また、吸着孔の影響も見られないすぐれた魔
鏡像を得ることができた。
As shown in FIG. 3a, it was possible to obtain an excellent mirror image in which there was no effect of tape unevenness on the back surface and no effect of suction holes.

なお、魔鏡像と精度の関係は、精度測定器の縦分解能が
0.1〜0.3pmで、魔鏡像コントラストは0.01
μmオーダーであるため、アクリル材の厚さを厚くした
場合、魔鏡像の改善は精度的に0.01〜0.3pmに
相当する 発明の効果 この発明による半導体ウェーハの研磨用ウェーハチャッ
クは、まずアクリルを材料として使用することにより、
該ウェーハに裏[niのJnEWの発生をおさえること
ができ、また、マイクロラフネスの評価である魔鏡像に
おいて、アクリルの厚さを3mm〜50mmと厚くする
ことにより、アクリル裏面の影響がでない魔鏡像が得ら
れ、さらに、真空吸着用孔径を螺旋溝幅以下と小さくす
ることにより、吸着孔の影響のでない魔鏡像が得られ、
ウェーハに疵等の欠陥を発生させず、さらに基板表面の
極部的平坦度を著しく向上させることができる。
The relationship between the magic mirror image and accuracy is that the vertical resolution of the precision measuring device is 0.1 to 0.3 pm, and the magic mirror image contrast is 0.01.
Since the thickness is on the order of μm, when the thickness of the acrylic material is increased, the improvement in the magic mirror image is equivalent to 0.01 to 0.3 pm in terms of accuracy.Effects of the InventionThe wafer chuck for polishing semiconductor wafers according to the present invention has the following advantages: By using acrylic as a material,
The occurrence of JnEW on the back side of the wafer can be suppressed, and by increasing the thickness of the acrylic to 3 mm to 50 mm in the mirror image, which is an evaluation of micro-roughness, the influence of the acrylic back surface can be eliminated. Furthermore, by making the diameter of the vacuum suction hole smaller than the width of the spiral groove, a magic mirror image that is not affected by the suction hole can be obtained.
Defects such as scratches are not generated on the wafer, and the local flatness of the substrate surface can be significantly improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明による半導体ウェーハの研磨用ホルダ
ーの縦断説明図である。 第2図は従来の半導体ウェーハの研磨用ホルダーの縦断
説明図である。 第3図a−cはアクリル材の厚さと吸着孔の影響を見た
研磨後の魔鏡像を示す説明図である。 1・・・ウェーハチャック、2・・・吸着用螺旋溝、3
.5・・・バキューム路、3a・・・吸着孔、4・・・
ホルダー、6・・・両面粘着テープ、10・・・ウェー
ハ、11・・・跡、12・・・裏面のテープむら。
FIG. 1 is a longitudinal sectional view of a holder for polishing semiconductor wafers according to the present invention. FIG. 2 is a longitudinal cross-sectional view of a conventional semiconductor wafer polishing holder. FIGS. 3a to 3c are explanatory diagrams showing the mirror image after polishing, looking at the effects of the thickness of the acrylic material and the suction holes. 1... Wafer chuck, 2... Spiral groove for suction, 3
.. 5... Vacuum path, 3a... Adsorption hole, 4...
Holder, 6... Double-sided adhesive tape, 10... Wafer, 11... Trace, 12... Tape unevenness on back side.

Claims (1)

【特許請求の範囲】 1 研磨用回転ホルダー上面に、ウェーハを吸着支持するた
めのウェーハチャックを着設し、かつウェーハチャック
及びホルダー本体に、ウェーハを真空吸着するためのバ
キューム路を配設した半導体ウェーハの研磨装置におい
て、 アクリルからなるウェーハチャック表面に真空吸着のた
めの螺旋溝を設け、螺旋溝底に溝幅以下の開口径を有し
バキューム路へ連通する吸着孔を配設したことを特徴と
する半導体ウェーハの研磨用チャック。 2 ウェーハチャックの板厚を3〜50mmとし、真空吸着
するための吸着孔口径を0.5mm以下としたことを特
徴とする請求項1記載の半導体ウェーハの研磨用チャッ
ク。 3 ウェーハを載置するチャック表面形状が、研磨装置に装
着後にウェーハを載置することなく研磨盤で直接ラッピ
ングして形成された共ずり面であることを特徴とする請
求項1又は請求項2記載の半導体ウェーハの研磨用チャ
ック。
[Scope of Claims] 1. A semiconductor in which a wafer chuck for suctioning and supporting a wafer is installed on the upper surface of a polishing rotating holder, and a vacuum path for vacuum suctioning the wafer is provided in the wafer chuck and the holder body. A wafer polishing device characterized by having a spiral groove for vacuum suction on the surface of a wafer chuck made of acrylic, and a suction hole having an opening diameter less than the groove width and communicating with the vacuum path at the bottom of the spiral groove. A chuck for polishing semiconductor wafers. 2. The semiconductor wafer polishing chuck according to claim 1, wherein the wafer chuck has a plate thickness of 3 to 50 mm and a suction hole diameter for vacuum suction of 0.5 mm or less. 3. Claim 1 or Claim 2, wherein the surface shape of the chuck on which the wafer is placed is a coplanar surface formed by direct lapping with a polishing plate without placing the wafer on the polishing device. A chuck for polishing semiconductor wafers as described above.
JP33857090A 1990-11-30 1990-11-30 Polishing chuck for semiconductor wafer Expired - Lifetime JP2588060B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33857090A JP2588060B2 (en) 1990-11-30 1990-11-30 Polishing chuck for semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33857090A JP2588060B2 (en) 1990-11-30 1990-11-30 Polishing chuck for semiconductor wafer

Publications (2)

Publication Number Publication Date
JPH04206930A true JPH04206930A (en) 1992-07-28
JP2588060B2 JP2588060B2 (en) 1997-03-05

Family

ID=18319419

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33857090A Expired - Lifetime JP2588060B2 (en) 1990-11-30 1990-11-30 Polishing chuck for semiconductor wafer

Country Status (1)

Country Link
JP (1) JP2588060B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6726538B2 (en) 2000-04-07 2004-04-27 Tokyo Electron Limited Sample polishing apparatus and sample polishing method
US7355420B2 (en) 2001-08-21 2008-04-08 Cascade Microtech, Inc. Membrane probing system
US7420381B2 (en) 2004-09-13 2008-09-02 Cascade Microtech, Inc. Double sided probing structures
US7492172B2 (en) 2003-05-23 2009-02-17 Cascade Microtech, Inc. Chuck for holding a device under test
US9429638B2 (en) 2008-11-21 2016-08-30 Cascade Microtech, Inc. Method of replacing an existing contact of a wafer probing assembly

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6726538B2 (en) 2000-04-07 2004-04-27 Tokyo Electron Limited Sample polishing apparatus and sample polishing method
US7355420B2 (en) 2001-08-21 2008-04-08 Cascade Microtech, Inc. Membrane probing system
US7492175B2 (en) 2001-08-21 2009-02-17 Cascade Microtech, Inc. Membrane probing system
US7492172B2 (en) 2003-05-23 2009-02-17 Cascade Microtech, Inc. Chuck for holding a device under test
US7876115B2 (en) 2003-05-23 2011-01-25 Cascade Microtech, Inc. Chuck for holding a device under test
US7420381B2 (en) 2004-09-13 2008-09-02 Cascade Microtech, Inc. Double sided probing structures
US8013623B2 (en) 2004-09-13 2011-09-06 Cascade Microtech, Inc. Double sided probing structures
US9429638B2 (en) 2008-11-21 2016-08-30 Cascade Microtech, Inc. Method of replacing an existing contact of a wafer probing assembly
US10267848B2 (en) 2008-11-21 2019-04-23 Formfactor Beaverton, Inc. Method of electrically contacting a bond pad of a device under test with a probe

Also Published As

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