JPH04204628A - Liquid crystal display device - Google Patents
Liquid crystal display deviceInfo
- Publication number
- JPH04204628A JPH04204628A JP33638390A JP33638390A JPH04204628A JP H04204628 A JPH04204628 A JP H04204628A JP 33638390 A JP33638390 A JP 33638390A JP 33638390 A JP33638390 A JP 33638390A JP H04204628 A JPH04204628 A JP H04204628A
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- line
- display
- writing
- display data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 80
- 230000004044 response Effects 0.000 claims abstract description 13
- 230000008859 change Effects 0.000 claims description 23
- 238000002834 transmittance Methods 0.000 abstract description 7
- 230000007704 transition Effects 0.000 abstract description 3
- 210000004027 cell Anatomy 0.000 description 27
- 238000010586 diagram Methods 0.000 description 12
- 239000011159 matrix material Substances 0.000 description 11
- 210000002858 crystal cell Anatomy 0.000 description 4
- 230000001186 cumulative effect Effects 0.000 description 4
- 238000000149 argon plasma sintering Methods 0.000 description 3
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 239000004988 Nematic liquid crystal Substances 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000009028 cell transition Effects 0.000 description 1
- 230000003098 cholesteric effect Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔概要〕
相転移型液晶パネルを駆動する液晶表示装置に関し、
動画や中間調を表示することを目的とし、複数の相転移
型液晶か夫々画素セルとして規則的に配列された液晶デ
ィスプレイパネルにより表示を行なう液晶表示装置にお
いて、前記複数の相転移型液晶のうち、表示データの書
込みラインに対して該液晶か透明状態から散乱状態に到
る応答時間以上の時間先行するライン上の各液晶に対し
て夫々散乱状態とする初期化を行なう初期化手段と、該
初期化手段により既に初期化されている表示データの書
込みラインの各液晶に対して表示階調に応じたレベルの
駆動電圧を印加して書込みを行なった後保持する書込み
及び保持手段とを有するように構成する。[Detailed Description of the Invention] [Summary] Regarding a liquid crystal display device that drives a phase change type liquid crystal panel, for the purpose of displaying moving images and halftones, a plurality of phase change type liquid crystals are arranged regularly as pixel cells. In a liquid crystal display device that performs display using a liquid crystal display panel, one of the plurality of phase change liquid crystals precedes a writing line of display data by a time equal to or longer than a response time for the liquid crystal to change from a transparent state to a scattering state. an initialization means for initializing each liquid crystal on the line to a scattering state, and an initialization means for initializing each liquid crystal on the line for writing display data, which has already been initialized by the initialization means, according to the display gradation. It is configured to have a write and hold means for applying a drive voltage of a certain level to perform writing and then holding the data.
本発明は液晶表示装置に係り、特に相転移型液晶パネル
を駆動する液晶表示装置に関する。The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device that drives a phase change type liquid crystal panel.
相転移型液晶表示装置はコレステリック相の光散乱状態
とネマティック相の光透過状態の二つの状態をもって表
示を行なう。その駆動方法はツイストネマティック型液
晶のような累積応答を利用したリフレッシュ駆動方式と
異なり、画面内の全セルを一斉に初期化した後に線順次
に書込みを行ない、ｌフレーム分の選択走査で書込みを
完了する。その後、全セル共通に維持電圧を印加するこ
とにより、前記二つの表示状態を保持し、表示を行なう
。そのため、相転移型液晶表示装置は表示ライン数か増
えてもコントラストの低下かない大容量表示か可能であ
り、また光散乱を利用しているため、他の液晶と異なり
偏光板かなくても表示か見えるという特徴がある。A phase change type liquid crystal display device performs display in two states: a cholesteric phase, which is a light scattering state, and a nematic phase, which is a light transmitting state. The driving method is different from the refresh driving method that uses cumulative response such as twisted nematic liquid crystal, in which all cells in the screen are initialized at the same time, and then writing is performed line-sequentially, and writing is performed by selective scanning for l frames. Complete. Thereafter, by applying a sustain voltage to all cells, the two display states are maintained and display is performed. Therefore, phase change type liquid crystal display devices are capable of large-capacity display without decreasing contrast even when the number of display lines increases, and because they utilize light scattering, they can display images without a polarizing plate, unlike other liquid crystals. It has the characteristic of being visible.
このため、この相転移型液晶を用いたドツトマトリクス
型液晶デイスプレィ（ＬＣＤ）などの液晶表示装置では
、光源の光利用率か極めて高く明るい表示か可能なため
に、投写型ＬＣＤとして実用化されている。For this reason, liquid crystal display devices such as dot matrix liquid crystal displays (LCDs) using this phase change type liquid crystal have been put into practical use as projection type LCDs because the light utilization rate of the light source is extremely high and bright display is possible. There is.
かかる相転移型液晶表示装置では、一画面の書込みに長
時間を要するため、動画表示が困難であり、動画表示が
望まれている。In such a phase change type liquid crystal display device, since it takes a long time to write one screen, it is difficult to display a moving image, and therefore a moving image display is desired.
第６図は従来の液晶表示装置の一例の構成図を示す。同
図中、ｌは単純マトリクス液晶パネルで、相転移型液晶
セルかマトリクス状（水平方向にＹ１〜Ｙｆｉｌ 垂直
方向にＸ、〜Ｘ、）に配列表示されている。また、２は
走査ドライバ、３はデータドライバで、夫々水平方向（
ライン方向）、垂直方向の各液晶セルを駆動する。４は
制御回路で、走査ドライバ２及びデータドライバ３を夫
々制御し、液晶パネルＩに所望の画像を表示させる。FIG. 6 shows a configuration diagram of an example of a conventional liquid crystal display device. In the figure, 1 is a simple matrix liquid crystal panel, and phase change type liquid crystal cells are arranged and displayed in a matrix (Y1 to Yfil in the horizontal direction and X, to X in the vertical direction). In addition, 2 is a scan driver, and 3 is a data driver, which are used in the horizontal direction (
drive each liquid crystal cell in the line direction) and vertical direction. A control circuit 4 controls the scan driver 2 and data driver 3, respectively, and causes the liquid crystal panel I to display a desired image.
次に、この液晶パネル１を構成する複数の相転移型液晶
セルの動作について説明する。まず、初期化か行なわれ
る。すなわち、この初期化は画面内のセルのすべてに共
通に第７図に示す如く波高値２Ｖｄ（たたし、Ｖｄはヒ
ステリシスの中心電圧）で例えば周期４ｍｓのパルスを
ｌＯ周期繰り返し印加し、第８図にＨて示す如き透明状
態とする。Next, the operation of the plurality of phase change type liquid crystal cells constituting this liquid crystal panel 1 will be explained. First, initialization is performed. That is, this initialization is performed by repeatedly applying a pulse with a period of, for example, 4 ms at a peak value of 2 Vd (where Vd is the center voltage of hysteresis) in 10 cycles as shown in FIG. The transparent state is shown as H in Fig. 8.
次に書込み動作を行なう。この書込みは黒を書込むセル
にはＯＶを印加し、第８図にＦ。で示す如く白濁化した
状態とし、白を書込むセルについては波高値２Ｖｄのパ
ルスを印加して前の透明状態を保持する。これを全走査
ラインに繰り返し、書込みを完了する。書込み時間は液
晶の相転移時間（Ｈ−Ｆ、）で決まる。なお、選択後液
晶セルは第７図に示す如＜Ｖｄか非選択電圧として印加
されるため、白濁化したセルは第８図にＦて示す状態に
遷移しており、また透明セルは第８図にＨ″で示す状態
に遷移している。Next, a write operation is performed. For this writing, OV is applied to the cell in which black is to be written, and F is shown in FIG. The cell is brought into a cloudy state as shown in FIG. 2, and a pulse with a peak value of 2 Vd is applied to the cell where white is to be written to maintain the previous transparent state. This is repeated for all scan lines to complete writing. The writing time is determined by the phase transition time (H-F,) of the liquid crystal. After selection, a non-selection voltage of <Vd is applied to the liquid crystal cell as shown in FIG. 7, so the cloudy cell transitions to the state shown by F in FIG. The state has transitioned to the state indicated by H'' in the figure.
次にメモリ駆動が行なわれる。これは第７図に示すよう
に、すべてのセルに走査ドライバ２がらＶｄを印加し、
表示を維持する。Next, memory driving is performed. As shown in FIG. 7, this is done by applying Vd to all cells from the scan driver 2,
Keep visible.
このように、従来の液晶表示装置では、第９図に示す如
く、初期化ａ、書込みす、及びメモリ駆動Ｃの状態を繰
り返し、一画面の表示を行なっている。In this manner, in the conventional liquid crystal display device, as shown in FIG. 9, the states of initialization a, writing, and memory drive C are repeated to display one screen.
しかるに、上記の従来の液晶表示装置では、書込み時間
としてライン当り数ｍｓの時間が必要であるため、４０
０ライン程度の画面を表示しようとすると、１秒以上の
時間がかかり、そのため動きの早い動画像の表示か不可
能であった。また、従来装置ではヒステリシス特性を利
用したメモリ駆動を行なっているので、中間調を表示す
ることもできなかった。However, in the above-mentioned conventional liquid crystal display device, a writing time of several ms per line is required, so the writing time is 40 ms.
When attempting to display a screen with approximately 0 lines, it takes more than one second, making it impossible to display fast-moving moving images. Furthermore, since the conventional device performs memory drive using hysteresis characteristics, it is not possible to display halftones.
本発明は以上の点に鑑みなされたもので、動画や中間調
を表示し得る液晶表示装置を提供することを目的とする
。The present invention has been made in view of the above points, and an object of the present invention is to provide a liquid crystal display device capable of displaying moving images and halftones.
第１図は本発明の原理構成図を示す。同図中、１１は複
数の相転移型液晶が夫々画素セルとして規則的に配列さ
れた液晶ディスプレイパネルである。１２は初期化手段
で、書込みラインに対して上記液晶が透明状態から散乱
状態に到る応答時間以上の時間先行するライン上の各液
晶に対して夫々散乱状態とする初期化を行なう。Ｉ３は
書込み及び保持手段で、既に初期化されている表示デー
タの書込みラインの各液晶に対して表示階調に応じたレ
ベルの駆動電圧を印加して書込みを行なった後保持する
。FIG. 1 shows a basic configuration diagram of the present invention. In the figure, reference numeral 11 denotes a liquid crystal display panel in which a plurality of phase change liquid crystals are regularly arranged as pixel cells. Reference numeral 12 denotes an initializing means which initializes each liquid crystal on a line preceding the writing line by a time equal to or longer than the response time for the liquid crystal to change from a transparent state to a scattering state to a scattering state. Reference numeral I3 denotes a write and hold means which applies a drive voltage at a level corresponding to the display gradation to each liquid crystal in the write line of display data that has already been initialized, performs writing, and then holds the data.
相転移型液晶は一般に、電圧−透過率特性かヒステリシ
ス特性を有し、第２図に■で示す如くその印加電圧（セ
ル電圧）か光の散乱状態とする印加電圧ｖ０から増加さ
せていくときの透過率の変化は累積応答で、十数ｍｓか
ら数十ｍｓの応答時間必要とする。これに対し、２Ｖｄ
等、相転移型液晶を十分に透明状態とする印加電圧（セ
ル電圧）から電圧を下降させていき液晶を散乱状態とす
るＶｏに到るときの透過率は第２図に■で示す如く瞬時
値応答で、数ｍｓの極めて短い応答時間で変化する。Phase change type liquid crystals generally have voltage-transmittance characteristics or hysteresis characteristics, and as shown by ■ in Figure 2, when the applied voltage (cell voltage) is increased from v0 to bring about the light scattering state. The change in transmittance is a cumulative response and requires a response time of several tens of milliseconds to several tens of milliseconds. On the other hand, 2Vd
etc., when the voltage is lowered from the applied voltage (cell voltage) that makes the phase change liquid crystal sufficiently transparent, and it reaches Vo, which makes the liquid crystal a scattering state, the transmittance is instantaneous as shown by ■ in Figure 2. It is a value response and changes in an extremely short response time of several ms.
本発明はかかる電圧−透過率特性のヒステリシス特性に
着目し、前記初期化手段Ｉ２により上記瞬時値応答時間
相当分の走査ライン数分だけ、表示データ書込みライン
に先行して、液晶を散乱状態、すなわち黒にする初期化
を１ラインずつ移動させて行ない、前記書込みが保持手
段１３により充分初期化のできたラインから表示データ
を累積応答による特性を用いて順次書込んだ後保持する
。The present invention focuses on the hysteresis characteristic of the voltage-transmittance characteristic, and the initializing means I2 sets the liquid crystal in a scattering state by the number of scanning lines corresponding to the instantaneous value response time, prior to the display data writing line. That is, the initialization to black is performed by moving one line at a time, and the display data is sequentially written by the holding means 13 from the line that has been sufficiently initialized using the characteristics based on the cumulative response, and then held.
従って、本発明では１ラインずつ表示データの書込みが
できると共に、書込まれる表示データは電圧−透過率特
性の任意の位置のデータとすることができる。Therefore, in the present invention, display data can be written line by line, and the written display data can be data at any position in the voltage-transmittance characteristic.
第３図は本発明の一実施例の構成図を示す。同図中、２
１はアクティブマトリクス液晶パネル（第１図の液晶デ
ィスプレイパネル１１に相当）で、相転移型液晶が画素
セルとして垂直方向にｎ個、水平方向にｍ個、マトリク
ス状に配列されており、かつ、上記相転移型液晶（画素
セル）の各々はスイッチングトランジスタとしての薄膜
トランジスタ（Ｔ Ｆ Ｔ ： Ｔｈ１ｎ Ｆｉｌｍ
Ｔｒａｎｓｉｓｔｅｒ）２３のソースに接続されている
。第３図中、２２ｊノは上記マトリクス状に配列された
複数の画素セルのうち１行１列の画素セル、２３」ｌは
この画素セル２３ｊＡに接続されたＴＰＴ２３を示す。FIG. 3 shows a configuration diagram of an embodiment of the present invention. In the same figure, 2
Reference numeral 1 denotes an active matrix liquid crystal panel (corresponding to the liquid crystal display panel 11 in FIG. 1), in which phase change type liquid crystals are arranged in a matrix as pixel cells, n pieces in the vertical direction and m pieces in the horizontal direction; Each of the above phase change liquid crystals (pixel cells) is a thin film transistor (TFT: Th1n Film) as a switching transistor.
Transistor) 23 source. In FIG. 3, 22j indicates a pixel cell in the 1st row and 1st column among the plurality of pixel cells arranged in the matrix, and 23''l indicates the TPT 23 connected to this pixel cell 23jA.
制御信号発生回路２４は、垂直同期信号Ｖｓと第４図（
Ａ）に示す水平同期信号Ｈｓとが入力され、これらに同
期した第４図（Ｂ）に示す如き制御信号Ｃｄｉを発生す
る。この制御信号Ｃｄｉは一水平走査期ｒ／！ＩＰｊＩ
期の方形波で、ハイレベルの期間は表示データ期間とし
、ローレベルの期間は初期化データ期間とする。The control signal generating circuit 24 generates a vertical synchronizing signal Vs and a vertical synchronizing signal Vs as shown in FIG.
A horizontal synchronizing signal Hs shown in A) is input, and a control signal Cdi as shown in FIG. 4B is generated in synchronization with these signals. This control signal Cdi is generated during one horizontal scanning period r/! IPjI
The high level period is a display data period, and the low level period is an initialization data period.
データドライバ２５はアクティブマトリクス液晶パネル
２１に表示データ又は初期化電圧を印加する回路で、制
御端子Ｉｄに入力される上記制御信号Ｃｄｉに応じて切
換わるｍ個のスイッチ２５」（第３図の２５１１は１番
目のスイッチ２５１を示す）と、ｍ個の出力アンプ２５
２（第３図の２５２１は１番目の出力アンプ２５２を示
す）とを有している。ｍ個の出力アンプ２５２の出力端
はＤｌ等のデータ線を介してアクティブマトリクス液晶
パネル２１のｍ列の相転移型液晶群（画素セル群）のＴ
ＰＴのドレインに接続されている。ｍ個のスイッチ２５
１は初期化の際に必要な電圧Ｖｉ と表示データ電圧Ｖ
ｄａの一方を選択出力する。The data driver 25 is a circuit that applies display data or initialization voltage to the active matrix liquid crystal panel 21, and has m switches 25" (2511 in FIG. indicates the first switch 251), and m output amplifiers 25
2 (2521 in FIG. 3 indicates the first output amplifier 252). The output terminals of the m output amplifiers 252 are connected to the T terminals of m columns of phase change liquid crystal groups (pixel cell groups) of the active matrix liquid crystal panel 21 via data lines such as Dl.
Connected to the drain of PT. m switches 25
1 is the voltage Vi required for initialization and the display data voltage V
One of da is selected and output.
走査ドライバ２６はレジスタＲｉ及びＲｓ と、レジス
タＲ１及びＲｓの一方の出力を選択するスイッチ２６１
．〜２６１ｎ と、スイッチ２６１１〜２６１ 、の出
力を増幅して出力する出力アンプ２６２、〜２６２ 、
、と制御端子ＩＳとを存する。レジスタＲｉには制御信
号発生回路２４からの初期化ライン選択信号Ｈｉが書込
まれ、かつ、ｌ水平走査期間毎にシフトされ、レジスタ
Ｒｓには制御信号発生回路２４からの表示ライン選択信
号か書込まれ、かつ、１水平走査期間毎にシフトされる
。The scan driver 26 includes registers Ri and Rs, and a switch 261 that selects the output of one of the registers R1 and Rs.
．． -261n and output amplifiers 262, -262, which amplify and output the outputs of switches 2611-261,
, and a control terminal IS. The initialization line selection signal Hi from the control signal generation circuit 24 is written into the register Ri and is shifted every l horizontal scanning period, and the display line selection signal Hi from the control signal generation circuit 24 is written into the register Rs. and shifted every horizontal scanning period.
スイッチ２６１．〜２６】。は制御端子Ｉｓに入力され
る前記制御信号Ｃｄｉに応じて切換わり、レジスタＲｉ
からの初期化ライン選択信号とレジスタＲｓからの表示
ライン選択信号の一方を選択する。Switch 261. ~26]. is switched in accordance with the control signal Cdi input to the control terminal Is, and the register Ri
One of the initialization line selection signal from the register Rs and the display line selection signal from the register Rs is selected.
また、出力アンブ２６２．〜２６２ｏの各出力端はライ
ン８１〜Ｓ０の信号線を介してアクティブマトリクス液
晶パネル２１の１行〜ｎ行の各ＴＦＴ２３のゲートに接
続されている。上記のデータドライバ２５と走査ドライ
バ２６が前記初期化手段１２及び書込み及び保持手段１
３を構成している。In addition, the output amplifier 262. 262o are connected to the gates of the TFTs 23 in rows 1 to n of the active matrix liquid crystal panel 21 via signal lines 81 to S0. The data driver 25 and the scan driver 26 are connected to the initialization means 12 and the write and hold means 1.
3.
次に本実施例の動作について、アクティブマトリクス液
晶パネル２１の３行１列の画素セル２２ｊｌを例にとっ
て説明する。データドライバ２５は入力制御信号Ｃｄｉ
のハイレベル期間は表示データ電圧Ｖｄａを出力し、Ｃ
ｄｉのローレベル期間は初期化電圧Ｖｉをデータ線ＤＩ
へ出力する。第４図（Ｃ）はこのデータ線ＤＩへ送出さ
れた電圧て、初期化電圧Ｖｉは画素セル２２ｊｌを散乱
状態とする低電圧で一定値であり、一方、表示データ電
圧Ｖｄａは表示階調に応してレベルか変化する電圧であ
る。Next, the operation of this embodiment will be explained using the pixel cell 22jl of the 3rd row and 1st column of the active matrix liquid crystal panel 21 as an example. The data driver 25 has an input control signal Cdi.
During the high level period, the display data voltage Vda is output, and C
During the low level period of di, the initialization voltage Vi is connected to the data line DI.
Output to. FIG. 4(C) shows the voltages sent to the data line DI, where the initialization voltage Vi is a constant low voltage that causes the pixel cell 22jl to be in a scattering state, while the display data voltage Vda is a constant value that changes the display gradation. It is a voltage whose level changes accordingly.
走査ドライバ２６はラインＳｊの表示データ期間にこの
ラインＳｊかアクティブになる信号（第４図（Ｄ）に示
す）を出力し、ＴＰＴ２３ｊ Ａをオンとする。これに
より、ＴＰＴ２３ｊ ｌのオン期間ではデータ線Ｄ７を
介して入力される表示データ電圧ＶｄａがＴＦＴ２３ｊ
ｌのドレイン、ソースを通して画素セル２２ｊ１に印
加される。The scan driver 26 outputs a signal (shown in FIG. 4(D)) that makes the line Sj active during the display data period of the line Sj, and turns on the TPT 23jA. As a result, during the ON period of the TPT23jl, the display data voltage Vda input via the data line D7 is
It is applied to the pixel cell 22j1 through the drain and source of 1.
これにより、画素セル２２ｊｊ７は電圧Ｖｄａに応じて
階調の表示を行なう。Thereby, the pixel cell 22jj7 performs gradation display according to the voltage Vda.
ＴＦＴ２３ｊ １かオンとされるラインＳｊの表示デー
タ期間の次の初期化データ期間では、走査ドライバ２６
はラインＳｋがアクティブになる信号（第４図（Ｇ）に
示す）を出力して、このラインＳｋ上の各ＴＰＴをオン
として、そのオンのＴＰＴのドレイン、ソースを通して
初期化電圧Ｖｉを画素セルに印加させ、それらの画素セ
ルに黒を書込む初期化を行なう。なお、ラインＳｋはラ
インＳｊに比し、前記瞬時値応答時間相当分光の走査ラ
インである。また、この初期化データ期間以降、次にラ
インＳｊの初期化か行なわれるまでは、ＴＦＴ２３ｊｆ
ｆｉはオフてあり、これにより、画素セル２２ｊｌに電
圧Ｖｄａによる充電電荷か保持される。 次の一水平走
査期間では走査ドライバ２６は前半の表示データ期間て
はラインＳ Ｉ ＋ １をアクティブにする信号（第４
図（Ｅ）に示す）を出力した後、後半の初期化データ期
間でラインＳｋ＋＋をアクティブにする信号（第４図（
Ｈ）に示す）を出力し、更に次の一水平走査期間の前半
の表示データ期間ではラインＳＪ＋２をアクティブにす
る信号（第４図（Ｆ）に示す）を出力する。なお、第４
図では説明を簡単にするために、セル印加電圧は一方の
電圧極性の場合だけについて説明している。以下、上記
と同様の動作か繰り返され、表示データは１ラインずつ
順次に書込まれ、かつ、それに先行したラインの画素セ
ルの初期化も１ラインずつ順次に行なわれる。In the initialization data period following the display data period of line Sj in which TFT 23j is turned on, the scan driver 26
outputs a signal (shown in FIG. 4 (G)) that activates the line Sk, turns on each TPT on this line Sk, and applies the initialization voltage Vi to the pixel cell through the drain and source of the turned-on TPT. is applied to perform initialization to write black into those pixel cells. Note that, compared to line Sj, line Sk is a scanning line of the spectrum corresponding to the instantaneous value response time. Furthermore, after this initialization data period, until the next initialization of line Sj, the TFT 23jf
fi is turned off, so that the charge charged by the voltage Vda is held in the pixel cell 22jl. In the next horizontal scanning period, the scan driver 26 outputs a signal (fourth
After outputting the signal (shown in Figure 4(E)), the signal that activates the line Sk++ in the latter half of the initialization data period (shown in Figure 4(E)) is output.
Furthermore, in the display data period in the first half of the next horizontal scanning period, a signal (shown in FIG. 4F) for activating line SJ+2 is output. In addition, the fourth
In the figure, in order to simplify the explanation, only the case where the voltage applied to the cell has one voltage polarity is explained. Thereafter, the same operation as above is repeated, display data is sequentially written line by line, and the pixel cells of the preceding line are also initialized line by line.
上記の本実施例の動作を表示態様と共に説明するに、例
えば第５図（Ａ）〜（Ｃ）に示すように、表示ラインか
ｎラインあるものとすると、まず−水平走査期間の前半
の表示データ期間で第５図（Ａ）に示す如く第１ライン
（ここではｊ＝１）の書込みが行なわれる。この時点て
は既に第２ラインから第（ｋ−１）ラインまでは初期化
により黒く表示されている。なお、第にラインから第ｎ
ラインには、１フレーム前の表示データか表示されてい
る。To explain the operation of the above-mentioned embodiment together with the display mode, for example, assuming that there are n display lines as shown in FIGS. During the data period, the first line (here, j=1) is written as shown in FIG. 5(A). At this point, lines from the second line to the (k-1)th line are already displayed in black due to initialization. Note that from the th line to the nth line
Display data from one frame before is displayed on the line.
次に上記−水平走査期間の後半の初期データ期間で第５
図（Ｂ）に示す如く、第にラインの初期化が行なわれ、
第にラインの各画素セルはすべて散乱状態とされ、黒か
表示される。Then - the fifth data period in the second half of the horizontal scanning period.
As shown in Figure (B), the line is first initialized,
First, each pixel cell of the line is all in a scattered state and displayed as black.
次の一水平走査期間の前半の表示データ期間では、第５
図（Ｃ）に示す如く、既に初期化されている第２ライン
の各画素セルに表示データか書込まれる。In the display data period in the first half of the next horizontal scanning period, the fifth
As shown in Figure (C), display data is written into each pixel cell of the second line that has already been initialized.
以下、上記と同様の動作か繰り返される。Thereafter, the same operation as above is repeated.
ここで、Ｈ８とＶ、とはかならずしも現行テレビの周期
に限るものではない。Here, H8 and V are not necessarily limited to the cycles of current televisions.
本実施例によれば、１ライン毎に次々に表示データか書
き替えられていくので、動画の表示かできる。また、累
積応答の任意のレベルの電圧を表示データとして印加で
きるため、中間調の表示かできる。According to this embodiment, since the display data is rewritten one after another line by line, a moving image can be displayed. Further, since a voltage at any level of the cumulative response can be applied as display data, it is possible to display halftones.
上述の如く、本発明によれば、１ラインずつ表示データ
を書込むことができると共に、書込まれる表示データを
液晶の電圧−透過率特性の任意の位置のデータとするこ
とができるため、相転移型液晶の特徴である偏光板か要
らず表示が明るいという利点を損うことなく、動画表示
と中間調表示を夫々行なうことかでき、表示品質の向上
に寄与するところ大である等の特長を有するものである
。As described above, according to the present invention, display data can be written line by line, and the written display data can be data at any position in the voltage-transmittance characteristic of the liquid crystal, so Features include the ability to display moving images and halftones without sacrificing the advantage of bright display without the need for a polarizing plate, which is a characteristic of transition type liquid crystals, which greatly contributes to improving display quality. It has the following.
第１図は本発明の原理構成図、
第２図は本発明の作用説明図、
第３図は本発明の一実施例の構成図、
第４図は第３図の動作説明用信号波形図、第５図は第３
図の表示動作説明図、
第６図は従来の一例の構成図、
第７図は第６図の動作説明用タイムチャート、第８図は
従来装置の駆動原理図、
第９図は従来装置の駆動手順説明図である。
図において、
１１は液晶ディスプレイパネル、
１２は初期化手段、
１３は書込み及び保持手段、
２１はアクティブマトリクス液晶パネル、２４は制御信
号発生回路、
２５はデータドライバ、
２６は走査ドライバ
を示す。
本発明の原理構成図
１１図
本発明の作用説明図
第２図
（Ａ）！ライン目の書込み
第３図の表示動作説明図
第５図
従来の一例の構成図
第６図Fig. 1 is a diagram of the principle configuration of the present invention, Fig. 2 is an explanatory diagram of the operation of the present invention, Fig. 3 is a block diagram of an embodiment of the present invention, and Fig. 4 is a signal waveform diagram for explaining the operation of Fig. 3. , Figure 5 is the third
Figure 6 is a configuration diagram of a conventional example; Figure 7 is a time chart for explaining the operation of Figure 6; Figure 8 is a drive principle diagram of the conventional device; Figure 9 is a diagram of the conventional device. It is a drive procedure explanatory diagram. In the figure, 11 is a liquid crystal display panel, 12 is an initialization means, 13 is a writing and holding means, 21 is an active matrix liquid crystal panel, 24 is a control signal generation circuit, 25 is a data driver, and 26 is a scan driver. Figure 11 shows the principle structure of the present invention Figure 2 (A) illustrates the action of the present invention! Writing of the line Figure 3: Explanation of display operation Figure 5: Configuration diagram of a conventional example Figure 6
Claims (3)
に配列された液晶ディスプレイパネル（１１）により表
示を行なう液晶表示装置において、 前記複数の相転移型液晶のうち、表示データの書込みラ
インに対して該液晶が透明状態から散乱状態に到る応答
時間以上の時間先行するライン上の各液晶に対して夫々
散乱状態とする初期化を行なう初期化手段（１２）と、 該初期化手段（１２）により既に初期化されている表示
データの書込みラインの各液晶に対して表示階調に応じ
たレベルの駆動電圧を印加して書込みを行なった後保持
する書込み及び保持手段（１３）と を有することを特徴とする液晶表示装置。(1) In a liquid crystal display device that performs display using a liquid crystal display panel (11) in which a plurality of phase change liquid crystals are regularly arranged as pixel cells, a writing line for display data among the plurality of phase change liquid crystals is provided. initializing means (12) for initializing each liquid crystal on a line preceding the line by a time equal to or longer than the response time for the liquid crystal to change from a transparent state to a scattering state to a scattering state; writing and holding means (13) for applying a drive voltage at a level corresponding to the display gradation to each liquid crystal in the writing line of the display data that has already been initialized by (12) to perform writing and then holding the liquid crystal; A liquid crystal display device comprising:
数の相転移型液晶の夫々に１対１に対応して接続された
複数のスイッチングトランジスタ（２３）を有し、 前記初期化手段（１２）は、該複数のスイッチングトラ
ンジスタ（２３）のうち初期化されるべきライン上の各
液晶に接続された前記スイッチングトランジスタに対し
て１水平走査期間内の第１の所定期間オンとして、初期
化用電圧を該オンとされたスイッチングトランジスタを
通して該初期化されるべきライン上の各液晶に印加する
手段であり、 前記書込み及び保持手段（１３）は該複数のスイッチン
グトランジスタ（２３）のうち前記表示データの書込み
ラインの各液晶に接続されたスイッチングトランジスタ
に対して１水平走査期間内の第２の所定期間のみオンと
した後オフとして、該表示データを該オンとされたスイ
ッチングトランジスタを通して該書込みライン上の各液
晶に駆動電圧として印加する手段であることを特徴とす
る請求項１記載の液晶表示装置。(2) The liquid crystal display panel (11) has a plurality of switching transistors (23) connected to each of the plurality of phase change liquid crystals in a one-to-one correspondence, and the initialization means (12) is an initialization voltage that is turned on for a first predetermined period within one horizontal scanning period for the switching transistors (23) connected to each liquid crystal on the line to be initialized among the plurality of switching transistors (23). is applied to each liquid crystal on the line to be initialized through the turned-on switching transistor, and the writing and holding means (13) is a means for applying the voltage to each liquid crystal on the line to be initialized through the turned-on switching transistor, and the writing and holding means (13) is a means for applying The switching transistors connected to each liquid crystal on the write line are turned on only for a second predetermined period within one horizontal scanning period and then turned off, and the display data is transferred onto the write line through the switching transistors that have been turned on. 2. The liquid crystal display device according to claim 1, further comprising means for applying a driving voltage to each liquid crystal.
印加される前記初期化用電圧と前記表示データは、夫々
１水平走査期間内で前記第１及び第２の所定期間ずつ時
系列的に合成されてなることを特徴とする請求項２記載
の液晶表示装置。(3) The initialization voltage applied to the plurality of switching transistors (23) and the display data are synthesized in time series for each of the first and second predetermined periods within one horizontal scanning period. The liquid crystal display device according to claim 2, characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33638390A JPH04204628A (en) | 1990-11-30 | 1990-11-30 | Liquid crystal display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33638390A JPH04204628A (en) | 1990-11-30 | 1990-11-30 | Liquid crystal display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04204628A true JPH04204628A (en) | 1992-07-27 |
Family
ID=18298573
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33638390A Pending JPH04204628A (en) | 1990-11-30 | 1990-11-30 | Liquid crystal display device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04204628A (en) |
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