JPH04151819A - Manufacture of semiconductor - Google Patents
Manufacture of semiconductorInfo
- Publication number
- JPH04151819A JPH04151819A JP27713490A JP27713490A JPH04151819A JP H04151819 A JPH04151819 A JP H04151819A JP 27713490 A JP27713490 A JP 27713490A JP 27713490 A JP27713490 A JP 27713490A JP H04151819 A JPH04151819 A JP H04151819A
- Authority
- JP
- Japan
- Prior art keywords
- film
- hydrogen
- semiconductor
- sputtering
- oxygen concentration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 51
- 238000004519 manufacturing process Methods 0.000 title claims description 23
- 239000001257 hydrogen Substances 0.000 claims abstract description 45
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 45
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 44
- 238000004544 sputter deposition Methods 0.000 claims abstract description 34
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 33
- 239000001301 oxygen Substances 0.000 claims abstract description 33
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 33
- 238000000034 method Methods 0.000 claims abstract description 19
- 239000013078 crystal Substances 0.000 claims abstract description 12
- 239000011261 inert gas Substances 0.000 claims abstract description 8
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 238000000137 annealing Methods 0.000 abstract description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 abstract description 5
- 239000010408 film Substances 0.000 description 55
- 239000010409 thin film Substances 0.000 description 15
- 230000015572 biosynthetic process Effects 0.000 description 13
- 238000002425 crystallisation Methods 0.000 description 11
- 230000008025 crystallization Effects 0.000 description 11
- 239000012535 impurity Substances 0.000 description 11
- 239000007789 gas Substances 0.000 description 10
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 6
- 238000001552 radio frequency sputter deposition Methods 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910052786 argon Inorganic materials 0.000 description 4
- 239000013081 microcrystal Substances 0.000 description 4
- 238000001237 Raman spectrum Methods 0.000 description 3
- 238000004458 analytical method Methods 0.000 description 3
- 239000000969 carrier Substances 0.000 description 3
- 229910052732 germanium Inorganic materials 0.000 description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 229910021424 microcrystalline silicon Inorganic materials 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 125000004429 atom Chemical group 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 150000002500 ions Chemical group 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 238000001069 Raman spectroscopy Methods 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000013079 quasicrystal Substances 0.000 description 1
- 238000005204 segregation Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は、格子歪を有するマイクロクリスタル構造の半
導体の作製方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a method for manufacturing a semiconductor having a microcrystal structure having lattice distortion.
本発明は、水素または水素を主成分気体(残りはアルゴ
ン等の不活性気体)雰囲気中における不純物濃度5 X
10’ 8cm−”以下の半導体ターゲットをスパッ
タさせることによって、7 X 10”cm−3以下好
ましくはI Xl019cm−3以下の酸素濃度のアモ
ルファス半導体を熱結晶化させることにより、7×10
110l9’以下の酸素濃度の格子歪を存するマイクロ
クリスタル構造の半導体を形成する方法に関するもので
ある。The present invention uses hydrogen or hydrogen as a main component gas (the rest is an inert gas such as argon) at an impurity concentration of 5
By sputtering a semiconductor target of 10'8 cm-" or less, an amorphous semiconductor with an oxygen concentration of 7 X 10" cm-3 or less, preferably IXl019 cm-3 or less, is thermally crystallized.
The present invention relates to a method for forming a semiconductor having a microcrystal structure having a lattice strain with an oxygen concentration of 110l9' or less.
従来、多結晶半導体装置は、減圧CVDまたはプラズマ
CVD法によって形成された半導体膜を550〜650
℃の温度で数時間〜数十時間熱処理し熱結晶化させるこ
とにより多結晶半導体膜を得て、この多結晶半導体膜を
用いて作製されていた。Conventionally, polycrystalline semiconductor devices have a semiconductor film formed by low pressure CVD or plasma CVD with a thickness of 550 to 650 mm.
A polycrystalline semiconductor film has been obtained by thermally crystallizing it by heat treatment at a temperature of .degree.
減圧CVD法によって非単結晶半導体膜を得る場合、大
面積基板に均一に成膜するのは困難であるという問題が
ある。When obtaining a non-single crystal semiconductor film by low pressure CVD, there is a problem in that it is difficult to uniformly form a film on a large area substrate.
またプラズマCVD法によって非単結晶半導体膜を得る
場合、その成膜工程に時間かかかるという問題かあった
。Further, when a non-single crystal semiconductor film is obtained by plasma CVD, there is a problem in that the film forming process takes a long time.
従来、水素を添加したスパッタ法によって得られたa−
3i (アモルファスシリコン)膜を用いて薄膜トラン
ジスタを作製する例が知られているか、その電気的特性
は低い(電子移動度は0.1cm2/Vsec以下)こ
とか知られている。Conventionally, a-
It is known that a thin film transistor is manufactured using a 3i (amorphous silicon) film, or that its electrical characteristics are low (electron mobility is 0.1 cm 2 /Vsec or less).
そこで、−射的には水素を添加しないアルコンガスを用
い、スパッタ法によってa−3i膜を得ている。Therefore, an a-3i film is obtained by a sputtering method using Alcon gas to which hydrogen is not added.
また水素のみまたは水素を主成分とする気体を用いたス
パッタ法での成膜は不可能であるとされていた。Furthermore, it was considered impossible to form a film by sputtering using only hydrogen or a gas containing hydrogen as a main component.
この様な問題を解決する手段としてはスパッタ法を用い
る方法かある。One way to solve this problem is to use sputtering.
特にマグネトロン型スパッタ法は
イ)電子が磁場でターゲット付近に閉じ込められ高エネ
ルギー電子による基板表面への損傷か抑えられる。In particular, the magnetron sputtering method (a) confines electrons near the target using a magnetic field, which suppresses damage to the substrate surface caused by high-energy electrons.
口)低温で大面積にわたり高速成膜できる。Mouth) Capable of high-speed film formation over large areas at low temperatures.
ハ)危険なガスを使用しないので、安全性と工業性が高
い。c) High safety and industrial efficiency as no dangerous gas is used.
などの利点かある。しかし、スパッタ法によって得た非
単結晶半導体膜には、珪素原子の存在に偏りかあり、ア
ルゴン原子および酸素の不純物の混在によりまたは同時
に水素を混在していないため700℃以下の温度での熱
結晶化は不可能であることか知られている。There are advantages such as. However, in the non-single crystal semiconductor film obtained by sputtering, the presence of silicon atoms is biased, and due to the presence of impurities such as argon atoms and oxygen, or because hydrogen is not mixed at the same time, it is difficult to heat at temperatures below 700°C. It is known that crystallization is impossible.
本発明は、工業的に量産生のよいスパッタ法により得ら
れた非単結晶半導体を熱結晶化させることによって格子
歪を有する微結晶半導体を得ることを発明の目的とする
。An object of the present invention is to obtain a microcrystalline semiconductor having lattice strain by thermally crystallizing a non-single-crystalline semiconductor obtained by a sputtering method that is industrially suitable for mass production.
本発明は、水素または水素と不活性気体とを水素を主成
分として有する雰囲気中における基板上へのスパッタ法
による非晶質性(アモルファスまたはそれにきわめて近
い)半導体膜(以下a −3iという)の成膜工程と、
前記スパッタ法によって得た非晶質性の半導体膜を45
0〜700℃代表的には600℃の温度で結晶化させる
工程を有することを特徴とする半導体作製方法である。The present invention is directed to forming an amorphous (or very close to amorphous) semiconductor film (hereinafter referred to as a-3i) by sputtering hydrogen or hydrogen and an inert gas onto a substrate in an atmosphere containing hydrogen as a main component. A film forming process;
The amorphous semiconductor film obtained by the sputtering method was
This is a semiconductor manufacturing method characterized by having a step of crystallizing at a temperature of 0 to 700°C, typically 600°C.
本発明者は、スパッタ法において水素を雰囲気気体とし
て20%以上添加する(雰囲気中の酸素濃度は0.01
%以下とし、水素も5N(99,999%以上)の高純
度水素を用いている)ことで、成膜されるaSi膜中に
予め水素を均一に分散させて混入せしめて、このa−3
i膜を450〜700℃1代表的には600℃以下の温
度でのアニールによって熱結晶化できることを発見した
。本発明は、この上記実験事実に基づくものである。The present inventor added 20% or more hydrogen as an atmospheric gas in the sputtering method (the oxygen concentration in the atmosphere was 0.01%).
% or less, and high purity hydrogen of 5N (99,999% or more) is used), hydrogen is uniformly dispersed and mixed into the aSi film to be formed in advance, and this a-3
It has been discovered that the i-film can be thermally crystallized by annealing at a temperature of 450-700°C, typically below 600°C. The present invention is based on this experimental fact.
この結晶化は、平均の結晶粒径が5〜400人と小さく
、かつその中の水素含有量は5原子%以下である。特に
不純物としての酸素は7×10190m−3またはそれ
以下好ましくはI X 10”cm−”以下とすること
に特長を有する。そしてそれぞれの微結晶に格子歪をも
たせることにより、ミクロにそれの結晶界面か互いに強
く密接し、結晶粒界でのキャリアにとってのバリアを消
滅させんとしている。In this crystallization, the average crystal grain size is as small as 5 to 400, and the hydrogen content therein is 5 at % or less. In particular, it is advantageous that oxygen as an impurity is 7 x 10190 m-3 or less, preferably I x 10"cm-" or less. By imparting lattice strain to each microcrystal, the crystal interfaces of the microcrystals are brought into close contact with each other, thereby eliminating the barrier for carriers at the grain boundaries.
このため、単に格子歪のない多結晶の結晶粒界では、酸
素等がそこに偏析し障壁(バリア)かキャリアの移動を
阻害するが、本発明においては、かかる格子歪により、
バリアがないまたは無視できる程度であるため、電子の
移動度も5〜300cm2/Vsecと桁違いに優れた
特長を有せしめた。Therefore, in the grain boundaries of polycrystals that simply have no lattice strain, oxygen etc. segregate there and act as a barrier or inhibit the movement of carriers, but in the present invention, due to such lattice strain,
Since there is no barrier or a negligible barrier, the electron mobility is 5 to 300 cm2/Vsec, which is an order of magnitude better.
(実施例1)
本実施例は、マグネトロン型RF(高周波)スパッタ装
置によって作製したa−3i膜を熱結晶化させて、格子
歪を有せしめるとともに、その平均結晶粒径を5〜40
0人と小さく、また含有水素の量は5原子%以下であり
、かつ不純物としての酸素は7X1019cF3以下、
好ましくはI X 10I910l9以下の準結晶(セ
ミアモルファス Quasi−crystalまたはS
emi−amrphasともいう)の多結晶珪素半導体
層を形成した。そしてその電気特性であるキャリア移動
度、スレッシュホールド電圧、界面準位密度等の電気特
性を知るのに最も有効な手段であるこの微結晶珪素半導
体層を用い、薄膜ランジスタを作製した。(Example 1) In this example, an a-3i film produced using a magnetron-type RF (radio frequency) sputtering device was thermally crystallized to have lattice strain, and the average crystal grain size was adjusted to 5 to 40 mm.
It is small with 0 people, and the amount of hydrogen contained is less than 5 at%, and the amount of oxygen as an impurity is less than 7X1019cF3.
Preferably a semi-amorphous quasi-crystal or S
A polycrystalline silicon semiconductor layer (also referred to as emi-amrphas) was formed. A thin film transistor was fabricated using this microcrystalline silicon semiconductor layer, which is the most effective means for determining its electrical properties such as carrier mobility, threshold voltage, and interface state density.
第1図に本実施例において作製した薄膜トランジスタの
作製工程を示す。FIG. 1 shows the manufacturing process of the thin film transistor manufactured in this example.
ます、ガラス基板(11) lに酸化珪素膜(12)を
以下の条件においてマグネトロン型RFスパッタ法によ
り200nmの厚さに形成した。First, a silicon oxide film (12) was formed to a thickness of 200 nm on a glass substrate (11) by magnetron RF sputtering under the following conditions.
02100%雰囲気
成膜温度 150℃
RF(13,56MHz)出力400 W圧力 0.5
Pa
単結晶シリコンをターゲットに使用
さらにその」二に高純度のマグネトロン型RFスパッタ
装置によってチャネル形成領域となるa−3i膜(13
)を1100nの厚さに成膜する。02100% atmosphere Film forming temperature 150℃ RF (13,56MHz) output 400W Pressure 0.5
Pa single crystal silicon is used as a target.Secondly, a high-purity magnetron type RF sputtering device is used to sputter an a-3i film (13
) is formed to a thickness of 1100 nm.
このスパッタ法として背圧をI X 1O−7Pa以下
とし、排気はターボ分子ポンプとクライオポンプとを用
いた。供給する気体の量は5 N (99,999%)
以上の純度を有し、添加気体としては必要に応じて用い
るアルゴン4N以上を有せしめた。ターゲラ1〜の単結
晶シリコンも5 X 1018cm−3以下の酸素濃度
、例えばI X1018cm−”の酸素濃度とし、形成
される被膜中の不純物としての酸素をきわめて少なくし
た。In this sputtering method, the back pressure was set to I x 10-7 Pa or less, and a turbo molecular pump and a cryopump were used for exhaust. The amount of gas supplied is 5 N (99,999%)
It had a purity of 4N or more, and 4N or more of argon was used as the additive gas, if necessary. The single crystal silicon of Targera 1~ also had an oxygen concentration of 5.times.10.sup.18 cm.sup.-3 or less, for example, I.times.10.sup.18 cm.sup.-" to extremely reduce the amount of oxygen as an impurity in the formed film.
成膜条件は、水素含有比20〜100%、アルゴン含有
比80〜0%、例えば水素含有100%とした。かかる
雰囲気下において、
H2/(H2+Ar) = 100%(分圧比)成膜温
度 150℃
RF(13,56MHz)出力 400W全圧力 0.
5Pa
とし、ターゲットは高純度Siターゲットを用いた。The film forming conditions were a hydrogen content ratio of 20 to 100% and an argon content ratio of 80 to 0%, for example, a hydrogen content of 100%. In such an atmosphere, H2/(H2+Ar) = 100% (partial pressure ratio) Film forming temperature 150°C RF (13,56MHz) output 400W Total pressure 0.
The pressure was 5 Pa, and a high purity Si target was used.
この後、450〜700℃1例えば600℃の温度で1
0時間の時間をかけ、水素または不活性気体中、本実施
例においては水素100%雰囲気中においてa−3i膜
(13)の熱結晶化を行った。いわゆる微結晶(または
セミアモルファス)といわれるものであった。After this, 1 at a temperature of 450 to 700°C, for example 600°C.
The a-3i film (13) was thermally crystallized for 0 hours in a hydrogen or inert gas atmosphere, in this example a 100% hydrogen atmosphere. It was so-called microcrystalline (or semi-amorphous).
かかる方法にて形成されたアモルファスシリコン膜およ
び熱処理により結晶化後の被膜中の不純物純度をS[M
S(二次イオン等量分析)法により調べた。すると成膜
中の不純物濃度のうち、酸素8XIO18cF3、炭素
3 XIO”cm−3であった。また水素は4 X 1
020cF3を有し、珪素の密度を4×1022cm−
3とすると、1原子96に相当する量であった。The impurity purity in the amorphous silicon film formed by this method and the film after crystallization by heat treatment is reduced to S[M
It was investigated by the S (secondary ion equivalent analysis) method. Then, among the impurity concentrations during film formation, oxygen was 8XIO18cF3 and carbon was 3XIO"cm-3. Hydrogen was 4XIO"cm-3.
020 cF3, and the density of silicon is 4 x 1022 cm-
3, the amount corresponds to 1 atom, 96.
これらをターゲットの単結晶シリコンの酸素濃度I X
10’ 8cF3を基準として調べた。またこのSI
MS分析は成膜後被膜の深さ方向の分布(デプスプロフ
ィル)を調べ、その最小値を基準とした。なせなら表面
は大気との自然酸化した酸化珪素があるからである。こ
れらの値は結晶化処理後であっても特に大きな変化はな
く、酸素の不純物濃度は8XIO18cm−3であった
。この実施例において、酸素を念のために増やし、例え
ばN20を0.1cc/sec、10cc/secと添
加してみた。すると結晶化後の酸素濃度はI X 10
20cm−3,4X 1020cm−3と多くなった。Oxygen concentration IX of target single crystal silicon
The investigation was conducted using 10'8cF3 as a reference. Also this SI
In the MS analysis, the distribution in the depth direction (depth profile) of the film after film formation was investigated, and its minimum value was used as a reference. This is because the surface contains silicon oxide that has naturally oxidized with the atmosphere. These values did not change significantly even after the crystallization treatment, and the oxygen impurity concentration was 8×IO18 cm −3 . In this example, the amount of oxygen was increased just in case, for example, N20 was added at 0.1 cc/sec and 10 cc/sec. Then, the oxygen concentration after crystallization is I x 10
The amount increased to 20cm-3,4X 1020cm-3.
しかしかかる被膜を用いた時、同時に、結晶化に必要な
温度を700℃以上にするか、または結晶化時間を少な
くとも5倍以上にすることによって、初めて結晶化がで
きた。即ち工業的に基板のガラスの軟化温度を考慮する
と、700℃以下好ましくは600℃以下での処理は重
要であり、またより結晶化に必要な時間を少なくするこ
とも重要である。However, when such a film was used, crystallization could only be achieved by raising the temperature required for crystallization to 700° C. or higher, or increasing the crystallization time by at least 5 times. That is, considering the softening temperature of the glass of the substrate from an industrial perspective, it is important to process at a temperature of 700° C. or lower, preferably 600° C. or lower, and it is also important to further reduce the time required for crystallization.
しかし酸素濃度等の不純物をどのように少なくしても、
450℃以下では熱アニールによるa−3i半導体の結
晶化は実験的には不可能であった。However, no matter how you reduce impurities such as oxygen concentration,
It has been experimentally impossible to crystallize the a-3i semiconductor by thermal annealing at temperatures below 450°C.
また本発明においては、もしかかる高品質のスパッタ装
置を用いた結果として、装置からのリーク等により成膜
中の酸素濃度がI X 102102O”またはそれ以
上となった場合は、かかる本発明の特性を期待すること
かできない。In addition, in the present invention, if as a result of using such a high quality sputtering apparatus, the oxygen concentration during film formation becomes I x 102102 O" or more due to leakage from the apparatus, the characteristics of the present invention I can't really hope for that.
かくの如くにして7 X 1019cm−3以下の酸素
濃度であること、および熱処理温度が450〜700℃
であることが決められた。As such, the oxygen concentration is 7 x 1019 cm-3 or less, and the heat treatment temperature is 450 to 700°C.
It was decided that.
もちろん、ゲルマニウムにおいては、またはシリコンと
ゲルマニウムとの化合物半導体である場合にはアニール
温度を約100℃下げることができた。Of course, in the case of germanium or a compound semiconductor of silicon and germanium, the annealing temperature could be lowered by about 100°C.
この微結晶半導体は格子歪を有し、以下第4図に示され
たレーザラマン分析データで明らかなように、低波数側
に単結晶シリコンに比べてシフトしていた。This microcrystalline semiconductor has lattice strain, and as is clear from the laser Raman analysis data shown in FIG. 4 below, it was shifted to the lower wave number side compared to single crystal silicon.
電気特性を調べるため、以下に絶縁ゲイト型電解効果l
・ランジスタの作製方法を記す。即ち、本発明方法によ
って得られた熱結晶化させた微結晶珪素半導体に対して
デバイス分離パターニングを行い、第1図(a)の形状
を得た。In order to investigate the electrical characteristics, the insulated gate type electrolytic effect l
・Describe the method for manufacturing transistors. That is, the thermally crystallized microcrystalline silicon semiconductor obtained by the method of the present invention was subjected to device separation patterning to obtain the shape shown in FIG. 1(a).
つぎに、n+a−8i膜(14)を以下に示す条件でマ
グネトロン型RFスパッタ法により50nmの厚さに成
膜した。Next, an n+a-8i film (14) was formed to a thickness of 50 nm by magnetron RF sputtering under the conditions shown below.
成膜条件は、水素分圧比20〜99%以上(本実施例で
は80%)、アルゴン分圧比80〜0%(本実施例では
19%)、PH3分圧比0.1%〜10%(実施例では
1%)の雰囲気中において、
成膜温度 150℃
RF(13,56MHz)出力 400W全圧力 0.
5Pa
であり、ターゲットとして単結晶(酸素濃度1×10”
cm−’)Siをターゲットとして用いた。The film forming conditions were a hydrogen partial pressure ratio of 20 to 99% or more (80% in this example), an argon partial pressure ratio of 80 to 0% (19% in this example), and a PH3 partial pressure ratio of 0.1% to 10% (in this example, 19%). In the example, 1%), film formation temperature: 150°C, RF (13,56MHz) output: 400W, total pressure: 0.
5 Pa, and the target was a single crystal (oxygen concentration 1 x 10"
cm-')Si was used as a target.
また、この−導電型を有する半導体層の作製のためには
、はPCVD法を用いてもよい。さらに、活性層を形成
した後、ソースおよびドレインを形成するため、不純物
(例えばB(ホウ素)、P(リン) 、As(砒素))
をイオン注入法により添加してもよい。Furthermore, a PCVD method may be used to fabricate the semiconductor layer having the negative conductivity type. Furthermore, after forming the active layer, impurities (e.g. B (boron), P (phosphorus), As (arsenic)) are added to form the source and drain.
may be added by ion implantation.
この後ゲート領域パターニングを行い第1図(b)の形
状を得た。Thereafter, gate region patterning was performed to obtain the shape shown in FIG. 1(b).
つぎにゲート酸化珪素膜(15)を1100nの厚さに
マグネトロン型RFスパッタ法により以下の条件で成膜
し、第1図(C)の形状を得た。Next, a gate silicon oxide film (15) was formed to a thickness of 1100 nm by magnetron RF sputtering under the following conditions to obtain the shape shown in FIG. 1(C).
酸素雰囲気100% 圧力0.5pa。100% oxygen atmosphere Pressure 0.5pa.
成膜温度100℃
RF(13,56MHz)出力400W単結晶シリコン
のターゲットまたは合成石英のターゲット使用した。Film formation temperature: 100° C. RF (13.56 MHz) output: 400 W Single crystal silicon target or synthetic quartz target was used.
つぎにコンタクトホール開はパターニングを行い、第1
図(d)の形状をえた。Next, patterning is performed to open the contact hole, and the first
The shape shown in figure (d) was obtained.
最後に真空蒸着によりアルミニウム電極(16)を30
0nmの厚さに形成し、パターニングすることににより
第1図(e)の形状を得、その後水素熱アニルを水素1
00%雰囲気中において375℃の温度で30m1n行
い、薄膜トランジスタを完成させた。Finally, 30% aluminum electrode (16) was applied by vacuum evaporation.
The shape as shown in FIG.
A thin film transistor was completed by performing 30 m1n at a temperature of 375° C. in a 0.00% atmosphere.
この水素熱アニールは多結晶珪素半導体と酸化珪素絶縁
膜との界面準位を低減させ、デバイス特性を向上させる
ためである。The purpose of this hydrogen thermal annealing is to reduce the interface state between the polycrystalline silicon semiconductor and the silicon oxide insulating film and improve device characteristics.
なお第1図(e)に示す薄膜トランジスタにおいて、S
はソース電極、Gはゲイト電極、Dはドレイン電極であ
る。Note that in the thin film transistor shown in FIG. 1(e), S
is a source electrode, G is a gate electrode, and D is a drain electrode.
また本実施例において作製した薄膜トランジスタ第1図
(e)のチャンネル部(17)の大きさは100X10
0μmの大きさである。Furthermore, the size of the channel portion (17) in FIG. 1(e) of the thin film transistor manufactured in this example is 100×10
The size is 0 μm.
以上が本実施例において作製した多結晶珪素半導体層を
用いた薄膜トランジスタの作製方法であるか、本発明の
効果を示すためにチャネル形成領域である第1図(a)
のa−3i層(13)をマグネトロン型RFスパッタ法
により成膜する際の条件である水素の濃度および不本意
に混入する酸素濃度を変化させた実施例を5例作製した
のて以下にその作製方法を示す。The above is the method for manufacturing a thin film transistor using the polycrystalline silicon semiconductor layer manufactured in this example. In order to demonstrate the effects of the present invention, the channel forming region is shown in FIG.
We prepared five examples in which the hydrogen concentration and the unintentionally mixed oxygen concentration, which are the conditions when forming the a-3i layer (13), by magnetron-type RF sputtering were changed. The manufacturing method is shown.
(実施例2)
本実施例は実施例1の作製法においてチャネル形成領域
となる第1図(a)の(13)を作製する際のスパッタ
時における雰囲気の分圧比を
H2/ (H2+Ar) = 0%(分圧比)とし、他
は実施例1と同様な方法によって作製したものである。(Example 2) In this example, in the manufacturing method of Example 1, the partial pressure ratio of the atmosphere during sputtering when manufacturing the channel forming region (13) in FIG. 0% (partial pressure ratio), and was produced in the same manner as in Example 1 except for the following.
酸素濃度は2 X 1020cm−3を有していた。The oxygen concentration had 2×1020 cm−3.
(実施例3)
本実施例は実施例1の作製法においてチャネル形成領域
となる第1図(a)の(13)を作製する際のスパッタ
時における雰囲気の分圧比を
H2/(H2+Ar)=20% (分圧比)とし、他は
実施例1と同様な方法によって作製したものである。成
膜中の酸素濃度は7×1019cm−3を有していた。(Example 3) In this example, in the manufacturing method of Example 1, the partial pressure ratio of the atmosphere during sputtering when manufacturing (13) in FIG. 20% (partial pressure ratio), and was otherwise produced in the same manner as in Example 1. The oxygen concentration during film formation was 7×10 19 cm −3 .
(実施例4)
本実施例は実施例1の作製法においてチャネル形成領域
となる第1図(a)の(13)を作製する際のスパッタ
時における雰囲気の分圧比を
H2/(H2+Ar) −50% (分圧比)とし、他
は実施例1と同様な方法によって作製したものである。(Example 4) In this example, in the manufacturing method of Example 1, the partial pressure ratio of the atmosphere during sputtering when manufacturing the channel forming region (13) in FIG. 50% (partial pressure ratio), and was otherwise produced in the same manner as in Example 1.
成膜中の酸素濃度は3 X 10” cm−3を存して
いた。The oxygen concentration during film formation was 3 x 10'' cm-3.
(実施例5)
本実施例は実施例1の作製法においてチャネル形成領域
となる第1図(a)の(13)を作製する際のスパッタ
時における雰囲気の分圧比を
H2/ (H2+Ar) = 80%(分圧比)とし、
他は実施例1と同様な方法によって作製したものである
。成膜中の酸素濃度はI Xl019cm−3を有して
いた。(Example 5) In this example, in the manufacturing method of Example 1, the partial pressure ratio of the atmosphere during sputtering when manufacturing the channel forming region (13) in FIG. 80% (partial pressure ratio),
The other parts were manufactured by the same method as in Example 1. The oxygen concentration during film formation was IXl019cm-3.
以下、上記実施例の電気的特性を比較した結果を示す。The results of comparing the electrical characteristics of the above examples will be shown below.
第2図は完成した本実施例1〜5のチャネル部(第6図
eの(17))におけるキャリアの移動度μ(FIEL
D MOBILITY)とスパッタ時における水素分圧
比比(PH/Ptot*=H2/(H2+Ar))の関
係をグラフ化したものである。FIG. 2 shows the carrier mobility μ (FIEL
This is a graph showing the relationship between D MOBILITY) and hydrogen partial pressure ratio (PH/Ptot*=H2/(H2+Ar)) during sputtering.
第2図におけるプロット点と実施例との対応量係を以下
に表1として示す。The correspondence between the plot points in FIG. 2 and the examples is shown in Table 1 below.
表1
PH/PTOTAL% 実施例番号
第2図によれば水素分圧か0%の時は酸素濃度か2X1
0”cF3もあるため、3 xlO−’cm2V/se
cときわめて小さく、また他方、本発明の如<20%以
上また酸素濃度7 Xl01gcm−3以下において顕
著に高い移動度2 cm2/Vsec以上u (FIE
LD MOBILITY)が得られていることがわかる
。Table 1 PH/PTOTAL% Example number According to Figure 2, when hydrogen partial pressure is 0%, oxygen concentration is 2X1
Since there is also 0"cF3, 3 xlO-'cm2V/se
On the other hand, as in the present invention, the mobility is extremely high at 2 cm2/Vsec or more at <20% or more and at an oxygen concentration of 7 Xl01 gcm-3 or less (FIE
LD MOBILITY) is obtained.
これは水素を添加すると、スパッタ内のチャンバ中での
酸素を水とし、それをクライオポンプで積極的に除去で
きたためと推定される。This is presumed to be because when hydrogen was added, oxygen in the chamber within the sputtering was converted to water, which could be actively removed by the cryopump.
第3図はしきい値電圧とスパッタ時における水素分圧比
(PH/PtoTAL=H2/(H2+Ar))の関係
をグラフ化したものである。FIG. 3 is a graph showing the relationship between threshold voltage and hydrogen partial pressure ratio (PH/PtoTAL=H2/(H2+Ar)) during sputtering.
水素分圧比(P++/ProtAL−H2/(H2+A
r))と実施例番号の対応関係は表1の場合と同じであ
る。Hydrogen partial pressure ratio (P++/ProtAL-H2/(H2+A
The correspondence between r)) and the example numbers is the same as in Table 1.
しきい値電圧が低いほど薄膜トランジスタを動作させる
動作電圧、すなわちゲイト電圧が低くてよいことになり
、デバイスとしての良好な特性が得られることを考える
と、第3図の結果は、水素の分圧比の高い20%以上条
件のスパッタ法によって、スレッシュホールド電圧8V
以下のノーマリオフの状態を得ることができる。即ち、
チャネル形成領域となる第1図(a)の(13)に示さ
れるa−3i膜を得て、このa−3i膜を再結晶化させ
ることによって得られる微結晶珪素半導体層を用いたデ
バイス(本実施例では薄膜トランジスタ)は良好な電気
的特性を示すことがわかる。Considering that the lower the threshold voltage is, the lower the operating voltage for operating the thin film transistor, that is, the lower the gate voltage, and the better the characteristics of the device, the results shown in Figure 3 indicate that the partial pressure ratio of hydrogen is A threshold voltage of 8V is achieved by sputtering with a high 20% or higher condition.
The following normally off states can be obtained. That is,
A device using a microcrystalline silicon semiconductor layer ( It can be seen that the thin film transistor (in this example) exhibits good electrical characteristics.
a−3i膜を熱結晶化させた多結晶珪素半導体層のレー
ザラマンスペクトルを示したものである。第4図に表さ
れた表示記号と実施例番号およびスパッタ時の水素分圧
比との関係を第2表に示す。This figure shows a laser Raman spectrum of a polycrystalline silicon semiconductor layer obtained by thermally crystallizing an a-3i film. Table 2 shows the relationship between the display symbols shown in FIG. 4, the example numbers, and the hydrogen partial pressure ratio during sputtering.
第2表
表示記号 実施例番号 水素分圧
(41) 2 0%
(42) 3 20%
(43) 4 50%
(44) 1 100%第4図を見ると
曲線(42)に比較して曲線(43)、すなわちチャネ
ル形成領域(第1図(e)の(17))となるa−3i
半導体層を作製する際のスパッタ時における水素の分圧
比が0%の場合と100%の場合を比較すると、熱アニ
ールにより結晶化させた場合は、スパッタ時における水
素の分圧比が100%の場合のラマンスペクトルは顕著
にその結晶性を有し、かつその平均の結晶粒径は半値幅
より5〜400人代表的には100〜200人である。Table 2 Indication symbol Example number Hydrogen partial pressure (41) 2 0% (42) 3 20% (43) 4 50% (44) 1 100% Looking at Figure 4, the curve compared to curve (42) (43), that is, a-3i which becomes the channel forming region ((17) in FIG. 1(e))
Comparing cases where the partial pressure ratio of hydrogen during sputtering when producing a semiconductor layer is 0% and 100%, when crystallization is performed by thermal annealing, when the partial pressure ratio of hydrogen during sputtering is 100%. The Raman spectrum of has remarkable crystallinity, and its average crystal grain size is 5 to 400, typically 100 to 200, larger than the half width.
そして単結晶シリコンのピーク値の520cm −’よ
りも低波数側にずれ、明らかに格子歪を有する。このこ
とは本発明の特徴を顕著に示している。すなわち水素を
添加したスパッタ法によるa−3i膜の作製の効果は、
そのa−3i膜を熱結晶化させて初めて現れるものてあ
るということである。The wave number is shifted to a lower wave number than the peak value of 520 cm −' of single crystal silicon, and there is clearly lattice distortion. This clearly shows the feature of the present invention. In other words, the effect of producing the a-3i film by sputtering with hydrogen added is as follows:
This phenomenon appears only after the a-3i film is thermally crystallized.
このように格子歪を有すると、微結晶粒の互いか無理に
縮んでいるため、互いの結晶粒界での密接が強くなり、
結晶粒界でのキャリアにとってのエネルギバリアもそこ
での酸素等の不純物の偏析も発生しにくい。結果として
高いキャリア移動度を期待することができる。When there is lattice strain in this way, the microcrystalline grains are forcibly shrunk together, so the close contact between each other at the grain boundaries becomes strong,
Energy barriers for carriers at grain boundaries and segregation of impurities such as oxygen are less likely to occur there. As a result, high carrier mobility can be expected.
一般に電界効果トランジスタである薄膜トランジスタに
おいてドレイン電圧VDか低い場合、ドレイン電流ID
とドレイン電圧VDとの関係は以下の式によって表され
る。In general, in a thin film transistor which is a field effect transistor, when the drain voltage VD is low, the drain current ID
The relationship between VD and drain voltage VD is expressed by the following equation.
ID−(W/L) μC(VG−VT)VD(Soli
d、 5tate electronics、 Vol
、 24. No、 11. pp、 1059.19
81.Pr1nted in Br1tain)上式に
おいて、Wはチャンネル幅、Lはチャネル長、μはキャ
リアの移動度、Cはゲイト酸化膜の静電容量、VCはゲ
ート電圧、VTはしきい値電圧として定着している。ID-(W/L) μC(VG-VT)VD(Soli
d, 5tate electronics, Vol.
, 24. No, 11. pp, 1059.19
81. In the above equation, W is the channel width, L is the channel length, μ is the carrier mobility, C is the capacitance of the gate oxide film, VC is the gate voltage, and VT is the threshold voltage. There is.
上記スパッタ時における不活性気体としてはArを用い
たか、その他Heなどの他の不活性気体、ま】
たはSjH,,512Hsなどの反応性気体をプラズマ
化させたものを雰囲気気体の一部に添加して用いても良
い。本実施例のマグネ)・ロン型RFスパッタ法による
a−3i膜の成膜において、水素濃度は5〜100%、
成膜温度は室温〜500’Cの範囲、RF出力は500
1]z〜100GH7の範囲において、出力100W〜
10MWの範囲で任意に選ぶことができ、またパルスエ
ネルギー発信源と組み合わせてもよい。さらに強力な光
照射(波長100〜500nm以下)エネルギーを加え
て光スパッタを行ってもよい。Ar is used as the inert gas during the above sputtering, or other inert gas such as He, or reactive gas such as SjH, 512Hs, etc., which is made into plasma, is used as part of the atmospheric gas. It may be added and used. In the formation of the a-3i film by the Magnetoron type RF sputtering method in this example, the hydrogen concentration was 5 to 100%,
The film forming temperature ranges from room temperature to 500'C, and the RF output is 500°C.
1] In the range of z~100GH7, output 100W~
It can be arbitrarily selected within the range of 10 MW, and may be combined with a pulse energy source. Optical sputtering may be performed by applying more powerful light irradiation (wavelength: 100 to 500 nm or less) energy.
これは、水素という軽い原子をよりプラズマ化させ、ス
パッタリングに必要な正イオンを効率よく生成させて、
スパッタによって成膜される膜中に水素または水素原子
を均一に添加し、結果として酸素の混入を7X10I9
cF3以下、好ましくはlXl019cm−3以下にお
さえた半導体の成膜のためである。This turns light atoms called hydrogen into plasma and efficiently generates the positive ions needed for sputtering.
Hydrogen or hydrogen atoms are uniformly added to the film formed by sputtering, and as a result, oxygen contamination is reduced to 7X10I9.
This is for forming a semiconductor film with a concentration of cF3 or less, preferably lXl019cm-3 or less.
本発明は明細書において非晶質性の半導体膜を単にa−
3i膜として略記した。しかしこれはシリコン半導体を
主な半導体とするが、ゲルマニウム、5ixGe+−、
(Q<x<1)であってもよい。In the specification of the present invention, an amorphous semiconductor film is simply referred to as a-
It is abbreviated as 3i film. However, this mainly uses silicon semiconductors, but germanium, 5ixGe+-,
(Q<x<1).
これは真性半導体のみならずPまたはN型の半導体であ
ってもよい。This may be not only an intrinsic semiconductor but also a P or N type semiconductor.
また前記他の反応性気体を上記の手段に応用してもよい
。Further, the other reactive gases described above may be applied to the above means.
本発明の構成とすることによって、工業的に有用なスパ
ッタ法により得られた非単結晶半導体を熱結晶化させ多
結晶半導体を得る工程において、問題となる熱結晶化困
難の問題を解決することかでき、しかもこの多結晶半導
体層を用いて高性能な薄膜トランジスタを作製すること
かできた。By adopting the structure of the present invention, it is possible to solve the problem of difficulty in thermal crystallization in the process of thermally crystallizing a non-single crystal semiconductor obtained by an industrially useful sputtering method to obtain a polycrystalline semiconductor. Furthermore, it was possible to fabricate a high-performance thin film transistor using this polycrystalline semiconductor layer.
第1図は本実施例1〜6の作製工程を示す。
第2図は本実施例で作製した薄膜トランジスタの作製工
程において、チャネル形成領域となるaSi膜の作製時
に添加する水素の分圧比と本実施例で作製した薄膜トラ
ンジスタにおけるキャリアの移動度との関係を示したも
のである。
第3図は本実施例で作製した薄膜トランジスタの作製工
程において、チャネル形成領域となるaSi膜の作製時
に添加する水素の分圧比と、本実施例で作製した薄膜ト
ランジシタにおけるしきい値との関係を示したものであ
る。
第4図は本実施例において作製した多結晶珪素半導体の
ラマンスペクトルを示したものである。
(11)・
(12)・
(13)・
(14)・
(15)・
(16)・
(17)・
(S)・
(G)・
(D)・
ガラス基板
酸化珪素膜
微結晶半導体の活性層
n”a−3i膜
ゲート酸化膜
アルミ電極
チャネル形成領域
ソース電極
ゲイト電極
ドレイン電極FIG. 1 shows the manufacturing steps of Examples 1 to 6. Figure 2 shows the relationship between the partial pressure ratio of hydrogen added during the fabrication of the aSi film that will become the channel formation region and the carrier mobility in the thin film transistor fabricated in this example in the fabrication process of the thin film transistor fabricated in this example. It is something that Figure 3 shows the relationship between the partial pressure ratio of hydrogen added during the fabrication of the aSi film that will become the channel formation region and the threshold value in the thin film transistor fabricated in this example in the fabrication process of the thin film transistor fabricated in this example. This is what is shown. FIG. 4 shows the Raman spectrum of the polycrystalline silicon semiconductor produced in this example. (11), (12), (13), (14), (15), (16), (17), (S), (G), (D), activity of microcrystalline semiconductor with silicon oxide film on glass substrate Layer n''a-3i film Gate oxide film Aluminum electrode Channel formation region Source electrode Gate electrode Drain electrode
Claims (2)
の量の不活性気体の雰囲気を用い、また酸素濃度5×1
0^1^8cm^−^3以下の濃度の半導体ターゲット
を用いて基板上へスパッタ法による酸素濃度が7×10
^1^9cm^−^3以下の量を含有するアモルファス
半導体膜の成膜工程と、前記スパッタ法によって得たア
モルファス半導体膜を450〜700℃以下の温度で再
結晶化させる工程とを有することを特徴とする半導体作
製方法。(1) Using an atmosphere of hydrogen or an inert gas containing hydrogen in an amount of 20% or more and 80% or less, and an oxygen concentration of 5 × 1
The oxygen concentration is 7x10 by sputtering onto the substrate using a semiconductor target with a concentration of 0^1^8cm^-^3 or less.
A step of forming an amorphous semiconductor film containing an amount of ^1^9cm^-^3 or less, and a step of recrystallizing the amorphous semiconductor film obtained by the sputtering method at a temperature of 450 to 700°C or less. A semiconductor manufacturing method characterized by:
た半導体は格子歪を有し、かつ平均の結晶粒径が5〜4
00Åを有することを特徴とする半導体作製方法。(2) In claim 1, the recrystallized semiconductor has lattice strain and has an average crystal grain size of 5 to 4.
A method for manufacturing a semiconductor characterized by having a thickness of 00 Å.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2277134A JP3030366B2 (en) | 1990-10-15 | 1990-10-15 | Semiconductor fabrication method |
US07/774,852 US5210050A (en) | 1990-10-15 | 1991-10-11 | Method for manufacturing a semiconductor device comprising a semiconductor film |
US08/428,842 US5744818A (en) | 1990-10-15 | 1995-04-25 | Insulated gate field effect semiconductor device |
US09/037,984 US6448577B1 (en) | 1990-10-15 | 1998-03-11 | Semiconductor device with grain boundaries |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP2277134A JP3030366B2 (en) | 1990-10-15 | 1990-10-15 | Semiconductor fabrication method |
Related Child Applications (2)
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JP20692799A Division JP3160269B2 (en) | 1990-10-15 | 1999-07-21 | Method for manufacturing semiconductor device |
JP11206929A Division JP3142836B2 (en) | 1999-07-21 | 1999-07-21 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
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JPH04151819A true JPH04151819A (en) | 1992-05-25 |
JP3030366B2 JP3030366B2 (en) | 2000-04-10 |
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JP2277134A Expired - Lifetime JP3030366B2 (en) | 1990-10-15 | 1990-10-15 | Semiconductor fabrication method |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004086487A1 (en) * | 2003-03-26 | 2004-10-07 | Semiconductor Energy Laboratory Co. Ltd. | Semiconductor device and method for manufacturing same |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58199564A (en) * | 1982-05-17 | 1983-11-19 | Canon Inc | Semiconductor element |
JPS60117687A (en) * | 1983-11-30 | 1985-06-25 | Meidensha Electric Mfg Co Ltd | Solar battery |
JPS6431466A (en) * | 1987-07-27 | 1989-02-01 | Nippon Telegraph & Telephone | Forming method for silicon thin film for thin film transistor |
JPH01270310A (en) * | 1988-04-22 | 1989-10-27 | Seiko Epson Corp | Manufacture of semiconductor |
JPH01308018A (en) * | 1988-06-07 | 1989-12-12 | Nkk Corp | Semiconductor thin film material and manufacture thereof |
-
1990
- 1990-10-15 JP JP2277134A patent/JP3030366B2/en not_active Expired - Lifetime
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58199564A (en) * | 1982-05-17 | 1983-11-19 | Canon Inc | Semiconductor element |
JPS60117687A (en) * | 1983-11-30 | 1985-06-25 | Meidensha Electric Mfg Co Ltd | Solar battery |
JPS6431466A (en) * | 1987-07-27 | 1989-02-01 | Nippon Telegraph & Telephone | Forming method for silicon thin film for thin film transistor |
JPH01270310A (en) * | 1988-04-22 | 1989-10-27 | Seiko Epson Corp | Manufacture of semiconductor |
JPH01308018A (en) * | 1988-06-07 | 1989-12-12 | Nkk Corp | Semiconductor thin film material and manufacture thereof |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004086487A1 (en) * | 2003-03-26 | 2004-10-07 | Semiconductor Energy Laboratory Co. Ltd. | Semiconductor device and method for manufacturing same |
JPWO2004086487A1 (en) * | 2003-03-26 | 2006-06-29 | 株式会社半導体エネルギー研究所 | Semiconductor device and manufacturing method thereof |
US7554117B2 (en) | 2003-03-26 | 2009-06-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US7955910B2 (en) | 2003-03-26 | 2011-06-07 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
JP4869601B2 (en) * | 2003-03-26 | 2012-02-08 | 株式会社半導体エネルギー研究所 | Semiconductor device and manufacturing method of semiconductor device |
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JP3030366B2 (en) | 2000-04-10 |
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