JPH04115551A - Manufacturing apparatus for semiconductor - Google Patents
Manufacturing apparatus for semiconductorInfo
- Publication number
- JPH04115551A JPH04115551A JP2236177A JP23617790A JPH04115551A JP H04115551 A JPH04115551 A JP H04115551A JP 2236177 A JP2236177 A JP 2236177A JP 23617790 A JP23617790 A JP 23617790A JP H04115551 A JPH04115551 A JP H04115551A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- inert gas
- gas
- tube
- produced
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 239000004065 semiconductor Substances 0.000 title claims description 12
- 239000011261 inert gas Substances 0.000 claims abstract description 20
- 239000007789 gas Substances 0.000 claims abstract description 11
- 239000000853 adhesive Substances 0.000 claims description 5
- 230000001070 adhesive effect Effects 0.000 claims description 5
- 235000012431 wafers Nutrition 0.000 claims 3
- 239000000463 material Substances 0.000 abstract description 4
- 239000012790 adhesive layer Substances 0.000 description 8
- 230000000694 effects Effects 0.000 description 3
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
Landscapes
- Dicing (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、紫外線硬化型ウェハー貼付シートにおける
ウェハー接着層の硬化を良好に進めるための半導体製造
装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a semiconductor manufacturing apparatus for favorably curing a wafer adhesive layer in an ultraviolet curable wafer adhesive sheet.
第2図は、従来の紫外線硬化型ウェハー貼付シートのウ
ェハー接着層の硬化に関する半導体製造装置を示す断面
図であり、図において、1はウェハー、2はこのウェハ
ー1を接着するウェハー貼付シート、3はこのウェハー
貼付シート2を支持する固定材、4はこの固定材3を載
置して保持するレールである。一方、5は上記レール4
の四隅を囲むようにその上方に配置された外カバー、6
はこの外カバー5に支持固定された内カバー、7はこの
内カバー6の下部に支持固定され多数の孔を持った多孔
板、8は上記外カバー5の側面に取付けられた継手、9
はこの継手8に装着されその先端9aが上記内カバー6
内に臨んでいる不活性ガス導入チューブである。FIG. 2 is a sectional view showing a semiconductor manufacturing apparatus for curing the wafer adhesive layer of a conventional ultraviolet curable wafer adhesive sheet. 4 is a fixing member that supports this wafer pasting sheet 2, and 4 is a rail on which this fixing member 3 is placed and held. On the other hand, 5 is the rail 4 above.
an outer cover placed above the four corners of the 6
7 is an inner cover supported and fixed to the outer cover 5; 7 is a perforated plate with a large number of holes supported and fixed to the lower part of the inner cover 6; 8 is a joint attached to the side surface of the outer cover 5; 9;
is attached to this joint 8, and its tip 9a is attached to the inner cover 6.
This is the inert gas introduction tube facing inside.
次に動作について説明する。ダイシング済みのウェハー
1を貼付けたウェハー貼付シート2を取付けた固定材3
を図のようにレール4上に載せる。Next, the operation will be explained. Fixing material 3 to which wafer pasting sheet 2 to which diced wafer 1 is pasted is attached
Place it on the rail 4 as shown in the figure.
そして一体となって上下動可能な5〜9を下降し、レー
ル4上の固定材3上面と内力バー6下面とに適切な隙間
Cをあけて停止させてのち、上記導入チューブ9を通し
て不活性ガスを内カバー6と多孔板7の間に導いてこの
多孔板7の孔よりウェハー1及びウェハー貼付シート2
上に吹付ける。そしてその状態を保持したまま、一方、
ウェハー貼付シート2下面より紫外線lOを照射してウ
ェハー接着層の硬化を行うものである。Then, the parts 5 to 9, which can move up and down, are lowered together, and stopped with an appropriate gap C between the upper surface of the fixing member 3 on the rail 4 and the lower surface of the internal force bar 6, and then passed through the introduction tube 9 into the inert Gas is introduced between the inner cover 6 and the perforated plate 7, and the wafer 1 and the wafer pasting sheet 2 are passed through the holes of the perforated plate 7.
Spray on top. And while maintaining that state,
The wafer adhesive layer is cured by irradiating ultraviolet rays from the bottom surface of the wafer adhesive sheet 2.
従来の紫外線硬化型ウェハー貼付シートの接着層を硬化
させる工程の半導体製造装置は、以上−のように構成さ
れているが、硬化時に接着層より発生するガスがウェハ
ー表面に付着するのを完全に防ぐことができず、このた
め樹脂等でパッケージ後、樹脂との接着度が低下したり
、電気的不良を起こす等の問題点があった。Semiconductor manufacturing equipment for the process of curing the adhesive layer of a conventional ultraviolet curable wafer adhesive sheet is configured as described above, but it completely prevents the gas generated from the adhesive layer during curing from adhering to the wafer surface. Therefore, after packaging with resin or the like, there are problems such as a decrease in the degree of adhesion with the resin and electrical failure.
この発明は上記のような問題点を解消すためになされた
もので、硬化時に接着層より発生するガスがウェハー表
面に付着するのを完全に防ぐことができ、高品質の歩留
りの高い半導体製造装置を得る事を目的とする。This invention was made to solve the above-mentioned problems, and it can completely prevent the gas generated from the adhesive layer during curing from adhering to the wafer surface, allowing for high-quality and high-yield semiconductor manufacturing. The purpose is to obtain equipment.
この発明に係る半導体製造装置は、内外2つの環状の円
錐形カバーを配置し、硬化時に発生したカスの流れを、
ウェハーセンターより周辺部へ放射状に流して外側チャ
ンバーに導き、外部カバーに設けた排出チューブより上
方へ排気するようにしたものである。The semiconductor manufacturing apparatus according to the present invention has two annular conical covers, an inner and outer cover, to prevent the flow of debris generated during curing.
It is designed to flow radially from the wafer center to the periphery, lead to an outer chamber, and be exhausted upward from an exhaust tube provided on the outer cover.
この発明における半導体製造装置は、硬化時に接着層よ
り発生するガスを、不活性ガスと共に外側チャンバーを
通して、排出チューブへ完全に回収、排気できる。The semiconductor manufacturing apparatus according to the present invention can completely collect and exhaust the gas generated from the adhesive layer during curing into the exhaust tube through the outer chamber together with the inert gas.
以下、この発明の一実施例を図について説明する。第1
図において、1〜4,10は上記従来例と同様であり、
11は上部円筒部11aと下部円錐部11bを有する外
カバー、12はこの外カバー11の内部に配置され上部
円筒部12aと下部円錐部+2bを有する内カバーで、
不活性ガス導入チューブ9が連結されている。7はこの
内カバー12の下面に取付けられた多孔板である。また
13は上記外カバー11の上部に連結された不活性ガス
排出チューブである。An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, 1 to 4 and 10 are the same as the above conventional example,
11 is an outer cover having an upper cylindrical part 11a and a lower conical part 11b; 12 is an inner cover disposed inside the outer cover 11 and having an upper cylindrical part 12a and a lower conical part +2b;
An inert gas introduction tube 9 is connected. 7 is a perforated plate attached to the lower surface of this inner cover 12. Further, 13 is an inert gas exhaust tube connected to the upper part of the outer cover 11.
次に動作について説明する。ダイシング済みのウェハー
1を貼付けたウェハー貼付シート2を取付けな固定材3
をレール4上に載せる。一方、−体となって上下動可能
な7,9,11,12.13を下降させ、チューブ9よ
り不活性ガスを内カバーのチャンバー121内に導入し
、この内部の空間を介して多孔板7の孔よりウェハーの
センターから周辺方向へ放射状に不活性ガスを吹付けて
外側チャンバー111へ導入し、それとともに上記排出
チューブ13より吸引する。そしてその状態を保持した
まま、ウェハー貼付シート2の下方より紫外線IOを照
射して接着層を硬化させ、その時の発生ガスを不活性ガ
スとともに排出チューブ13より排出する。Next, the operation will be explained. Attach the wafer pasting sheet 2 with the diced wafer 1 pasted to the fixing material 3
Place it on rail 4. On the other hand, 7, 9, 11, 12, and 13, which are movable up and down as a body, are lowered, and inert gas is introduced into the chamber 121 of the inner cover from the tube 9, and the porous plate is Inert gas is blown radially from the center of the wafer toward the periphery through the hole 7 and introduced into the outer chamber 111, and at the same time is sucked through the discharge tube 13. Then, while maintaining this state, ultraviolet rays are irradiated from below the wafer pasting sheet 2 to harden the adhesive layer, and the gas generated at that time is discharged from the discharge tube 13 together with the inert gas.
以上のようにこの発明によれば、硬化時の発生ガスを周
辺部へ向けて放射状に吹付けた不活性ガスとともに排出
できるように構成したので、発生したガスがウェハー表
面に付着するのを完全に防ぐことができ、高品質の歩留
りの高い半導体製造装置が得られる効果がある。As described above, according to the present invention, the gas generated during curing can be discharged together with the inert gas radially blown toward the periphery, thereby completely preventing the gas generated from adhering to the wafer surface. This has the effect of providing a high-quality, high-yield semiconductor manufacturing device.
第1図はこの発明の一実施例による半導体製造装置を示
す断面図、第2図は従来の半導体製造装置を示す断面図
である。
図中、1はウェハー、2はウェハー貼付シート、3は固
定材、4はレール、7は多孔板、9は不活性ガス導入チ
ューブ、lOは紫外線、11は外カバー12は内カバー
、13は不活性ガス排出チューブである。
なお、図中同一符号は同−又は相当部分を示す。FIG. 1 is a sectional view showing a semiconductor manufacturing apparatus according to an embodiment of the present invention, and FIG. 2 is a sectional view showing a conventional semiconductor manufacturing apparatus. In the figure, 1 is a wafer, 2 is a wafer pasting sheet, 3 is a fixing material, 4 is a rail, 7 is a perforated plate, 9 is an inert gas introduction tube, 1O is an ultraviolet ray, 11 is an outer cover 12 is an inner cover, 13 is a This is an inert gas exhaust tube. Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
紫外線硬化型ウエハー貼付シートに貼付け、その上方よ
り多孔板を介して不活性ガスを吹付け、下方より紫外線
を照射して上記シートのウエハーとの接着層を硬化させ
るようにしたものにおいて、同心円状に内外2つの環状
の円錐形カバーを備え、その内カバーに不活性ガス導入
チューブを、外カバーに同排出チューブを連結し、内側
のチャンバー部に不活性ガスを導入し、これを下方へ放
射状に吹付けて外側のチャンバー部に流入させ、上記排
出チューブより発生ガスと共に外部へ排気可能としたこ
とを特徴とする半導体製造装置。In the semiconductor manufacturing process, diced wafers are pasted on an ultraviolet-curable wafer adhesive sheet, inert gas is sprayed from above through a perforated plate, and ultraviolet rays are irradiated from below to bond the sheet to the wafer. In a device designed to harden the layer, it is equipped with two concentric annular conical covers, an inner and outer ring, an inert gas introduction tube is connected to the inner cover, an inert gas discharge tube is connected to the outer cover, and an inner chamber is connected to the inert gas inlet tube. A semiconductor manufacturing apparatus characterized in that an inert gas is introduced and radially blown downward to flow into an outer chamber portion, and can be exhausted to the outside together with the generated gas through the exhaust tube.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23617790A JPH07123115B2 (en) | 1990-09-05 | 1990-09-05 | Semiconductor manufacturing equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23617790A JPH07123115B2 (en) | 1990-09-05 | 1990-09-05 | Semiconductor manufacturing equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04115551A true JPH04115551A (en) | 1992-04-16 |
JPH07123115B2 JPH07123115B2 (en) | 1995-12-25 |
Family
ID=16996911
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23617790A Expired - Lifetime JPH07123115B2 (en) | 1990-09-05 | 1990-09-05 | Semiconductor manufacturing equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07123115B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6401317B1 (en) | 1996-09-13 | 2002-06-11 | Fujitsu Limited | Apparatus for fabricating a semiconductor device |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4674070B2 (en) * | 2003-11-12 | 2011-04-20 | 積水化学工業株式会社 | Manufacturing method of semiconductor chip |
JP2005191532A (en) * | 2003-11-12 | 2005-07-14 | Sekisui Chem Co Ltd | Production process of semiconductor chip |
-
1990
- 1990-09-05 JP JP23617790A patent/JPH07123115B2/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6401317B1 (en) | 1996-09-13 | 2002-06-11 | Fujitsu Limited | Apparatus for fabricating a semiconductor device |
US6475881B1 (en) | 1996-09-13 | 2002-11-05 | Fuji-Su Limited | Fabrication process of a semiconductor device including a dicing process of a semiconductor wafer |
US7279402B2 (en) | 1996-09-13 | 2007-10-09 | Fujitsu Limited | Method for fabricating a semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPH07123115B2 (en) | 1995-12-25 |
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