JPH0396194A - Dc feeding system and phantom feeding system - Google Patents
Dc feeding system and phantom feeding systemInfo
- Publication number
- JPH0396194A JPH0396194A JP1233648A JP23364889A JPH0396194A JP H0396194 A JPH0396194 A JP H0396194A JP 1233648 A JP1233648 A JP 1233648A JP 23364889 A JP23364889 A JP 23364889A JP H0396194 A JPH0396194 A JP H0396194A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- current
- mirror
- circuit
- feeding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004804 winding Methods 0.000 claims abstract description 6
- 230000000694 effects Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 5
- 230000005856 abnormality Effects 0.000 description 3
- 238000001514 detection method Methods 0.000 description 2
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 1
- 208000003028 Stuttering Diseases 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000010992 reflux Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔概 要〕
ごラー回路を用いたファントム給電系等に関し、通常給
電と過電流保護とを単一の回路の中に実現することを目
的とし、
直流電源と被給電部との間にミラー回路を設け、給電電
流をミラー設定電流以内に設定し、給電異常時の電流を
ミラー設定電流止まりにして構威し、ＩＳＤＮＯ網終端
装置からディジタル端末装置へ給電するファントム給電
系において、前記網終端装置の２つのトランスの回線接
続側巻線の中点と直流電源との間にミラー回路を設け、
給電電流をミラー設定電流以内に設定し、給電異常時の
電流をミラー設定電流止まりにして構威した。[Detailed Description of the Invention] [Summary] The purpose of this invention is to realize normal power supply and overcurrent protection in a single circuit regarding a phantom power supply system using a conventional circuit. A phantom power supply system that supplies power from the ISDNO network termination equipment to the digital terminal equipment by providing a mirror circuit between the ISDNO network terminal equipment and the digital terminal equipment, setting the power supply current within the mirror setting current, and setting the current at the time of a power supply abnormality to the mirror setting current. In the system, a mirror circuit is provided between the midpoint of the line connection side windings of the two transformers of the network termination device and the DC power supply,
The power supply current was set within the mirror setting current, and the current in the event of a power supply failure stopped at the mirror setting current.
本発明は、ミラー回路を用いたファントム給電系等に関
する．
ＩＳＤＮ（ディジタル統合サービス通信綱）のＳ点イン
タフェースにおける給電方式と，して、第４図に示すよ
うなファントム給電系が用いられている。この給電系は
、ＴＥ（ディジタル端末装置）１０内のトランス１２及
びトランス１４へ２本のペア線１０８．１１０を介して
接続されるＩＳＤＮのＮＴ（網終端装置）８内のトラン
ス１２及びトランス１４のペア線接続側の両中点との間
に、直流給電回路１１８を接続して通常の通信が行なわ
れる前記各ペア線１０８，１１０を介して単一の直流電
力給電系をＮＴ８からＴＥＩＯへ形成してＴＥＩＯへ給
電しようとするものである。その給電電力は、ＮＴＢ側
においてＩＷ以上で、電圧は４０ボルト＋５％，４０ボ
ルト−２ ０％と規定されている。第４図において、Ａ
，Ｂ、及びＣ、Ｄ１並びに−ａ，ｂ，及びｃ，ｄは、そ
れぞれＮＴＢ側、並びにＴＥＩＯ側のペア線１０８，及
びベア線１１０に接続する端子を示す。The present invention relates to a phantom power supply system using a mirror circuit. As a power supply system at the S-point interface of ISDN (Integrated Services Digital Network), a phantom power supply system as shown in FIG. 4 is used. This power supply system includes a transformer 12 and a transformer 14 in an ISDN NT (Network Termination Equipment) 8 which are connected to a transformer 12 and a transformer 14 in a TE (Digital Terminal Equipment) 10 via two pair wires 108 and 110. A single DC power supply system is connected from the NT8 to the TEIO via each pair of wires 108 and 110, where normal communication is performed by connecting a DC power supply circuit 118 between both midpoints of the pair line connection side. It is intended to form a power supply and supply power to the TEIO. The supplied power is IW or higher on the NTB side, and the voltage is specified as 40 volts + 5% and 40 volts - 20%. In Figure 4, A
, B, C, D1 and -a, b, c, d indicate terminals connected to the pair wire 108 and bare wire 110 on the NTB side and the TEIO side, respectively.
従来の前記単一の直流電力給電系を構戒する直流給電回
路１１８は、第５図に示すように、ＮＰＮ型トランジス
タ１２０、ツェナーダイオード１２２及び抵抗１２４，
１２６から或る通常給電のための回路１２７と、過電流
検出回路１２８、ホトカプラ１３０及び抵抗１３２から
戒る過電流保護回路１３３とから構威されている。端子
１３４、１３６は、前記ＮＴ（網終端装置）８内のトラ
ンスｌ２及びトランス１４の両中点との間に接続され、
端子１３８．１４０は直流電源へ接続される。As shown in FIG. 5, the DC power supply circuit 118 that constitutes the conventional single DC power supply system includes an NPN transistor 120, a Zener diode 122, a resistor 124,
126, a circuit 127 for normal power supply, and an overcurrent protection circuit 133, which includes an overcurrent detection circuit 128, a photocoupler 130, and a resistor 132. The terminals 134 and 136 are connected between the transformer l2 in the NT (network termination device) 8 and the midpoint of the transformer 14,
Terminals 138, 140 are connected to a DC power source.
この直流給電回路１１８における通常給電は、回路１２
７によって生ぜしめられており、その給電中に前記ペア
線１０８，１１０の接地、ＴＥＩＯの故障、又は消費電
力の大きいＴＥＩＯの接続時の前記回路１２７に対する
保護を前記過電流保護回路１３３によって行なう。The normal power supply in this DC power supply circuit 118 is the circuit 12
7, and the overcurrent protection circuit 133 protects the circuit 127 when the pair wires 108 and 110 are grounded during power supply, when a TEIO fails, or when a TEIO with large power consumption is connected.
前記直流給電回路１１８は、ＴＥＩＯへの通常の給電及
び回路１２７に対する保護の目的も達成することは出来
るが、過電流検出回路１２８を構或する部品点数が多く
、更に過電流保・護回路１３３を構戒するのにホトカプ
ラ１３０及び抵抗ｌ３２を必要とし、嵩高となって高密
度実装阻害因子となるほか、部品点数が多くなることか
らコスト高となる。Although the DC power supply circuit 118 can achieve the purpose of normal power supply to the TEIO and protection of the circuit 127, the overcurrent detection circuit 128 has a large number of components, and the overcurrent protection/protection circuit 133 A photocoupler 130 and a resistor 132 are required to prevent this, which increases the bulk and impedes high-density mounting, and increases the cost due to the increased number of parts.
本発明は、斯かる問題点に鑑みて創作されたもので、通
常給電と過電流保護とを単一の回路の中に実現し得る直
流給電系及びファトム給電系を提供することをその目的
とする。The present invention was created in view of such problems, and its purpose is to provide a DC power supply system and a fathom power supply system that can realize normal power supply and overcurrent protection in a single circuit. do.
第１図は本発明の原理ブロック図を示す。第１の発明は
、第１図（その１）に示すように、直流電源２と被給電
部４との間にミラー回路６を設け、給電電流をミラー設
定電流以内に設定し、給電異常時の電流をミラー設定電
流止まりにして構威される。第２の発明は、第１図（そ
の２）に示すように、ＩＳＤＮの網終端装置８からディ
ジタル端末装置１０へ給電するファントム給電系におい
て、前記網終端装置８の２つのトランス１２．１４の回
線接続側巻線の中点と直流電源２との間にミラ一回路６
を設け、給電電流をミラー設定電流以内に設定し、給電
異常時の電流をミラー設定電流止まりにして構威される
。FIG. 1 shows a block diagram of the principle of the present invention. As shown in FIG. 1 (part 1), the first invention provides a mirror circuit 6 between the DC power supply 2 and the powered part 4, sets the power supply current within the mirror setting current, and when the power supply is abnormal, It is possible to set the current at the mirror setting current limit. As shown in FIG. 1 (part 2), the second invention is a phantom power supply system that supplies power from an ISDN network termination device 8 to a digital terminal device 10, in which two transformers 12 and 14 of the network termination device 8 are connected to each other. A mirror circuit 6 is connected between the midpoint of the winding on the line connection side and the DC power supply 2.
is provided, the power supply current is set within the mirror setting current, and the current at the time of power supply abnormality is set to the mirror setting current.
直流電源２と被給電部４との間に、又は網終端装置のト
ランス１２．１４の回線接続側巻線の中点と直流電源２
との間にミラー回路６を設けたので、通常の給電時にお
いてはその給電系に設定された給電電流が被給電部４、
又はディジタル端末装置１０へ給電される。接地等の給
電異常が発生すると、過電流が流れようとするが、その
電流はミラー回路６のミラー効果によりミラー設定電流
で止まる．
従って、通常の給電及び過電流保護機能が、ミラー回路
６の中に一体に形成されているから、給電回路の小型化
となる。高密度実装、低コスト化に役立つ。Between the DC power source 2 and the powered part 4, or between the midpoint of the line connection side winding of the transformer 12.14 of the network termination device and the DC power source 2
Since a mirror circuit 6 is provided between the parts 4 and 4, during normal power supply, the power supply current set in the power supply system is applied to
Alternatively, power is supplied to the digital terminal device 10. When a power supply abnormality such as grounding occurs, an overcurrent tries to flow, but the current stops at the mirror setting current due to the mirror effect of the mirror circuit 6. Therefore, since the normal power supply and overcurrent protection functions are integrally formed in the mirror circuit 6, the power supply circuit can be miniaturized. Useful for high-density mounting and cost reduction.
第２図は本発明の一実施例を示す。この図において、６
はミラー回路である。ｌＯはＴＥである。FIG. 2 shows an embodiment of the invention. In this figure, 6
is a mirror circuit. lO is TE.
Ａ，Ｂ，Ｃ，Ｄは、第４図で説明したものと同じであり
、その説明は繰り返さない。A, B, C, and D are the same as those explained in FIG. 4, and the explanation thereof will not be repeated.
ミラー回路６は、ＮＰＮ型トランジスタ２０，２２、及
び抵抗２４，２６．２８から威る。このミラー回路６の
端子３０は第４図のトランス１２の中点に、又端子３２
は４０ボルトの直流電源のマイナス端子に、それぞれ接
続される。トランス１４の中点は４０ボルトの直流電源
のプラス端子に接続される。又、ＴＥＩＯの等価抵抗値
Ｒ７は抵抗（エミッタ抵抗）２８の抵抗値Ｒ２より十分
大きい値に設定される。前記ミラー回路６のミラー比は
抵抗２６の抵抗値Ｒ＋ と抵抗２８の抵抗値Ｒ２との比
によって与えられる．
前記構成の本発明ファントム給電方式の動作を説明する
。The mirror circuit 6 consists of NPN transistors 20, 22 and resistors 24, 26, 28. The terminal 30 of this mirror circuit 6 is located at the midpoint of the transformer 12 in FIG.
are each connected to the negative terminal of a 40 volt DC power supply. The midpoint of transformer 14 is connected to the positive terminal of a 40 volt DC power supply. Further, the equivalent resistance value R7 of TEIO is set to a value sufficiently larger than the resistance value R2 of the resistor (emitter resistance) 28. The mirror ratio of the mirror circuit 6 is given by the ratio between the resistance value R+ of the resistor 26 and the resistance value R2 of the resistor 28. The operation of the phantom power supply system of the present invention having the above configuration will be explained.
ＴＥＩＯの等価抵抗値Ｒ７は、ＮＰＮ型トランジスタ２
２の工′ミッタ抵抗２８の抵抗値Ｒ２より十分大きく設
定されているので、ＴＥＩＯがペア線１０８，１１０を
介して端子Ａ，Ｂと端子Ｃ、Ｄとの間に接続されると、
ＮＰＮ型トランジスタ２２はオンとなり、エミッタ抵抗
２８の抵抗値Ｒ２、ＴＥＩＯの等価抵抗値Ｒ，及びペア
線１０８，１１０の抵抗値Ｒ，と、電源電圧（−４０ボ
ルト）とによって決まる給電電流（■，）が、直流電源
と、ＴＥＩＯとの間に介在するＮＰＮ型トランジスタ２
２を経て還流する。この給電電流（１．）は、又ＮＰＮ
型トランジスタ２０を経て通電設定されているミラー設
定電流値（■。）より小さい値とされる。この通常給電
の給電状態が、第３図に示されており、その通常給電の
範囲は第３図の（１）である。The equivalent resistance value R7 of TEIO is the NPN type transistor 2
Since the resistance value R2 of the transmitter resistor 28 is set sufficiently larger than the resistance value R2 of the second transmitter resistor 28, when TEIO is connected between the terminals A, B and the terminals C, D via the pair wires 108, 110,
The NPN transistor 22 is turned on, and the power supply current (■ ) is the NPN transistor 2 interposed between the DC power supply and the TEIO.
2 and reflux. This feeding current (1.) is also NPN
This value is smaller than the mirror setting current value (■.) which is set to be energized through the type transistor 20. The power supply state of this normal power supply is shown in FIG. 3, and the range of the normal power supply is (1) in FIG. 3.
この給電が続行されている最中に、例えばペア線１０８
，１１０に接地が生じたとすると、この接地により、前
記給電電流（■，）より大きな電流が流れようとするが
、その電流の増大はごラー回路６の主ラー効果により、
前記ミラー比によって決まる前記【ラー設定電流値（Ｉ
０）までとなる。つまり、ＮＰＮ型トランジスタ２２は
、前記接地により流れようとする過電流から保護される
。While this power supply is being continued, for example, the pair wire 108
, 110, a current larger than the supply current (■,) will flow due to this grounding, but the increase in current is due to the main error effect of the error circuit 6.
The [r setting current value (I) determined by the mirror ratio
0). In other words, the NPN transistor 22 is protected from overcurrent that tends to flow due to the grounding.
この制限給電の給電状態が、第３図に示されており、そ
の制限給電の範囲は第３図の（ＩＩ）である。The power supply state of this limited power supply is shown in FIG. 3, and the range of the limited power supply is (II) in FIG. 3.
なお、第３図において、斜線の範囲内は、ＴＥ４の受電
電圧（ボルト）が最低給電電圧（２４ボルト）になる場
合の給電状態を図示している。その最低給電電圧におけ
る給電電流（１１ ）は、前記規定の下において１（Ｗ
）／２４（ボルト）＝４１． ７ （ｍＡ）である。In addition, in FIG. 3, the area within the shaded area shows the power supply state when the power reception voltage (volts) of the TE 4 becomes the lowest power supply voltage (24 volts). The supply current (11) at the lowest supply voltage is 1 (W
)/24 (volts) = 41. 7 (mA).
なお、前記実施例においては、ＮＰＮ型トランジスタ２
２１個でディジタル端末装置への給電を賄う例を示した
が、ＮＰＮ型トランジスタ２２１個でディジタル端末装
置への給電容量が足りない場合には、ＮＰＮ型トランジ
スタ２２及び抵抗２８と並列にＮＰＮ型トランジスタ及
び抵抗を接続し、トランジスタのベースをＮＰＮ型トラ
ンジスタ２０のベースに接続すればよい。Note that in the above embodiment, the NPN transistor 2
Although we have shown an example in which 221 NPN transistors cover the power supply to the digital terminal device, if 221 NPN transistors do not have enough power supply capacity to the digital terminal device, an NPN transistor is connected in parallel with the NPN transistor 22 and the resistor 28. and a resistor, and the base of the transistor may be connected to the base of the NPN transistor 20.
〔発明の効果〕
以上述べたところから明らかなように本発明によれば、
前述のようにミラー回路を用いてファントム給電系等を
構威したから、通常給電回路の中に過電流保護回路が一
体に構成され得るので、給電回路の小型化となり、実装
の高密度化に寄与する。又、給電回路の低廉化となる。[Effects of the Invention] As is clear from the above, according to the present invention,
As mentioned above, since the mirror circuit is used to construct a phantom power supply system, the overcurrent protection circuit can be integrated into the normal power supply circuit, which makes the power supply circuit smaller and allows for higher packaging density. Contribute. Moreover, the cost of the power supply circuit can be reduced.
第１図は本発明の原理ブロック図、
第２図は本発明の一実施例を示す図、
第３図は本発明の給電特性を示す図、
第４図はファントム給電系を示す図、
第５図はファントム給電における従来の給電回路を示す
図である．
第１図、第２図及び第４図において、
２は直流電源、
４は被給電部、
６はミラー回路、
８は網終端装置、
１０はディジタル端末装置、
１２．１４はトランスである。
４ｔデシ日月の一笑考５例
第２図
お昼綱の給電持性乞ホ１図
第３図
（吃のり
（をの２）
′４−Ｚ臂θ月め原ｉ，１ブ０．７ク図第１図
ファ冫Ｆムｋ＠ ｔ＝あ−７シ１９のμ凶乞回路第５図Fig. 1 is a block diagram of the principle of the present invention; Fig. 2 is a diagram showing an embodiment of the present invention; Fig. 3 is a diagram showing the power supply characteristics of the present invention; Fig. 4 is a diagram showing a phantom power supply system; Figure 5 shows a conventional power supply circuit for phantom power supply. In FIGS. 1, 2, and 4, 2 is a DC power supply, 4 is a powered section, 6 is a mirror circuit, 8 is a network termination device, 10 is a digital terminal device, and 12.14 is a transformer. 4t decimal day and moon 5 examples Fig. 2 Lunch rope power supply 1 Fig. 3 (Stuttering (2) Figure 1 Fm k @ t=A-7shi19's µ evil circuit Figure 5
Claims (2)
回路（６）を設け、給電電流をミラー設定電流以内に設
定し、給電異常時の電流をミラー設定電流止まりにした
ことを特徴とする直流給電系。(1) A mirror circuit (6) was installed between the DC power supply (2) and the powered part (4), the power supply current was set within the mirror setting current, and the current in the event of a power supply error stopped at the mirror setting current. A DC power supply system characterized by:
装置（１０）へ給電するファントム給電系において、 前記網終端装置（８）の２つのトランス（１２、１４）
の回線接続側巻線の中点と直流電源（２）との間にミラ
ー回路（６）を設け、給電電流をミラー設定電流以内に
設定し、給電異常時の電流をミラー設定電流止まりにし
たことを特徴とするファントム給電系。(2) In a phantom power supply system that supplies power from an ISDN network termination device (8) to a digital terminal device (10), two transformers (12, 14) of the network termination device (8)
A mirror circuit (6) was installed between the midpoint of the winding on the line connection side and the DC power supply (2), and the power supply current was set within the mirror setting current, and the current in the event of a power supply failure stopped at the mirror setting current. The phantom power supply system is characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1233648A JPH0396194A (en) | 1989-09-08 | 1989-09-08 | Dc feeding system and phantom feeding system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1233648A JPH0396194A (en) | 1989-09-08 | 1989-09-08 | Dc feeding system and phantom feeding system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0396194A true JPH0396194A (en) | 1991-04-22 |
Family
ID=16958337
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1233648A Pending JPH0396194A (en) | 1989-09-08 | 1989-09-08 | Dc feeding system and phantom feeding system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0396194A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8113920B2 (en) | 2004-10-19 | 2012-02-14 | Gerhard Gissing | Cut-off wheel comprising a double core clamping device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS611193A (en) * | 1984-06-14 | 1986-01-07 | Fujitsu Ltd | Grounding protection circuit |
| JPS6242661A (en) * | 1985-08-20 | 1987-02-24 | Fujitsu Ltd | Feeding electric current limit circuit |
| JPS62293932A (en) * | 1986-06-10 | 1987-12-21 | 富士通株式会社 | Current limiting circuit |
-
1989
- 1989-09-08 JP JP1233648A patent/JPH0396194A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS611193A (en) * | 1984-06-14 | 1986-01-07 | Fujitsu Ltd | Grounding protection circuit |
| JPS6242661A (en) * | 1985-08-20 | 1987-02-24 | Fujitsu Ltd | Feeding electric current limit circuit |
| JPS62293932A (en) * | 1986-06-10 | 1987-12-21 | 富士通株式会社 | Current limiting circuit |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8113920B2 (en) | 2004-10-19 | 2012-02-14 | Gerhard Gissing | Cut-off wheel comprising a double core clamping device |
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