JPH0376796B2 - - Google Patents
Info
- Publication number
- JPH0376796B2 JPH0376796B2 JP4977285A JP4977285A JPH0376796B2 JP H0376796 B2 JPH0376796 B2 JP H0376796B2 JP 4977285 A JP4977285 A JP 4977285A JP 4977285 A JP4977285 A JP 4977285A JP H0376796 B2 JPH0376796 B2 JP H0376796B2
- Authority
- JP
- Japan
- Prior art keywords
- adhesive layer
- substrates
- substrate
- gap
- conductive path
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000758 substrate Substances 0.000 claims description 45
- 239000012790 adhesive layer Substances 0.000 claims description 30
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 18
- 239000010410 layer Substances 0.000 claims 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 11
- 239000011889 copper foil Substances 0.000 description 11
- 238000004080 punching Methods 0.000 description 7
- 229920001721 polyimide Polymers 0.000 description 5
- 239000004642 Polyimide Substances 0.000 description 4
- 125000006850 spacer group Chemical group 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000005452 bending Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 229920003002 synthetic resin Polymers 0.000 description 1
- 239000000057 synthetic resin Substances 0.000 description 1
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
- Combinations Of Printed Boards (AREA)
Description
【発明の詳細な説明】
(イ) 産業上の利用分野
本発明は混成集積回路、特に高密度集積化に適
合した混成集積回路の改良に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to hybrid integrated circuits, and particularly to improvements in hybrid integrated circuits suitable for high-density integration.
(ロ) 従来の技術
従来の混成集積回路は第６図、第７図に示す如
く、金属基板２１はアルミニウムで形成され、前
記基板２１の折曲部分となる中央部にはプレス打
抜きで設けた細長い切欠孔２２と金属基板２１を
そのまま残存させた複数本の連結体２３を設けて
成る。(b) Prior Art As shown in FIGS. 6 and 7, a conventional hybrid integrated circuit has a metal substrate 21 made of aluminum, and a bent portion of the substrate 21 is provided by press punching in the central portion thereof. A plurality of connecting bodies 23 are provided in which the elongated notch hole 22 and the metal substrate 21 remain as they are.
連結体２３は金属基板２１を一体的に支持し、
折曲げても定型を保持する働きを有する。 The connecting body 23 integrally supports the metal substrate 21,
It has the ability to maintain its regular shape even when bent.
絶縁フイルム２４はポリイミド等を用い金属基
板２１の一主面の略全体にエポキシ樹脂等の接着
剤で付着する。絶縁フイルム２４の一主面には導
電路２５となる銅箔を貼着しておき、この銅箔を
選択的にエツチングして所望形状の導電路２５を
形成する。 The insulating film 24 is made of polyimide or the like and is attached to substantially the entire main surface of the metal substrate 21 with an adhesive such as epoxy resin. A copper foil serving as a conductive path 25 is pasted on one main surface of the insulating film 24, and the copper foil is selectively etched to form the conductive path 25 in a desired shape.
導電路２５は両端に実装するプリント基板の電
極に半田付けするパツト２６を配列し、パツド２
６から導電路２５を絶縁フイルム２４上に延在さ
せる。回路素子２７が固着される導電路２５の部
分は基板２１全体に位置する様に設計し、基板２
１の折曲部分を除いて半導体集積回路、チツプ抵
抗あるいはチツプコンデンサー等の複数の回路素
２７を導電路２５上に固着するものである。上述
した技術は特開昭59−141258号公報に記載されて
いる。 The conductive path 25 has pads 26 arranged at both ends to be soldered to the electrodes of the printed circuit board to be mounted.
A conductive path 25 is extended from 6 onto the insulating film 24. The part of the conductive path 25 to which the circuit element 27 is fixed is designed to be located on the entire board 21, and
A plurality of circuit elements 27 such as semiconductor integrated circuits, chip resistors, or chip capacitors are fixed onto the conductive path 25 except for the bent portion 1. The above-mentioned technique is described in Japanese Patent Application Laid-Open No. 141258/1983.
(ハ) 発明が解決しようとする問題点
上述した従来の混成集積回路では、金属基板上
に付着したポリイミドど、ポリイミド上に形成し
た導電路及び回路素子とを外側に成るように折曲
げているので回路素子等の保護性によくない。ま
た金属基板に連結体が設けている為に基板を折曲
げる際、張力によつてポリイミド上に形成した導
電路が切断される恐れがある。(c) Problems to be Solved by the Invention In the conventional hybrid integrated circuit described above, polyimide adhered to a metal substrate, and the conductive paths and circuit elements formed on the polyimide are bent so that they are on the outside. Therefore, it is not good for protecting circuit elements, etc. Further, since the metal substrate is provided with a connecting body, when the substrate is bent, there is a risk that the conductive path formed on the polyimide may be cut due to tension.
(ニ) 問題点が解決するための手段
本発明は上述した点に鑑みて為されたもので有
り、第２図に示す如く、金属基板２の折曲部分と
成る中央部にプレス打抜きで細長い切欠孔３を設
け、第３図Ａに示す如く前記基板２の切欠孔３の
対向辺に沿つて帯状に非接着層４を設ける。そし
て基板２全面に第３図Ｂに示す如く接着層５、絶
縁フイルム６及び銅箔７を、あらかじめ一体化し
たものを貼着する。次に第３図Ｃに示す如く前記
銅箔７を所定のパターンにエツチングし導電路８
を形成する。その導電路８上に回路素子９を形成
し、さらに第３図Ｄに示す如く、連結体１０をプ
レス打抜きで取除き基板２を分割する。該基板２
は導電路８及び回路素子９の高さに応じて任意に
間隙を調整できる。(d) Means for solving the problem The present invention has been made in view of the above-mentioned points, and as shown in FIG. A notch hole 3 is provided, and a non-adhesive layer 4 is provided in a strip shape along the opposite side of the notch hole 3 of the substrate 2, as shown in FIG. 3A. Then, as shown in FIG. 3B, an adhesive layer 5, an insulating film 6, and a copper foil 7, which have been integrated in advance, are adhered to the entire surface of the substrate 2. Next, as shown in FIG. 3C, the copper foil 7 is etched into a predetermined pattern to form conductive paths 8.
form. A circuit element 9 is formed on the conductive path 8, and the connecting body 10 is removed by press punching to divide the substrate 2, as shown in FIG. 3D. The substrate 2
The gap can be arbitrarily adjusted according to the heights of the conductive path 8 and the circuit element 9.
(ホ) 作 用
切欠孔の周辺部に設けた非接着層の巾を可変に
することにより基板間の間隙を調整することがで
きる。(E) Function By varying the width of the non-adhesive layer provided around the notch hole, the gap between the substrates can be adjusted.
(ヘ) 実施例
本発明に依る混成集積回路１は第１図、第２図
に示す如く、金属基板２の中央部にプレス抜きで
切欠孔３を設け、前記切欠孔３の対向辺に沿つて
帯状に非接着層４を設け、前記基板２全面に接着
層５、絶縁フイルム６及び銅箔７をあらかじめ一
体化したものを貼着する。接着層５は絶縁フイル
ム６と前記基板２とを一体化し、前記フイルム６
上に導電路８及び回路素子９を形成し連結体１０
をプレス打抜きで取除き基板２を分割し、回路素
子９の高さに応じた間隙を調整し、厚みを有する
スペーサ１１によつて、その間隙が保たれるもの
である。(F) Embodiment As shown in FIGS. 1 and 2, a hybrid integrated circuit 1 according to the present invention has a cutout hole 3 formed by pressing in the center of a metal substrate 2, and a cutout hole 3 is formed along the opposite side of the cutout hole 3. A non-adhesive layer 4 is provided in the form of a strip, and a previously integrated adhesive layer 5, an insulating film 6 and a copper foil 7 is adhered to the entire surface of the substrate 2. The adhesive layer 5 integrates the insulating film 6 and the substrate 2, and
A conductive path 8 and a circuit element 9 are formed on the connecting body 10.
The substrate 2 is divided by removing it by press punching, the gap is adjusted according to the height of the circuit element 9, and the gap is maintained by a thick spacer 11.
金属基板２は良熱伝導性のアルミニウムで形成
され、その表面は酸化アルミニウム膜で被覆して
も良い。金属基板２の折曲部分となる中央部には
プレス打抜きで設けた細長い切欠孔３と、金属基
板２をそのまま残存させた複数本の連結体１０を
設ける。連結体１０は金属基板２を一体的に支持
し、金属基板２上に非接着層４、接着層５、絶縁
フイルム６及び回路素子９を形成した後、プレス
打抜きで取除くものである。 The metal substrate 2 is made of aluminum, which has good thermal conductivity, and its surface may be coated with an aluminum oxide film. An elongated notch hole 3 formed by press punching and a plurality of connecting bodies 10 with the metal substrate 2 remaining as they are are provided in the central portion of the metal substrate 2, which is the bent portion. The connecting body 10 integrally supports the metal substrate 2, and is removed by press punching after forming the non-adhesive layer 4, the adhesive layer 5, the insulating film 6, and the circuit element 9 on the metal substrate 2.
非接着層４にはシリコン樹脂等を用い、第３図
Ａに示す如く切欠孔３の周辺部に略均一な巾で設
ける。 The non-adhesive layer 4 is made of silicone resin or the like and is provided with a substantially uniform width around the notch hole 3 as shown in FIG. 3A.
接着層５にはエポキシ樹脂等を用い、絶縁フイ
ルム６にはポリイミド樹脂等を用いる。接着層５
の上面に絶縁フイルム６、銅箔７をあらかじめ貼
着して一体化したものを基板２に貼着し、銅箔７
を選択的にエツチングし、第３図Ｃに示す如く複
数の導電路８が形成され回路素子９が形成され
る。 Epoxy resin or the like is used for the adhesive layer 5, and polyimide resin or the like is used for the insulating film 6. Adhesive layer 5
An insulating film 6 and a copper foil 7 are pasted on the upper surface of the board 2 and the copper foil 7 is integrated.
is selectively etched to form a plurality of conductive paths 8 and circuit elements 9 as shown in FIG. 3C.
回路素子９が固着される導電路８の部分は基板
２全体に位置する様に設計し、基板２の折曲部分
を除いて半導体集積回路、チツプ抵抗あるいはチ
ツプコンデンサー等の複数の回路素子９を導電路
８上に固着する。 The portion of the conductive path 8 to which the circuit element 9 is fixed is designed to be located over the entire substrate 2, and the portion of the conductive path 8 to which the circuit element 9 is fixed is designed to be located on the entire substrate 2, and a plurality of circuit elements 9 such as a semiconductor integrated circuit, a chip resistor, or a chip capacitor, etc. It is fixed on the conductive path 8.
スペーサー１１は合成樹脂等の絶縁物で形成
し、基板２間の間隙を保つものである。 The spacer 11 is made of an insulating material such as synthetic resin, and maintains a gap between the substrates 2.
本発明の混成集積回路１に於いて、間隙の高さ
は切欠孔３の巾と、非接着層４の巾とで決定され
る。すなわち間隙の高さＨ、切欠孔３の巾ｈ、非
接着層４の巾ｄとすれば最大間隙の高さＨはｈ＋
2dとなる。従つて非接着層４の巾ｄを可変にす
ることにより、固着する回路素子９の高さに応じ
て間隙の高さＨを調整することができる。又同一
の基板２から非接着層４の巾ｄを可変にすること
により種々の混成集積回路を量産できる。 In the hybrid integrated circuit 1 of the present invention, the height of the gap is determined by the width of the cutout hole 3 and the width of the non-adhesive layer 4. In other words, if the height of the gap is H, the width of the cutout hole 3 is h, and the width of the non-adhesive layer 4 is d, the maximum gap height H is h+
It becomes 2d. Therefore, by making the width d of the non-adhesive layer 4 variable, the height H of the gap can be adjusted depending on the height of the circuit element 9 to be fixed. Furthermore, by varying the width d of the non-adhesive layer 4 from the same substrate 2, various hybrid integrated circuits can be mass-produced.
以下に本実施例の金属基板２の製造工程につい
て説明を行なう。 The manufacturing process of the metal substrate 2 of this example will be explained below.
第２図に示す如く金属基板２の中央部のプレス
打抜きにより切欠孔３を設け、第３図Ａに示す如
く切欠孔３の対向辺に略同じ巾の非接着層４をス
クリーン印刷等で塗布する。次に第３図Ｂに示す
如く接着層５、絶縁フイルム６、及び銅箔７があ
らかじめ一体化されたものを非接着層４が設けら
れた基板２全面にローラー等で貼着し、絶縁フイ
ルム６の上面に設けられている銅箔７を所定のパ
ターンにエツチングし、第３図Ｃに示す如く導電
路８を形成し、その導電路８上に回路素子９を形
成する。さらに折曲げを容易にする為に第３図Ｄ
に示す如く連結体１０をプレス打抜きで取除き、
回路素子９が相対向するように基板２を折曲げ、
第４図に示す如く折曲げ基板２の両側辺にスペー
サー１１を介し固着され、間隙を保つものであ
る。 As shown in FIG. 2, a notch hole 3 is formed by press punching in the center of the metal substrate 2, and a non-adhesive layer 4 of approximately the same width is applied by screen printing or the like on the opposite side of the notch hole 3, as shown in FIG. 3A. do. Next, as shown in FIG. 3B, the adhesive layer 5, the insulating film 6, and the copper foil 7 that have been integrated in advance are pasted on the entire surface of the substrate 2 on which the non-adhesive layer 4 is provided, using a roller or the like. The copper foil 7 provided on the upper surface of the copper foil 7 is etched into a predetermined pattern to form a conductive path 8 as shown in FIG. 3C, and a circuit element 9 is formed on the conductive path 8. In order to further facilitate bending,
As shown in the figure, the connecting body 10 is removed by press punching,
Bending the substrate 2 so that the circuit elements 9 face each other,
As shown in FIG. 4, it is fixed to both sides of the bent substrate 2 via spacers 11 to maintain a gap.
他の実施例として非接着層４の巾ｄを最小と
し、且つ（ｈ＋2d）より小さい回路素子９を固
着する場合には第５図に示す如く絶縁フツルム６
の折曲部を湾曲する如く押しつぶし、実質的には
ｈを可変にし間隙の高さＨを調節する。 As another embodiment, when the width d of the non-adhesive layer 4 is minimized and a circuit element 9 smaller than (h+2d) is to be fixed, an insulating film 6 is used as shown in FIG.
The bent portion of the gap is compressed into a curve to make h variable and adjust the height H of the gap.
以上の如く切欠孔３の周辺部に非接着層４を設
けることにより、非接着層４の巾ｄと、２枚の基
板２の離間距離すなわち切欠孔３の巾ｈで最大間
隙が決定し、最大間隙より低い回路素子９ならば
絶縁フイルム６の折曲部を湾曲するように押しつ
ぶし回路素子９を収納することができる。 By providing the non-adhesive layer 4 around the notch hole 3 as described above, the maximum gap is determined by the width d of the non-adhesive layer 4 and the distance between the two substrates 2, that is, the width h of the notch hole 3. If the circuit element 9 is lower than the maximum gap, the circuit element 9 can be accommodated by compressing the bent portion of the insulating film 6 so as to curve it.
(ト) 発明の効果
以上に詳述した如く本発明に依れば、非接着層
の巾ｄを可変することにより、固着する回路素子
の高さに応じて間隙の高さＨを調整することがで
きる。また非接着層の巾ｄによつて決定された高
さで、固着可能な回路素子よりも小さな回路素子
を固着する場合には、絶縁フイルムの折曲部を湾
曲するように押しつぶし間隙を調節することもで
きる。以上の様に同一の基板から非接着層の巾ｄ
を可変にすることにより種々の混成集積回路が量
産するのが可能である。(g) Effects of the Invention As detailed above, according to the present invention, by varying the width d of the non-adhesive layer, the height H of the gap can be adjusted according to the height of the circuit element to be fixed. I can do it. In addition, when fixing a circuit element smaller than the fixable circuit element at the height determined by the width d of the non-adhesive layer, the gap is adjusted by squeezing the bent part of the insulating film so as to curve it. You can also do that. As mentioned above, the width d of the non-adhesive layer from the same substrate
By making variable, it is possible to mass produce various hybrid integrated circuits.
第１図は本発明の実施例を示す断面図、第２図
は本実施例に用いられる金属基板の平面図、第３
図Ａ，Ｂ，Ｃ，Ｄは第２図Ｘ―Ｘに対応した工程
順を示す断面図、第４図は本実施例を示す側面
図、第５図は本発明の他の実施例を示す断面図、
第６図、第７図は従来例を示す平面図、断面図で
ある。
１…混成集積回路、２…金属基板、３…切欠
孔、４…非接着層、５…接着層、６…絶縁フイル
ム、７…銅箔、８…導電路、９…回路素子、１０
…連結体、１１…スペーサ。
FIG. 1 is a sectional view showing an embodiment of the present invention, FIG. 2 is a plan view of a metal substrate used in this embodiment, and FIG.
Figures A, B, C, and D are cross-sectional views showing the process order corresponding to Figure 2 XX, Figure 4 is a side view showing this embodiment, and Figure 5 is another embodiment of the present invention. cross section,
6 and 7 are a plan view and a sectional view showing a conventional example. DESCRIPTION OF SYMBOLS 1... Hybrid integrated circuit, 2... Metal substrate, 3... Notch hole, 4... Non-adhesive layer, 5... Adhesive layer, 6... Insulating film, 7... Copper foil, 8... Conductive path, 9... Circuit element, 10
...Connection body, 11...Spacer.
Claims (1)
基板表面に付着した絶縁フイルムと、該フイルム
上に設けた所望の導電路と、該導電路上に固着さ
れた複数の回路素子とを具備し、前記２枚の基板
上の導電路及び回路素子が、相対向するように前
記２枚の基板を折曲げ配置する混成集積回路に於
いて、前記基板を折曲げる対向辺に沿つて帯状に
非接着層を設け、少なくとも他の部分には接着層
を設け、該接着層で前記フイルムと基板とを一体
化し、前記２枚の基板を折曲げたときの基板間の
間隙を前記非接着層の巾と前記２枚の基板の離間
距離とで間隙を調整することを特徴とする混成集
積回路。1. Two divided metal substrates, an insulating film attached to the surfaces of the two metal substrates, a desired conductive path provided on the film, and a plurality of circuit elements fixed on the conductive path. In a hybrid integrated circuit in which the two substrates are bent and arranged so that the conductive paths and circuit elements on the two substrates face each other, the conductive paths and circuit elements on the two substrates are arranged in a band shape along opposite sides of the folded substrates. A non-adhesive layer is provided on at least the other portion, an adhesive layer is provided on at least other parts, the film and the substrate are integrated with the adhesive layer, and the gap between the substrates when the two substrates are bent is filled with the non-adhesive layer. A hybrid integrated circuit characterized in that the gap is adjusted by the width of the layer and the distance between the two substrates.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4977285A JPS61208287A (en) | 1985-03-13 | 1985-03-13 | Hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4977285A JPS61208287A (en) | 1985-03-13 | 1985-03-13 | Hybrid integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61208287A JPS61208287A (en) | 1986-09-16 |
| JPH0376796B2 true JPH0376796B2 (en) | 1991-12-06 |
Family
ID=12840455
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4977285A Granted JPS61208287A (en) | 1985-03-13 | 1985-03-13 | Hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61208287A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4528743B2 (en) * | 2006-05-09 | 2010-08-18 | 事業協同組合群馬県Ｇｂｘ工業会 | Side gutter drainage and side gutter construction method |
-
1985
- 1985-03-13 JP JP4977285A patent/JPS61208287A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4528743B2 (en) * | 2006-05-09 | 2010-08-18 | 事業協同組合群馬県Ｇｂｘ工業会 | Side gutter drainage and side gutter construction method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61208287A (en) | 1986-09-16 |
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