JPH0373560A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0373560A JPH0373560A JP21029489A JP21029489A JPH0373560A JP H0373560 A JPH0373560 A JP H0373560A JP 21029489 A JP21029489 A JP 21029489A JP 21029489 A JP21029489 A JP 21029489A JP H0373560 A JPH0373560 A JP H0373560A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- semiconductor device
- stress
- sealing resin
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 44
- 239000011347 resin Substances 0.000 abstract description 10
- 229920005989 resin Polymers 0.000 abstract description 10
- 238000007789 sealing Methods 0.000 abstract description 8
- 238000000034 method Methods 0.000 abstract description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000012141 concentrate Substances 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置に関し、特に半導体チップを収容す
る樹脂封止型の半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a resin-sealed semiconductor device that houses a semiconductor chip.
従来、この種の半導体装Ｉは第３図に示すごとく、平面
上において、樹脂封止された半導体装直外形３が形成す
るＸ、Ｙ軸と搭載される半導体チップ１のＸ、Ｙ軸は一
致するような構造となっていた。Conventionally, in this type of semiconductor device I, as shown in FIG. 3, on a plane, the X and Y axes formed by the resin-sealed semiconductor device 3 and the X and Y axes of the mounted semiconductor chip 1 are It had a similar structure.
このような樹脂封止型の半導体装置においては、樹脂封
止によって発生する応力は、半導体チップのコーナ一部
に集中し、パッシベーション用保護膜や配線層間に形成
する眉間絶縁膜にクラックを生じさせ、半導体装置の信
頼性を低下させることが判明しており、特に、上述した
従来の半導体装置においては、封止樹脂によるＸ、Ｙ軸
と半導体チップの辺が構成するＸ、Ｙ軸が一致している
為、半導体チップのコーナ一部において、封止樹脂によ
る応力の影響を受けやすいという欠点があった。In such resin-sealed semiconductor devices, the stress generated by the resin encapsulation concentrates on some corners of the semiconductor chip, causing cracks in the passivation protective film and the glabella insulating film formed between the wiring layers. It has been found that this reduces the reliability of semiconductor devices. In particular, in the conventional semiconductor device described above, the X and Y axes formed by the sealing resin do not coincide with the X and Y axes formed by the sides of the semiconductor chip. Therefore, there was a drawback that some corners of the semiconductor chip were easily affected by the stress caused by the sealing resin.
また、従来型の□半導体装置においては、このような応
力を緩和する為、第４図に示すように、半導体チップ１
１のコーナ一部に配置される配線層６において、スリッ
トパターン７を挿入したり４５°の切りかきパターン８
を形成していたが、ある程度の効果はあるものの応力を
完全に緩和しきれない欠点があった。In addition, in conventional □ semiconductor devices, in order to relieve such stress, the semiconductor chip 1 is
1, a slit pattern 7 is inserted or a 45° cut pattern 8 is formed in the wiring layer 6 arranged in a part of the corner
Although it was effective to some extent, it had the drawback that it could not completely relieve stress.
本発明の目的は、半導体チップに発生する応力を緩和し
、信頼性の高い半導体装置を提供することにある。An object of the present invention is to provide a highly reliable semiconductor device that alleviates stress generated in a semiconductor chip.
１′課題を解決するための手段〕
本発明は、半導体チップを収容する樹脂封止型の半導体
装置において、平面上で封止樹脂が形成する正方形と矩
形とのうちのいずれか一方のＸＹ軸に対して搭載される
前記半導体チップのＸ。1'Means for Solving the Problems] The present invention provides a resin-sealed semiconductor device that houses a semiconductor chip, in which the XY axis of either a square or a rectangle formed by the sealing resin on a plane. X of the semiconductor chip mounted on the semiconductor chip.
Ｙ軸が特定の角度をもって回転して搭載されている。It is mounted with the Y axis rotated at a specific angle.
次に、本発明の実施例につき図面を参照して説明する。 Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の第「の実施例を示す平面図である。FIG. 1 is a plan view showing a second embodiment of the present invention.
図において、１は半導体チップ、２はリードフレーム、
３は樹脂封止された半導体装置外形、５は半導体装置の
外部端子を示す。In the figure, 1 is a semiconductor chip, 2 is a lead frame,
Reference numeral 3 indicates the outer shape of a resin-sealed semiconductor device, and reference numeral 5 indicates an external terminal of the semiconductor device.
本発明の実施にあたっては、特に、新しい技術は必要と
せす従来技術をもって達成しうるちのであり、本実施例
においては、第１図に示すように、半導体チップ１をリ
ードフレーム２のマウント部４にマウントする工程にお
いて、半導体チップ１を４５°回転させてマウントする
。In carrying out the present invention, in particular, new technology can be achieved using conventional technology, and in this embodiment, as shown in FIG. In the mounting process, the semiconductor chip 1 is rotated by 45 degrees and mounted.
以後、通常の樹脂封止型半導体装置の組立工程を経て、
本実施例は完了する。After that, after going through the normal assembly process of resin-sealed semiconductor devices,
This example is complete.
第１図よりも明らかなごとく、封止樹脂によって半導体
チップ１に発生する応力は、半導体チップ１の辺全体で
受けることになり、半導体チップ１のコーナ一部の配線
層に４５°の切りかきを形成するよりも応力を一層緩和
することができる。As is clear from FIG. 1, the stress generated in the semiconductor chip 1 by the sealing resin is received by the entire side of the semiconductor chip 1, and a 45° cut is made in the wiring layer at a part of the corner of the semiconductor chip 1. The stress can be further alleviated than by forming a .
第２図は本発明の第２の実施例を示す平面図である。FIG. 2 is a plan view showing a second embodiment of the invention.
第２の実施例は、第２図に示すように、第１の実施例と
同様に構成されたものであるが、組立性を向上させる為
、マウント部１４を４５°回転させた専用のリードフレ
ーム】２を用いたものである。As shown in FIG. 2, the second embodiment has the same structure as the first embodiment, but in order to improve assembly ease, a dedicated lead is used with the mount section 14 rotated by 45 degrees. Frame] 2 is used.
第２の実施例も第１の実施例と同じ効果が得られる。The second embodiment also provides the same effects as the first embodiment.
以上説明したように本発明は、樹脂封止型の半導体装置
において、封止する樹脂が平面上で形成するＸ、Ｙ軸に
対して搭載される半導体チップのＸ、Ｙ軸を特定の角度
をもって回転することにより、封止樹脂によって半導体
チップに発生する応力を緩和し、半導体装置の信頼性を
向上させることができる効果がある。As explained above, the present invention provides a resin-sealed semiconductor device in which the encapsulating resin aligns the X and Y axes of a mounted semiconductor chip at specific angles with respect to the X and Y axes formed on a plane. The rotation has the effect of alleviating the stress generated in the semiconductor chip by the sealing resin and improving the reliability of the semiconductor device.
端子、６・・・配線層、７・・・スリットパターン、８
・・・切りかきパターン、９・・・ポンディングパッド
。Terminal, 6... Wiring layer, 7... Slit pattern, 8
...Cut pattern, 9...Ponding pad.
Claims (1)
て、平面上で封止樹脂が形成する正方形と矩形とのうち
のいずれか一方のＸ、Ｙ軸に対して搭載される前記半導
体チップのＸ、Ｙ軸が特定の角度をもって回転して搭載
されていることを特徴とする半導体装置。In a resin-sealed semiconductor device that accommodates a semiconductor chip, A semiconductor device characterized in that the Y-axis is mounted with rotation at a specific angle.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21029489A JPH0373560A (en) | 1989-08-14 | 1989-08-14 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21029489A JPH0373560A (en) | 1989-08-14 | 1989-08-14 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0373560A true JPH0373560A (en) | 1991-03-28 |
Family
ID=16587017
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21029489A Pending JPH0373560A (en) | 1989-08-14 | 1989-08-14 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0373560A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5550402A (en) * | 1992-11-27 | 1996-08-27 | Esec Sempac S.A. | Electronic module of extra-thin construction |
| CN101944522A (en) * | 2009-07-03 | 2011-01-12 | 瑞萨电子株式会社 | The electronic unit of lead frame and use lead frame |
-
1989
- 1989-08-14 JP JP21029489A patent/JPH0373560A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5550402A (en) * | 1992-11-27 | 1996-08-27 | Esec Sempac S.A. | Electronic module of extra-thin construction |
| CN101944522A (en) * | 2009-07-03 | 2011-01-12 | 瑞萨电子株式会社 | The electronic unit of lead frame and use lead frame |
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