JPH0363929U - - Google Patents

Info

Publication number
JPH0363929U
JPH0363929U JP1989124255U JP12425589U JPH0363929U JP H0363929 U JPH0363929 U JP H0363929U JP 1989124255 U JP1989124255 U JP 1989124255U JP 12425589 U JP12425589 U JP 12425589U JP H0363929 U JPH0363929 U JP H0363929U
Authority
JP
Japan
Prior art keywords
bump electrode
bonding pad
neck portion
head
conductive adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1989124255U
Other languages
English (en)
Other versions
JPH085550Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989124255U priority Critical patent/JPH085550Y2/ja
Publication of JPH0363929U publication Critical patent/JPH0363929U/ja
Application granted granted Critical
Publication of JPH085550Y2 publication Critical patent/JPH085550Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/98Methods for disconnecting semiconductor or solid-state bodies
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/118Post-treatment of the bump connector
    • H01L2224/1182Applying permanent coating, e.g. in-situ coating
    • H01L2224/11822Applying permanent coating, e.g. in-situ coating by dipping, e.g. in a solder bath
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354Coating
    • H01L2224/1356Disposition
    • H01L2224/13563Only on parts of the surface of the core, i.e. partial coating
    • H01L2224/13565Only outside the bonding interface of the bump connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Description

【図面の簡単な説明】
第1図ないし第5図は本考案の一実施例を示す
ものである。第1図は半導体装置の縦断面図であ
る。第2図はバンプ電極にペースト状導電性接着
剤を転写する工程を示す縦断面図である。第3図
は適当なバンプ電極の形状を得るための説明に供
されるバンプ電極の縦断面図である。第4図はネ
ツク部と頭部との適当な寸法の範囲を示すグラフ
である。第5図aは不良半導体チツプを取り外す
工程を示す縦断面図である。第5図bは導電性接
着剤層の残滓を示す平面図である。第6図ないし
第8図は従来例を示すものである。第6図は半導
体装置の縦断面図である。第7図はバンプ電極に
ペースト状導電性接着剤を転写する工程を示す縦
断面図である。第8図aは不良半導体チツプを取
り外す工程を示す縦断面図である。第8図bは導
電性接着剤層の残滓を示す平面図である。 1……半導体チツプ、2……バンプ電極、2a
……ネツク部、2b……頭部、3……導電性接着
剤層、4……薄膜回路基板、5……ボンデイング
パツドである。

Claims (1)

  1. 【実用新案登録請求の範囲】 半導体チツプの内部配線に接続されたネツク部
    とネツク部の先端に形成されたネツク部より径の
    大きい頭部とを有するバンプ電極が半導体チツプ
    に突設され、上記バンプ電極の頭部が、回路基板
    上に形成された電極としてのボンデイングパツド
    に当接され、バンプ電極の頭部とボンデイングパ
    ツドとの当接部周囲が導電性接着剤層によつて被
    覆されることにより、バンプ電極がボンデイング
    パツドに固着されると共に、バンプ電極とボンデ
    イングパツドとが電気的に接続されている半導体
    装置において、 上記導電性接着剤層は、バンプ電極のネツク部
    に達してバンプ電極の頭部全体を包みこんでいる
    ことを特徴とする半導体装置。
JP1989124255U 1989-10-23 1989-10-23 半導体装置 Expired - Lifetime JPH085550Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989124255U JPH085550Y2 (ja) 1989-10-23 1989-10-23 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989124255U JPH085550Y2 (ja) 1989-10-23 1989-10-23 半導体装置

Publications (2)

Publication Number Publication Date
JPH0363929U true JPH0363929U (ja) 1991-06-21
JPH085550Y2 JPH085550Y2 (ja) 1996-02-14

Family

ID=31672187

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989124255U Expired - Lifetime JPH085550Y2 (ja) 1989-10-23 1989-10-23 半導体装置

Country Status (1)

Country Link
JP (1) JPH085550Y2 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2008136304A1 (ja) * 2007-04-28 2010-07-29 木村 太 ゴルフパター練習装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63276237A (ja) * 1987-05-08 1988-11-14 Citizen Watch Co Ltd 基板へのicボンディング方法
JPS6439043A (en) * 1987-08-05 1989-02-09 Nippon Denso Co Semiconductor integrated circuit device
JPH01232735A (ja) * 1988-03-11 1989-09-18 Matsushita Electric Ind Co Ltd 半導体装置の実装体

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63276237A (ja) * 1987-05-08 1988-11-14 Citizen Watch Co Ltd 基板へのicボンディング方法
JPS6439043A (en) * 1987-08-05 1989-02-09 Nippon Denso Co Semiconductor integrated circuit device
JPH01232735A (ja) * 1988-03-11 1989-09-18 Matsushita Electric Ind Co Ltd 半導体装置の実装体

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2008136304A1 (ja) * 2007-04-28 2010-07-29 木村 太 ゴルフパター練習装置

Also Published As

Publication number Publication date
JPH085550Y2 (ja) 1996-02-14

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term