JPH0357238A - Probe card - Google Patents
Probe cardInfo
- Publication number
- JPH0357238A JPH0357238A JP1193019A JP19301989A JPH0357238A JP H0357238 A JPH0357238 A JP H0357238A JP 1193019 A JP1193019 A JP 1193019A JP 19301989 A JP19301989 A JP 19301989A JP H0357238 A JPH0357238 A JP H0357238A
- Authority
- JP
- Japan
- Prior art keywords
- probe
- substrate
- upper substrate
- lower substrate
- card
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000523 sample Substances 0.000 title claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 23
- 238000005259 measurement Methods 0.000 abstract description 2
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 238000003491 array Methods 0.000 description 1
- 239000011111 cardboard Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はプローブ・カードに関し、特にマスタースライ
ス品やゲートアレイ品のように回路は異なるがテストパ
ッド位置が共通の品種の測定に適したプローブ・カード
に関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a probe card, and in particular to a probe suitable for measuring products such as master slice products and gate array products that have different circuits but have a common test pad position.・Regarding cards.
従来、マスタースライス品やゲートアレイ品に用いられ
るプローブ・カードは、ICチップのパッド位置が拡散
下地ウェハー毎に同じであることから一種類で済むこと
が多かったが、ユーザーの特殊要求や設計の自由度の増
大に伴いカード上で様々な配線が必要となり、配線のみ
を変えた新たなプローブ・カードを発生する場合が増え
てきた。In the past, probe cards used for master slice products and gate array products often required only one type because the pad positions of the IC chips were the same for each diffusion base wafer. As the degree of freedom increases, various types of wiring are required on the card, and new probe cards with only the wiring changed are increasingly being created.
上述した従来のプローブ・カードは、プローブ位置が同
じであっても回路の違いにより共用ができない場合が発
生すると、多くの費用と時間を費して新たにプローブ・
カード作或しなければならないという欠点がある。The conventional probe cards mentioned above require a lot of money and time when they cannot be used in common due to differences in circuitry even if the probe positions are the same.
The disadvantage is that you have to make cards.
特にゲートアレイのように高集積化に伴ない多ビン化の
進む製品の場合、上記欠点は安価で短納期の製品を提供
する上で大きな障害となる。Particularly in the case of products such as gate arrays, where the number of bins increases as the integration increases, the above-mentioned drawbacks become a major obstacle in providing products at low cost and with short delivery times.
本発明のプローブ・カードは、ICのパッドに立てるプ
ローブと測定機に接続される端子とを有する下基板と、
前記プローブと端子とを接続する配線を有する上基板と
から成っている。The probe card of the present invention includes a lower substrate having a probe that stands on a pad of an IC and a terminal that is connected to a measuring device;
It consists of an upper substrate having wiring for connecting the probes and terminals.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第l図は本発明の第1の実施例の断面図、第2図(a)
, (b)は第1図の上基板及び下基板の平面図である
。FIG. 1 is a sectional view of the first embodiment of the present invention, FIG. 2(a)
, (b) is a plan view of the upper and lower substrates of FIG. 1.
本発明は下基板1と上基板2とから成り、下基板1には
プローブ3と外部端子4とが設けられ、上基板2で配線
5が行なわれる。The present invention consists of a lower substrate 1 and an upper substrate 2. The lower substrate 1 is provided with probes 3 and external terminals 4, and the upper substrate 2 is provided with wiring 5.
上基板2は品種毎に作或してあり、共通の下基板1に接
続ビン6を介して接続することで測定作業ができる。The upper substrate 2 is manufactured for each product type, and measurement work can be performed by connecting it to the common lower substrate 1 via a connecting pin 6.
3 第2図は本発明の第2実施例の断面図である。3 FIG. 2 is a sectional view of a second embodiment of the invention.
本実施例は、特に多ビンでシールド・ケーブルが使いに
くい製品を測定するのに適した例で、配線を2枚のシー
ルド基板B2,2’ではさみ外部ノイズの影響を極力抑
えた構造となっている。This example is particularly suitable for measuring products with a large number of bins that make it difficult to use shielded cables, and the wiring is sandwiched between two shield boards B2 and 2' to minimize the influence of external noise. ing.
以上説明したように本発明は、プローブ・カードの配線
部を基板本体から分離させ交換可能としたため、パッド
配置が同じであればどの品種へも一枚のプローブ・カー
ド基板で済むという利点がある。As explained above, the present invention has the advantage that since the wiring part of the probe card is separated from the board body and can be replaced, a single probe card board can be used for any type of product as long as the pad arrangement is the same. .
第1図は本発明の第1の実施例の断面図、第2図(a)
, (b)は第1図の上基板及び下基板の平面図、第3
図は本発明の第2の実施例の断面図である。
1・・・・・・基板A、2,2′・・・・・・基板B,
3・・・・・・プローブ、4・・・・・・外部端子、5
・・・・・・配線、6・・・・・・接続ビン。Fig. 1 is a sectional view of the first embodiment of the present invention, Fig. 2(a)
, (b) is a plan view of the upper and lower substrates in Figure 1, and Figure 3.
The figure is a sectional view of a second embodiment of the invention. 1...Substrate A, 2, 2'...Substrate B,
3...Probe, 4...External terminal, 5
...Wiring, 6...Connection bin.
Claims (1)
される端子とを有する下基板と、前記プローブと端子と
を接続する配線を有する上基板とを有することを特徴と
するプローブ・カード。A probe card comprising: a lower substrate having a probe that stands on a pad of an IC chip; a terminal that is connected to a measuring device; and an upper substrate having wiring that connects the probe and the terminal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1193019A JPH0357238A (en) | 1989-07-25 | 1989-07-25 | Probe card |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1193019A JPH0357238A (en) | 1989-07-25 | 1989-07-25 | Probe card |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0357238A true JPH0357238A (en) | 1991-03-12 |
Family
ID=16300825
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1193019A Pending JPH0357238A (en) | 1989-07-25 | 1989-07-25 | Probe card |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0357238A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100389909B1 (en) * | 1995-11-21 | 2003-08-30 | 삼성전자주식회사 | Probe card of wafer level test and connection method between test equipments |
-
1989
- 1989-07-25 JP JP1193019A patent/JPH0357238A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100389909B1 (en) * | 1995-11-21 | 2003-08-30 | 삼성전자주식회사 | Probe card of wafer level test and connection method between test equipments |
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