JPH0354924A - Diversity radio receiver - Google Patents

Diversity radio receiver

Info

Publication number
JPH0354924A
JPH0354924A JP1191184A JP19118489A JPH0354924A JP H0354924 A JPH0354924 A JP H0354924A JP 1191184 A JP1191184 A JP 1191184A JP 19118489 A JP19118489 A JP 19118489A JP H0354924 A JPH0354924 A JP H0354924A
Authority
JP
Japan
Prior art keywords
antenna
signal
antennas
noise
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1191184A
Other languages
Japanese (ja)
Inventor
Tsuneo Sakai
酒井 恒夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alpine Electronics Inc
Original Assignee
Alpine Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alpine Electronics Inc filed Critical Alpine Electronics Inc
Priority to JP1191184A priority Critical patent/JPH0354924A/en
Publication of JPH0354924A publication Critical patent/JPH0354924A/en
Pending legal-status Critical Current

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  • Radio Transmission System (AREA)

Abstract

PURPOSE:To remove noise residual generated at the time of switching one antenna to the other one by switching the antennas only for a prescribed delay time from multipass noise detecting time. CONSTITUTION:Receiving signals from the antennas 11a, 11b are detected and inputted to a digital signal processor(DSP) 17. The DSP 17 delays the detecting outputs of respective antennas 11a, 11b for a prescribed time and a selection circuit 18 selects a DSP output corresponding to the selected antenna. When a multipass noise level Ma included in the received signal is larger than a set point and goes larger than a multipass noise level Mb included in the other antenna signal, an antenna switching judging signal 21 instructs a control part 22 to switch the antenna. Since a signal corresponding to the other antenna is outputted from the circuit 18 and the antenna receiving signal is switched only for the prescribed delay time from the multipass noise detecting time, no noise residual is generated.

Description

【発明の詳細な説明】 く産業上の利用分野〉 本発明はダイバーシティラジオ受信機に係り、特にアン
テナ切り換え時におけるノイズの切り残しをなくすこと
ができるダイバーシティラジオ受信機に関する. 〈従来技術〉 ダイバーシティラジオ受信機は、指向性の異なる2本の
受信アンテナと、マルチパスノイズ検出回路と、アンテ
ナ切換回路を備え、マルチパスノイズが小さくなるよう
に受信アンテナを切り換えて放送電波を受信する。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a diversity radio receiver, and more particularly to a diversity radio receiver that can eliminate uncut noise when switching antennas. <Prior art> A diversity radio receiver is equipped with two receiving antennas with different directivity, a multipath noise detection circuit, and an antenna switching circuit, and switches the receiving antennas to reduce multipath noise and transmits broadcast radio waves. Receive.

く発明が解決しようとする課題〉 かかるダイバーシティラジオ受信機においては、マルチ
パスノイズが大きくなったことを検出してからアンテナ
を切り換えるため、ノイズを完全になくすことができず
、ノイズの切り残しが生じる。
Problems to be Solved by the Invention In such a diversity radio receiver, since the antenna is switched after detecting that multipath noise has become large, it is not possible to completely eliminate noise, and noise remains uncut. arise.

本発明の目的は、アンテナ切り換え時におけるノイズの
切り残しをなくすことができるダイバーシティラジオ受
信機を提供することである。
An object of the present invention is to provide a diversity radio receiver that can eliminate uncut noise when switching antennas.

く課題を解決するための手段〉 上記課題は本発明においては,第1,第2のアンテナか
らの受信信号をそれぞれ遅延させる遅延手段と、遅延手
段からの一方の信弼を選択する選択回路と、マルチバス
ノイズを検出するノイズ検出部と、マルチパスノイズに
基づいて遅延手段から出力される2つの遅延信号のうち
一方を選択させる判断部とにより達成される。
Means for Solving the Problem> The above problem is solved in the present invention by providing a delay means for respectively delaying the received signals from the first and second antennas, and a selection circuit for selecting one signal from the delay means. , a noise detection unit that detects multi-pass noise, and a determination unit that selects one of the two delayed signals output from the delay means based on the multi-path noise.

く作用〉 第l、第2のアンテナにより受信された放送信号をそれ
ぞれ所定時間遅延し、現アンテナに応じた一方の遅延信
号を選択して出力すると共に、遅延前の第1、第2アン
テナの受信信号に含まれるマルチパスノイズを検出する
。そして、現アンテナのマルチパスノイズが大きくなっ
て,アンテナ切り換えの必要性が生じた時、他のアンテ
ナに切り換え、該他のアンテナに応じた遅延信号を選択
して出力する。この結果、マルチパスノイズ検出時刻か
ら前記遅延時間だけ遡ってアンテナが切り換えられるた
め、マルチパスノイズの切り残しが生じない。
Function> The broadcast signals received by the first and second antennas are each delayed for a predetermined period of time, one of the delayed signals corresponding to the current antenna is selected and output, and the signals of the first and second antennas before the delay are output. Detect multipath noise included in the received signal. Then, when the multipath noise of the current antenna becomes large and it becomes necessary to switch the antenna, the antenna is switched to another antenna, and a delayed signal corresponding to the other antenna is selected and output. As a result, the antenna is switched back by the delay time from the multipath noise detection time, so that no multipath noise is left uncut.

く実施例〉 図は本発明のダイバーシティラジオ受信機のブロック図
であり、lla,llbは第1、第2のアンテナ、12
a,12bは第1、第2のフロントエンド、13a,1
3bは第l、第2の中間周波増幅器、14a,14bは
第1,第2の検波回路、15a,15bは第l、第2の
ノイズ検出回路であり、それぞれ第1,第2アンテナの
受信信号(中間周波信号)に含まれるマルチパスノイズ
を検出する。尚、サフィックスaが付けられたブロック
は第1アンテナ側の回路であり、サフィノクスbが付け
られたブロックは第2アンテナ側の回路である。
Embodiment> The figure is a block diagram of a diversity radio receiver of the present invention, where lla and llb are the first and second antennas,
a, 12b are first and second front ends, 13a, 1
3b is the first and second intermediate frequency amplifiers, 14a and 14b are the first and second detection circuits, and 15a and 15b are the first and second noise detection circuits, which are used for reception of the first and second antennas, respectively. Detects multipath noise contained in a signal (intermediate frequency signal). Note that the blocks with the suffix a are the circuits on the first antenna side, and the blocks with the suffix b are the circuits on the second antenna side.

16は第1、第2アンテナ側検波出力のAD変換データ
を記憶するメモリ、l7は2人力のデジタル・シグナル
・プロセッサ(DSP)である。
16 is a memory for storing AD conversion data of the detection outputs of the first and second antenna sides, and l7 is a two-manpower digital signal processor (DSP).

DSPは各検波出力をそれぞれ所定サンプリング周期で
AD変換してメモリ16の第1,第2アンテナ側記憶部
16a,16bに記憶すると共に、該メモリに記憶され
た第1、第2アンテナ側の検波データを所定時間Td遅
れて読み出し、所定サンプリング周期でDA変換して出
力する。
The DSP performs AD conversion on each detection output at a predetermined sampling period and stores it in the first and second antenna side storage sections 16a and 16b of the memory 16, and also performs AD conversion on each detection output at a predetermined sampling period. Data is read out with a delay of a predetermined time Td, DA-converted at a predetermined sampling period, and output.

18はDSPから出力されるDA変換信号Sa,sbを
選択出力する選択回路、19はノイズイキラー、20は
マルチプレクサ(ステレオ復調回路)21はマルチパス
ノイズに基づいてアンテナ切リ換え処理を行うアンテナ
切換判断回路、22はマイコン構或の制御部である。制
御部22は必要なパラメータ等を入力してDSPを制御
すると共に、アンテナ切換判断回路2lからの指示に基
づいてAD変換信号Sa,Sbの選択指令を出力する。
18 is a selection circuit that selects and outputs the DA conversion signals Sa and sb output from the DSP, 19 is a noise equalizer, 20 is a multiplexer (stereo demodulation circuit), and 21 is an antenna that performs antenna switching processing based on multipath noise. The switching judgment circuit 22 is a control section having a microcomputer structure. The control unit 22 controls the DSP by inputting necessary parameters and the like, and also outputs a command to select the AD conversion signals Sa and Sb based on instructions from the antenna switching judgment circuit 2l.

次に,全体的動作を説明する。Next, the overall operation will be explained.

第1,第2のアンテナlla,llbからの受信信号は
それぞれフロントエンド12a,12bで中間周波信号
に変換された後、中間周波増幅され、検波されてDSP
17に入力される。DSPは,前述の如く、各検波出力
をAD変換してメモリ16に記憶すると共に、時間Td
遅れてメモリから記憶データを読み出してDA変換し、
DA変換出力Sa,Sbを出力する。すなわち,DSP
17は各アンテナの検波出力を時間Td遅延する。
Received signals from the first and second antennas lla and llb are converted into intermediate frequency signals by front ends 12a and 12b, respectively, and then intermediate frequency amplified, detected and sent to the DSP.
17. As mentioned above, the DSP performs AD conversion on each detection output and stores it in the memory 16.
After a delay, the stored data is read from the memory and converted from DA to
Outputs DA conversion outputs Sa and Sb. That is, DSP
17 delays the detection output of each antenna by a time Td.

選択回路18は現在選択されているアンテナに応じたD
A変換信号を選択する。例えば、現在アンテナエ1aが
選択されているものとすれば、DA変換信号Saを選択
し、この選択された信号に基づいて放送音声がスピーカ
から出力される。
The selection circuit 18 selects D according to the currently selected antenna.
Select the A conversion signal. For example, if the antennae 1a is currently selected, the DA conversion signal Sa is selected, and broadcast audio is output from the speaker based on this selected signal.

以上と並行して、各ノイズ検出回路15a,15bは、
中間周波信号に含まれるマルチパスノイズを検出し、マ
ルチパスノイズレベルMa,Mbを出力する。アンテナ
切換判断回路21はマルチパスノイズレベルMa ,M
bを遅延時間と等しい時間Td間隔で取り込み、該マル
チパスノイズレベルに基づいて、アンテナ切り換えの必
要性が生じたか判断する。例えば、現在選択しているア
ンテナ(アンテナllaとする〉により受信された信号
に含まれるマルチパスノイズレベルMaが設定値より大
きくなり、かつ他方のアンテナ信号に含まれるマルチパ
スノイズレベルMbより大きくなると、アンテナ切り換
えを制御部22に指示する。
In parallel with the above, each noise detection circuit 15a, 15b
Multipath noise contained in the intermediate frequency signal is detected and multipath noise levels Ma and Mb are output. The antenna switching judgment circuit 21 determines the multipath noise levels Ma, M
b at intervals of time Td equal to the delay time, and based on the multipath noise level, it is determined whether antenna switching is necessary. For example, if the multipath noise level Ma included in the signal received by the currently selected antenna (referred to as antenna lla) becomes larger than the set value, and also becomes larger than the multipath noise level Mb included in the other antenna signal, , instructs the control unit 22 to switch the antenna.

制御部22は該指示によりアンテナ切換指令を発生し,
選択回路18をして他方のアンテナllbに応じたDA
変換信号Saを選択出力させる。この結果、マルチパス
ノイズ検出時刻から遅延時間Tdだけ遡ってアンテナ受
信信号が切り換えられるため、マルチパスノイズの切り
残しが生じない。
The control unit 22 generates an antenna switching command based on the instruction,
The selection circuit 18 selects a DA corresponding to the other antenna llb.
The converted signal Sa is selectively output. As a result, the antenna reception signal is switched back by the delay time Td from the multipath noise detection time, so that no multipath noise is left uncut.

〈発明の効果〉 以上本発明によれば、第l,第2のアンテナにより受信
された放送信号をそれぞれ所定時間遅延し、現アンテナ
に応じた一方の遅延信号を選択して出力すると共に、遅
延前の第1、第2アンテナの受信信号に含まれるマルチ
パスノイズを検出し、現在選択されているアンテナのマ
ルチパスノイズが大きくなって、アンテナ切り換えの必
要性が生じた時、他のアンテナに応じた遅延信号を選択
出力するように構成したから、マルチパスノイズ検出時
刻から遅延時間Tdだけ遡ってアンテナが切り換えられ
るため、マルチバスノイズの切り残しが生じない。
<Effects of the Invention> According to the present invention, the broadcast signals received by the first and second antennas are each delayed for a predetermined time, one of the delayed signals corresponding to the current antenna is selected and output, and the delayed signal is The multipath noise included in the received signals of the previous first and second antennas is detected, and when the multipath noise of the currently selected antenna becomes large and it becomes necessary to switch antennas, Since the antenna is configured to selectively output a corresponding delayed signal, the antenna is switched back by the delay time Td from the multipath noise detection time, so that no multipath noise is left uncut.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明に係るダイバーシティラジオ受信機のブロッ
ク図である。 11a,11b・・第1、第2アンテナ15a,工5b
・・ノイズ検出回路 16・・メモリ 17・・DSP 18・・選択回路 21・・アンテナ切換判断回路
The figure is a block diagram of a diversity radio receiver according to the present invention. 11a, 11b...first and second antennas 15a, 5b
... Noise detection circuit 16 ... Memory 17 ... DSP 18 ... Selection circuit 21 ... Antenna switching judgment circuit

Claims (1)

【特許請求の範囲】[Claims] 第1、第2のアンテナにより受信された放送信号をそれ
ぞれ所定時間遅延させる遅延手段と、第1、第2アンテ
ナに応じた遅延信号のうち一方を選択出力する選択回路
と、第1、第2アンテナにより受信された放送信号に含
まれるマルチパスノイズを検出するノイズ検出部と、マ
ルチパスノイズに基づいて遅延手段から出力される2つ
の遅延信号のうち一方を選択させる判断部とを有するこ
とを特徴とするダイバーシティラジオ受信機。
a delay means for delaying broadcast signals received by the first and second antennas by a predetermined time, respectively; a selection circuit for selectively outputting one of the delayed signals corresponding to the first and second antennas; The present invention includes a noise detection unit that detects multipath noise included in a broadcast signal received by an antenna, and a determination unit that selects one of two delayed signals output from the delay means based on the multipath noise. Features a diversity radio receiver.
JP1191184A 1989-07-24 1989-07-24 Diversity radio receiver Pending JPH0354924A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1191184A JPH0354924A (en) 1989-07-24 1989-07-24 Diversity radio receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1191184A JPH0354924A (en) 1989-07-24 1989-07-24 Diversity radio receiver

Publications (1)

Publication Number Publication Date
JPH0354924A true JPH0354924A (en) 1991-03-08

Family

ID=16270299

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1191184A Pending JPH0354924A (en) 1989-07-24 1989-07-24 Diversity radio receiver

Country Status (1)

Country Link
JP (1) JPH0354924A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6310727A (en) * 1986-04-16 1988-01-18 ペルストルプ アクティエボラーグ Medicinal composition containing inositol triphosphate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6310727A (en) * 1986-04-16 1988-01-18 ペルストルプ アクティエボラーグ Medicinal composition containing inositol triphosphate

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