JPH0330876U - - Google Patents
Info
- Publication number
- JPH0330876U JPH0330876U JP9178789U JP9178789U JPH0330876U JP H0330876 U JPH0330876 U JP H0330876U JP 9178789 U JP9178789 U JP 9178789U JP 9178789 U JP9178789 U JP 9178789U JP H0330876 U JPH0330876 U JP H0330876U
- Authority
- JP
- Japan
- Prior art keywords
- detection circuit
- circuit
- voltage application
- pair
- output terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 16
- 238000009413 insulation Methods 0.000 claims description 7
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Testing Relating To Insulation (AREA)
- Measurement Of Resistance Or Impedance (AREA)
Description
第1図は本考案の第1実施例を示す耐圧・絶縁
試験器の一部回路図、第2図は本考案の第2実施
例を示す耐圧・絶縁試験器の一部回路図、第3図
は本考案の第3実施例を示す耐圧・絶縁試験器の
一部回路図、第4図は本考案の第4実施例を示す
耐圧・絶縁試験器の一部回路図である。
1……電源回路、3,5,11……変圧器、7
……第1検出回路、9……第2検出回路、21,
23……第1電圧印加端子、25,27……第1
出力端子、31,33……第2電圧印加端子、3
5,37……第2出力端子、41……対象物。
Fig. 1 is a partial circuit diagram of a withstand voltage/insulation tester showing a first embodiment of the present invention, Fig. 2 is a partial circuit diagram of a withstand voltage/insulation tester showing a second embodiment of the present invention, and Fig. 3 is a partial circuit diagram of a withstand voltage/insulation tester showing a second embodiment of the present invention. The figure is a partial circuit diagram of a withstand voltage/insulation tester showing a third embodiment of the present invention, and FIG. 4 is a partial circuit diagram of a withstand voltage/insulation tester showing a fourth embodiment of the present invention. 1... Power supply circuit, 3, 5, 11... Transformer, 7
...First detection circuit, 9...Second detection circuit, 21,
23...first voltage application terminal, 25, 27...first
Output terminal, 31, 33...Second voltage application terminal, 3
5, 37...second output terminal, 41...target object.
Claims (1)
して第1検出回路、第2検出回路、試験電圧印加
回路を配置し、上記第1検出回路は一対の第1電
圧印加端子と一対の第1出力端子を備え、上記第
1出力端子を対象物に当接させ、上記第2検出回
路は一対の第2電圧印加端子と一対の第2出力端
子を備え、上記第2出力端子を対象物に当接させ
、上記第1検出回路および第2検出回路に電圧を
印加して、第1出力端子および第2出力端子の対
象物への接触・非接触を検出し、第1出力端子お
よび第2出力端子の両方が対象物に接触している
場合に、上記試験電圧印加回路を介して対象物に
試験電圧を印加するようにしたことを特徴とする
耐圧・絶縁試験器。 2 電源回路を設け、この電源回路に変圧器を介
して第1検出回路、第2検出回路、試験電圧印加
回路を配置し、上記第1検出回路は一対の第1電
圧印加端子と一対の第1出力端子を備え、上記第
1出力端子を対象物に当接させ、上記第2検出回
路は一対の第2電圧印加端子と一対の第2出力端
子を備え、上記第2出力端子を対象物に当接させ
、上記第1検出回路、第2検出回路、試験電圧印
加回路に電圧を印加し、第1出力端子および第2
出力端子の少なくとも一方が対象物に接触してい
ない場合に、上記試験電圧印加回路を介しての試
験電圧の印加を遮断するようにしたことを特徴と
する耐圧・絶縁試験器。[Claims for Utility Model Registration] 1. A power supply circuit is provided, and a first detection circuit, a second detection circuit, and a test voltage application circuit are arranged in this power supply circuit via a transformer, and the first detection circuit is connected to a pair of first detection circuits. The second detection circuit includes a first voltage application terminal and a pair of first output terminals, the first output terminal is brought into contact with an object, and the second detection circuit includes a pair of second voltage application terminals and a pair of second output terminals, The second output terminal is brought into contact with the object, voltage is applied to the first detection circuit and the second detection circuit, and contact/non-contact of the first output terminal and the second output terminal with the object is detected. and a test voltage is applied to the object via the test voltage application circuit when both the first output terminal and the second output terminal are in contact with the object. Insulation tester. 2. A power supply circuit is provided, and a first detection circuit, a second detection circuit, and a test voltage application circuit are arranged in this power supply circuit via a transformer, and the first detection circuit has a pair of first voltage application terminals and a pair of first voltage application terminals. The second detection circuit includes a pair of second voltage application terminals and a pair of second output terminals, and the second output terminal is brought into contact with the target object. and apply a voltage to the first detection circuit, the second detection circuit, and the test voltage application circuit, and the first output terminal and the second
A withstand voltage/insulation tester characterized in that application of a test voltage via the test voltage application circuit is cut off when at least one of the output terminals is not in contact with an object.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9178789U JPH0330876U (en) | 1989-08-03 | 1989-08-03 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9178789U JPH0330876U (en) | 1989-08-03 | 1989-08-03 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0330876U true JPH0330876U (en) | 1991-03-26 |
Family
ID=31641252
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9178789U Pending JPH0330876U (en) | 1989-08-03 | 1989-08-03 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0330876U (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002153802A (en) * | 2000-11-16 | 2002-05-28 | Inoac Corp | Coating method and method of manufacturing transporting roller |
JP2007307511A (en) * | 2006-05-19 | 2007-11-29 | Dai Ichi High Frequency Co Ltd | Bent pipe coating method and bent pipe coating device |
JP2008036474A (en) * | 2006-08-02 | 2008-02-21 | Dai Ichi High Frequency Co Ltd | Method of coating metal strip with resin and apparatus for holding and turning metal strip |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59141076A (en) * | 1983-01-31 | 1984-08-13 | Nec Home Electronics Ltd | Insulation tester |
JPS59171874A (en) * | 1983-03-18 | 1984-09-28 | Matsushita Electric Ind Co Ltd | Dielectric strength testing machine |
JPS6054976B2 (en) * | 1983-06-09 | 1985-12-03 | 大阪曹達株式会社 | Halogen-containing polymer vulcanization composition |
JPS6348167B2 (en) * | 1981-03-05 | 1988-09-28 | Omron Tateisi Electronics Co |
-
1989
- 1989-08-03 JP JP9178789U patent/JPH0330876U/ja active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6348167B2 (en) * | 1981-03-05 | 1988-09-28 | Omron Tateisi Electronics Co | |
JPS59141076A (en) * | 1983-01-31 | 1984-08-13 | Nec Home Electronics Ltd | Insulation tester |
JPS59171874A (en) * | 1983-03-18 | 1984-09-28 | Matsushita Electric Ind Co Ltd | Dielectric strength testing machine |
JPS6054976B2 (en) * | 1983-06-09 | 1985-12-03 | 大阪曹達株式会社 | Halogen-containing polymer vulcanization composition |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002153802A (en) * | 2000-11-16 | 2002-05-28 | Inoac Corp | Coating method and method of manufacturing transporting roller |
JP4729166B2 (en) * | 2000-11-16 | 2011-07-20 | 株式会社イノアックコーポレーション | Coating method and manufacturing method of conveying roller |
JP2007307511A (en) * | 2006-05-19 | 2007-11-29 | Dai Ichi High Frequency Co Ltd | Bent pipe coating method and bent pipe coating device |
JP2008036474A (en) * | 2006-08-02 | 2008-02-21 | Dai Ichi High Frequency Co Ltd | Method of coating metal strip with resin and apparatus for holding and turning metal strip |
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