JPH0325844B2 - - Google Patents

Info

Publication number
JPH0325844B2
JPH0325844B2 JP55166551A JP16655180A JPH0325844B2 JP H0325844 B2 JPH0325844 B2 JP H0325844B2 JP 55166551 A JP55166551 A JP 55166551A JP 16655180 A JP16655180 A JP 16655180A JP H0325844 B2 JPH0325844 B2 JP H0325844B2
Authority
JP
Japan
Prior art keywords
head
amplifier circuit
input section
regenerative amplifier
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP55166551A
Other languages
Japanese (ja)
Other versions
JPS5792403A (en
Inventor
Takao Arai
Takaharu Noguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP16655180A priority Critical patent/JPS5792403A/en
Priority to US06/324,674 priority patent/US4492997A/en
Priority to EP81109854A priority patent/EP0053343A1/en
Publication of JPS5792403A publication Critical patent/JPS5792403A/en
Publication of JPH0325844B2 publication Critical patent/JPH0325844B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/127Structure or manufacture of heads, e.g. inductive
    • G11B5/33Structure or manufacture of flux-sensitive heads, i.e. for reproduction only; Combination of such heads with means for recording or erasing only
    • G11B5/39Structure or manufacture of flux-sensitive heads, i.e. for reproduction only; Combination of such heads with means for recording or erasing only using magneto-resistive devices or effects
    • G11B5/3903Structure or manufacture of flux-sensitive heads, i.e. for reproduction only; Combination of such heads with means for recording or erasing only using magneto-resistive devices or effects using magnetic thin film layers or their effects, the films being part of integrated structures
    • G11B5/3906Details related to the use of magnetic thin film layers or to their effects
    • G11B5/3945Heads comprising more than one sensitive element
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/24Signal processing not specific to the method of recording or reproducing; Circuits therefor for reducing noise
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/02Recording, reproducing, or erasing methods; Read, write or erase circuits therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Manufacturing & Machinery (AREA)
  • Magnetic Heads (AREA)
  • Recording Or Reproducing By Magnetic Means (AREA)

Description

【発明の詳細な説明】 本発明はPCMレコーダに使用して好適なMR
ヘツド用再生増幅回路に関する。
[Detailed Description of the Invention] The present invention provides an MR suitable for use in a PCM recorder.
This invention relates to a regenerative amplifier circuit for a head.

MRヘツド(Magnetoresistive Head)は、パ
ーマロイなどの強磁性薄膜の磁気抵抗効果を利用
したヘツドであり、この種のヘツドとしては第1
図に示すようなものがある。第1図において、1
および2は金属電極、3は強磁性薄膜、4は磁気
記録媒体であり、金属電極1,2に電流を流すよ
うに構成され、外部磁界がないときは電流ベクト
ルIと強磁性薄膜3の磁化容易軸方向は45°とな
つている。このようなヘツドに信号磁化MTを持
つた磁気記録媒体4が接したとき、磁化MTの磁
界により強磁性薄膜3が電流ベクトルIとθの角
度方向に磁化され、この角度θの磁化ベクトルの
回転変化と磁気記録媒体MTの大きさに応じて強
磁性薄膜3の電気抵抗が変化する。そこでこの抵
抗変化を金属電極1と2の電位差で検出すること
により再生出力が得られるようになつている。
The MR head (Magnetoresistive Head) is a head that utilizes the magnetoresistive effect of a ferromagnetic thin film such as permalloy, and is the first of its kind.
There is something like the one shown in the figure. In Figure 1, 1
and 2 are metal electrodes, 3 is a ferromagnetic thin film, and 4 is a magnetic recording medium, which is configured to allow current to flow through the metal electrodes 1 and 2, and when there is no external magnetic field, the current vector I and the magnetization of the ferromagnetic thin film 3 The easy axis direction is 45°. When a magnetic recording medium 4 having a signal magnetization M T comes into contact with such a head, the ferromagnetic thin film 3 is magnetized by the magnetic field of the magnetization M T in the direction of the angle between the current vector I and θ, and the magnetization vector at this angle θ The electrical resistance of the ferromagnetic thin film 3 changes depending on the rotational change of the magnetic recording medium M T and the size of the magnetic recording medium M T . Therefore, by detecting this resistance change using the potential difference between metal electrodes 1 and 2, a reproduced output can be obtained.

このため、従来のMRヘツド用の再生増幅回路
としては、MRヘツドに停電流を流す駆動電流回
路と、抵抗変化を検出する増幅回路とを別々に構
成した第2図に示す回路が用いられていた。第2
図において、5はMRヘツド、6はトランジス
タ、7は差動増幅回路、8〜11はコンデンサ、
12〜17は抵抗、18は直流電源、19は出力
信号である。第2図において、トランジスタ6は
MRヘツド電流駆動用で抵抗12〜14および直
流電源18の電源電圧で駆動電流は定まる。MR
ヘツド5を定電流で駆動すれば、MRヘツド5に
印加される外部磁界に比例してMRヘツドの抵抗
が変化するためトランジスタ6のコレクタ電圧が
変化し、それを差動増幅回路7、コンデンサ9〜
11、抵抗15〜17で構成される増幅回路によ
り増幅するものである。この従来例では、電流駆
動回路と増幅回路とを別々に構成する必要があり
回路構成が複雑となり、かつ雑音源がMRヘツド
5の抵抗雑音、差動増幅回路7のトランジスタ雑
音以外にも抵抗14,16による熱雑音およびト
ランジスタ6による雑音など多く、低雑音化が困
難な欠点であつた。
For this reason, as a conventional regenerative amplifier circuit for an MR head, the circuit shown in Figure 2 is used, which has a drive current circuit that supplies a power failure current to the MR head and an amplifier circuit that detects resistance changes, which are configured separately. Ta. Second
In the figure, 5 is an MR head, 6 is a transistor, 7 is a differential amplifier circuit, 8 to 11 are capacitors,
12 to 17 are resistors, 18 is a DC power supply, and 19 is an output signal. In FIG. 2, transistor 6 is
The drive current is determined by the resistors 12 to 14 and the power supply voltage of the DC power supply 18 for driving the MR head current. MR
When the head 5 is driven with a constant current, the resistance of the MR head changes in proportion to the external magnetic field applied to the MR head 5, so the collector voltage of the transistor 6 changes, which is then applied to the differential amplifier circuit 7 and the capacitor 9. ~
11, the signal is amplified by an amplifier circuit composed of resistors 15 to 17. In this conventional example, it is necessary to configure the current drive circuit and the amplifier circuit separately, which makes the circuit configuration complicated, and the noise sources are not only the resistance noise of the MR head 5 and the transistor noise of the differential amplifier circuit 7, but also the resistance noise of the resistor 14. , 16 and noise caused by the transistor 6, which are drawbacks that make it difficult to reduce the noise.

本発明の目的は、従来の欠点をなくし、MRヘ
ツドの電流駆動回路、再生増幅回路の構成を簡単
化し、かつ低雑音化を計つたMRヘツド用再生増
幅回路を提供するにある。
SUMMARY OF THE INVENTION It is an object of the present invention to provide a regenerative amplifier circuit for an MR head which eliminates the conventional drawbacks, simplifies the configuration of the current drive circuit and regenerative amplifier circuit of the MR head, and achieves low noise.

本発明は、MRヘツドが等価的には抵抗と同じ
であることを利用し、増幅回路の負帰還抵抗一部
としてMRヘツドを接続して電流駆動および増幅
回路を構成し、回路構成の簡単化および低雑音化
を計つたものである。
The present invention utilizes the fact that the MR head is equivalent to a resistor, and connects the MR head as part of the negative feedback resistor of the amplifier circuit to form a current drive and amplifier circuit, thereby simplifying the circuit configuration. and low noise.

以下図面に示した実施例によつて本発明を詳細
に説明する。
The present invention will be explained in detail below with reference to embodiments shown in the drawings.

本発明による具体的一実施例回路図を第3図に
示す。第3図において5はMRヘツド、7は差動
増幅回路、11はコンデンサ、18は直流電源、
19は出力信号、20はコンデンサ、21〜23
は抵抗である。第3図において差動増幅回路7の
オープンループの利得がクローズドループの利得
にに比べ十分高ければ、抵抗23とMRヘツド5
の接続点の電圧が抵抗21と22の接続点の電圧
に等しくなるよう抵抗23を介してMRヘツド5
に電流が供給される。またMRヘツド5に印加さ
れる外部磁界によりMRヘツド5の抵抗が変化す
れば、MRヘツド5と抵抗23の接続点の電圧は
常に抵抗21,22の接続点の電圧に等しくなる
よう帰還電流が変化するため、抵抗23の両端に
はMRヘツド5の抵抗変化に比例した出力電圧が
得られる。またさらに第3図の回路では雑音源と
してMRヘツド5の抵抗雑音および差動増幅回路
7のトランジスタ雑音だけとなり、差動増幅回路
7初段トランジスタに抵雑音トランジスタを使用
するだけで、MRヘツド用低雑音再生増幅回路が
実現できる。
A circuit diagram of a specific embodiment of the present invention is shown in FIG. In Fig. 3, 5 is an MR head, 7 is a differential amplifier circuit, 11 is a capacitor, 18 is a DC power supply,
19 is an output signal, 20 is a capacitor, 21 to 23
is resistance. In FIG. 3, if the open loop gain of the differential amplifier circuit 7 is sufficiently higher than the closed loop gain, the resistor 23 and the MR head 5
The MR head 5 is connected through the resistor 23 so that the voltage at the connection point of the resistors 21 and 22 is equal to the voltage at the connection point of the resistors 21 and 22.
Current is supplied to Furthermore, if the resistance of the MR head 5 changes due to the external magnetic field applied to the MR head 5, the feedback current is adjusted such that the voltage at the connection point between the MR head 5 and the resistor 23 is always equal to the voltage at the connection point between the resistors 21 and 22. Therefore, an output voltage proportional to the resistance change of the MR head 5 is obtained across the resistor 23. Furthermore, in the circuit of FIG. 3, the only noise sources are the resistance noise of the MR head 5 and the transistor noise of the differential amplifier circuit 7, and by simply using a resistance noise transistor as the first stage transistor of the differential amplifier circuit 7, the noise source can be reduced. A noise regenerative amplifier circuit can be realized.

第4図は本発明によりさらに簡単化かつ低雑音
化されたMRヘツド用再生増幅回路の第2の実施
例の回路図を示す。第4図において、5はMRヘ
ツド、11はコンデンサ、19は出力信号、24
はトランジスタ、25はコンデンサ、26はMR
ヘツド電流調整用可変抵抗、27,28は抵抗で
ある。第4図も第3図と原理的には同じで、MR
ヘツド5に印加される電圧はトランジスタ24の
ベース電圧−VF(トランジスタ24のVBE電圧)
でほぼ一定となるようにコレクタ電流が流れる。
MRヘツド5に印加される外部磁界の変化により
MRヘツド5の抵抗が変化すれば、コレクタ電流
が変化しコンデンサ11を通して外部磁界の変化
に比例した出力信号が得られる。また雑音源も第
3図と同様であるが、第3図の差動増幅回路と異
なりトランジスタを1個しか使用しないためトラ
ンジスタ雑音の低減には有利であるが、リニアリ
テイの点でやや劣る場合がある。第5図はそのリ
ニアリテイを改善した本発明による第3の実施例
回路図を示す。第5図において5はMRヘツド、
11,25,35はコンデンサ、19は出力信
号、24,30〜32はトランジスタ、26は可
変低抗、27,36〜41は抵抗、29は直流電
源、33,34はダイオードである。第5図は原
理的には第4図と全く同じであるが、直結3段構
成の増幅回路を採用することにより、第4図の持
つリニアリテイに難がある欠点を解消したもので
ある。
FIG. 4 shows a circuit diagram of a second embodiment of a regenerative amplifier circuit for an MR head which is further simplified and has lower noise according to the present invention. In Fig. 4, 5 is an MR head, 11 is a capacitor, 19 is an output signal, and 24
is a transistor, 25 is a capacitor, 26 is MR
Variable resistors 27 and 28 are resistors for adjusting head current. Figure 4 is the same in principle as Figure 3, and MR
The voltage applied to the head 5 is the base voltage of the transistor 24 - V F (V BE voltage of the transistor 24)
The collector current flows so that it is almost constant at .
Due to changes in the external magnetic field applied to the MR head 5,
When the resistance of the MR head 5 changes, the collector current changes, and an output signal proportional to the change in the external magnetic field is obtained through the capacitor 11. The noise source is also the same as in Figure 3, but unlike the differential amplifier circuit in Figure 3, it uses only one transistor, which is advantageous in reducing transistor noise, but may be slightly inferior in terms of linearity. be. FIG. 5 shows a circuit diagram of a third embodiment of the present invention with improved linearity. In Fig. 5, 5 is the MR head;
11, 25, and 35 are capacitors, 19 is an output signal, 24, 30-32 are transistors, 26 is a variable resistor, 27, 36-41 are resistors, 29 is a DC power supply, and 33, 34 are diodes. The principle of FIG. 5 is exactly the same as that of FIG. 4, but by employing a direct-coupled three-stage amplifier circuit, the drawback of FIG. 4, which is poor linearity, is overcome.

本発明はMRヘツドが抵抗であることを利用
し、再生増幅回路の帰還回路の1部に使用するこ
とにより再生増幅回路と別な電流駆動回路を省略
することが出来、さらに電流駆動回路に起因する
雑音源を取り去ることができMRヘツド用の低雑
音再生増幅回路が実現出来るものである。
The present invention makes use of the fact that the MR head is a resistor, and by using it as part of the feedback circuit of the regenerative amplifier circuit, it is possible to omit a current drive circuit separate from the regenerative amplifier circuit. This enables the realization of a low-noise regenerative amplifier circuit for MR heads by eliminating the noise source.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はMRヘツドの原理構造図、第2図は従
来のMRヘツド用再生増幅回路、第3図、第4図
及び第5図は本発明によるMRヘツド用再生増幅
回路の3つの実施例の回路図である。また図の主
要部分を表わす符号の説明は次の通りである。 1〜2:金属電極、3:強磁性薄膜、4:磁気
記録媒体、5:MRヘツド、7:差動増幅回路、
11,20,25,35:コンデンサ、18,2
9:直流電源、19:出力信号、21〜23,2
7,28,33,34,36〜41:抵抗、2
4,30〜32:トランジスタ、26:可変抵抗
である。
Fig. 1 is a diagram of the principle structure of an MR head, Fig. 2 is a conventional regenerative amplifier circuit for an MR head, and Figs. 3, 4, and 5 are three embodiments of a regenerative amplifier circuit for an MR head according to the present invention. FIG. Further, the explanations of the symbols representing the main parts of the figure are as follows. 1-2: metal electrode, 3: ferromagnetic thin film, 4: magnetic recording medium, 5: MR head, 7: differential amplifier circuit,
11, 20, 25, 35: Capacitor, 18, 2
9: DC power supply, 19: Output signal, 21 to 23, 2
7, 28, 33, 34, 36-41: Resistance, 2
4, 30 to 32: transistor, 26: variable resistor.

Claims (1)

【特許請求の範囲】 1 磁気ヘツドを構成する磁気抵抗効果素子に接
続され、該磁気抵抗効果素子に生じる再生信号を
増幅するMRヘツド用再生増幅回路であつて、 直流の基準電圧を発生する直流電圧発生手段
と、該直流電圧発生手段が発生する基準電圧を供
給される第1の入力部と、該第1の入力部に供給
される基準電圧に基づいて所定電圧を誘起される
第2の入力部と、前記第1の入力部と前記第2の
入力部との入力信号に応じた出力電圧を発生する
出力部と、該出力部と前記第2の入力部との間に
接続される帰還回路とを備えるMRヘツド用再生
増幅回路において、 前記帰還回路は、共通電位の位置との間に前記
磁気抵抗効果素子を接続され、 前記磁気抵抗効果素子は、前記第2の入力部に
誘起される所定電圧と前記共通電位との電位差に
基づく駆動電流のみを供給される ことを特徴とするMRヘツド用再生増幅回路。 2 特許請求の範囲第1項において、 前記磁気抵抗効果素子は、前記第2の入力部に
一端を接続されるとともに、他端を接地される ことを特徴とするMRヘツド用再生増幅回路。
[Scope of Claims] 1. A regenerative amplifier circuit for an MR head that is connected to a magnetoresistive element constituting a magnetic head and amplifies a reproduction signal generated in the magnetoresistive element, which includes a direct current that generates a direct current reference voltage. A voltage generating means, a first input section supplied with a reference voltage generated by the DC voltage generating means, and a second input section induced with a predetermined voltage based on the reference voltage supplied to the first input section. an input section; an output section that generates an output voltage according to input signals of the first input section and the second input section; and an output section connected between the output section and the second input section. A regenerative amplifier circuit for an MR head comprising a feedback circuit, wherein the feedback circuit has the magnetoresistive element connected between the feedback circuit and a common potential position, and the magnetoresistive element 1. A regenerative amplifier circuit for an MR head, characterized in that a regenerative amplifier circuit for an MR head is supplied with only a drive current based on a potential difference between a predetermined voltage and the common potential. 2. The regenerative amplifier circuit for an MR head according to claim 1, wherein the magnetoresistive element has one end connected to the second input section and the other end grounded.
JP16655180A 1980-11-28 1980-11-28 Regenerative amplifying circuit for mr head Granted JPS5792403A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP16655180A JPS5792403A (en) 1980-11-28 1980-11-28 Regenerative amplifying circuit for mr head
US06/324,674 US4492997A (en) 1980-11-28 1981-11-24 Reproducing and amplifying circuit for magnetoresistive head
EP81109854A EP0053343A1 (en) 1980-11-28 1981-11-24 Reproducing and amplifying circuit for magnetoresistive head

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16655180A JPS5792403A (en) 1980-11-28 1980-11-28 Regenerative amplifying circuit for mr head

Publications (2)

Publication Number Publication Date
JPS5792403A JPS5792403A (en) 1982-06-09
JPH0325844B2 true JPH0325844B2 (en) 1991-04-09

Family

ID=15833357

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16655180A Granted JPS5792403A (en) 1980-11-28 1980-11-28 Regenerative amplifying circuit for mr head

Country Status (1)

Country Link
JP (1) JPS5792403A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5930062A (en) * 1996-10-03 1999-07-27 Hewlett-Packard Company Actively stabilized magnetoresistive head

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5153843A (en) * 1974-11-06 1976-05-12 Nippon Kokan Kk KYORISOKUTEIHOHO
JPS551698A (en) * 1978-06-19 1980-01-08 Philips Nv Magnetic reading head

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5153843A (en) * 1974-11-06 1976-05-12 Nippon Kokan Kk KYORISOKUTEIHOHO
JPS551698A (en) * 1978-06-19 1980-01-08 Philips Nv Magnetic reading head

Also Published As

Publication number Publication date
JPS5792403A (en) 1982-06-09

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