JPH03254179A - Manufacture of wiring board - Google Patents

Manufacture of wiring board

Info

Publication number
JPH03254179A
JPH03254179A JP5304590A JP5304590A JPH03254179A JP H03254179 A JPH03254179 A JP H03254179A JP 5304590 A JP5304590 A JP 5304590A JP 5304590 A JP5304590 A JP 5304590A JP H03254179 A JPH03254179 A JP H03254179A
Authority
JP
Japan
Prior art keywords
palladium
wiring board
board
solution containing
solution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5304590A
Other languages
Japanese (ja)
Inventor
Akinari Kida
木田 明成
Kazuyasu Minagawa
一泰 皆川
Naoyuki Urasaki
直之 浦崎
Shuichi Hatakeyama
修一 畠山
Akishi Nakaso
昭士 中祖
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP5304590A priority Critical patent/JPH03254179A/en
Publication of JPH03254179A publication Critical patent/JPH03254179A/en
Pending legal-status Critical Current

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PURPOSE:To completely remove palladium from an unnecessary part without melting copper with low cost by removing palladium from the board surface by using a specific solution. CONSTITUTION:Palladium 5 on the surface of a board 3 is removed by using a solution containing potassium permanganate and a solution containing an aromatic nitro compound, an amine compound, aminocarboxylic acid, carboxylic acid and sodium hydroxide. That is, a resin oxidation layer having an uneven form is formed on the surface of the board 3 by dipping in a solution containing potassium permanganate in a palladium removing process, while a resin oxidation layer on the surface of the board 3 can be removed by dipping in a solution of an aromatic nitro compound, an amine compound, aminocarbonic acid, carbonic acid and sodium hydroxide. Thereby, palladium 5 existing in a resin oxidation layer having an uneven form can be completely excluded from the surface of the board 3.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は高密度配線板の製造法に関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a method for manufacturing a high-density wiring board.

(従来の技術) 近年、電子機器の小型、軽量化に伴い配線板にも配線の
高密度化が要求されており、それに伴って配線幅や配線
間隔が狭くなっている。
(Prior Art) In recent years, as electronic devices become smaller and lighter, wiring boards are required to have higher wiring densities, and accordingly, wiring widths and wiring intervals are becoming narrower.

現在の配線板の配線形成法では、絶縁基板上に銅箔を積
層し、その銅箔1−の回路となるべき部分にレジスト像
を形成し、不要部分の銅箔をウェットエツチングするサ
ブトラクト法が主流である。
The current wiring formation method for wiring boards uses a subtract method in which copper foil is laminated on an insulating substrate, a resist image is formed on the part of the copper foil 1- that is to become the circuit, and unnecessary parts of the copper foil are wet-etched. It's mainstream.

しかし、このサブトラクト法では、エツチングが等方向
に進行しやすいため、レジスト下部の銅もエツチングさ
れる“サイドエツチング現象が発生する。
However, in this subtract method, since etching tends to proceed in the same direction, a "side etching phenomenon" occurs in which the copper under the resist is also etched.

このため、微細配線をサブトラクト法で形成する際、配
線の細りゃ断線等が生じやすいという問題がある。
For this reason, when forming fine wiring by the subtract method, there is a problem in that the thinner the wiring is, the more likely it is to be disconnected.

一方、サブトラクト法と異なる配線形成法の一つに以下
に示すアディティブ法がある。この方法では、樹脂基板
表面にめっき触媒であるパラジウムを付着させた後、回
路とならない部分にフォトレジスト像を形成し、回路と
なる部分にめっきで銅を形成しフォトレジスト剥離後、
不要なパラジウムを除去することにより、配線が形成さ
れる。
On the other hand, one of the wiring formation methods different from the subtract method is the additive method described below. In this method, after depositing palladium as a plating catalyst on the surface of the resin substrate, a photoresist image is formed on the parts that will not form a circuit, copper is plated on the parts that will form a circuit, and after the photoresist is removed,
Wiring is formed by removing unnecessary palladium.

このアディティブ法では、配線形状がフォトレジスト像
の形成に依存する。このフォトレジスト像は、直進性の
高いUV光を用いて加圧するため、異方性が高く乗直な
フォトレジスト側壁形状を形成しやすい。
In this additive method, the wiring shape depends on the formation of a photoresist image. Since this photoresist image is pressed using highly linear UV light, it is easy to form a highly anisotropic photoresist sidewall shape that is linear.

このため、サイドエツチングの問題が少なく、微細配線
形成性に優れた加T法となっている。
Therefore, the added T method has fewer problems with side etching and is excellent in forming fine wiring.

このアディティブ法の製造工程の1つである不要パラジ
ウム除去工程において、以下に示す方法が行なわれてい
た。
In the unnecessary palladium removal step, which is one of the manufacturing steps of this additive method, the following method was performed.

すなわち、 (1)ヨウ素、ヨウ化アン牛ニウム溶液に浸漬し、パラ
ジウムを溶解する方法。
That is, (1) A method of dissolving palladium by immersing it in a solution of iodine and ammonium iodide.

(2)過マンガン酸カリウム溶液に浸漬し、パラジウム
を溶解する方法。
(2) A method of dissolving palladium by immersing it in a potassium permanganate solution.

(3)RIE(リアクティブイオンエツチング)等の真
空装置を用いて、パラジウム基板表面から離脱させ、真
空排気する方法などが採られている。
(3) A method has been adopted in which a vacuum device such as RIE (reactive ion etching) is used to separate the palladium from the surface of the palladium substrate and evacuate it.

(発明が解決しようとする課題) しかしながら、前述した従来のパラジウム除去法には以
下に示す問題点があった。
(Problems to be Solved by the Invention) However, the conventional palladium removal method described above has the following problems.

1、記ヨウ素、ヨウ化アンモニウム溶lCkに浸漬する
方法(1)では、パラジウムの溶解と同時に銅も溶解す
るため、配線の細りゃ断線が発生しやすかった。
1. In the method (1) of immersing the wire in an iodine and ammonium iodide solution lCk, copper is also dissolved at the same time as palladium is dissolved, so if the wire becomes thin, it is easy to break the wire.

−1−記過マンガン酸カリウム溶液に浸漬する方法(2
)では、樹脂基板を浸漬すると樹脂表面か酸化され、そ
の表面が微細な凹凸形状となる。この樹脂酸化がパラジ
ウムの溶解よ、り速く進むため、樹脂酸化層の凹部に存
在するパラジウムに処理液が接触しにくく、部分的にパ
ラジウム残りが発生した。
-1- Method of immersion in potassium permanganate solution (2)
), when a resin substrate is immersed, the resin surface is oxidized and the surface becomes microscopically uneven. Since this resin oxidation progressed faster than palladium dissolution, it was difficult for the processing liquid to come into contact with the palladium present in the recesses of the resin oxidation layer, resulting in partial palladium residue.

さらに、真空装置を用いる方法(3)では、ウェット処
理に比べ装置が高価なことや、処理できる基板枚数に制
限が生じること等から配線板製造コストが高くついてい
た。
Furthermore, in method (3) using a vacuum device, the manufacturing cost of wiring boards was high because the device was more expensive than wet processing and the number of substrates that could be processed was limited.

本発明は、]二記聞題点を鑑みてなされたもので、その
目的とするところは、銅を溶解することなく安価に不要
部分のパラジウムを完全に除去する配線板の製造法を提
供するものである。
The present invention has been made in view of the above two problems, and its purpose is to provide a method for manufacturing wiring boards that completely removes unnecessary palladium at low cost without dissolving copper. It is.

(課題を解決するための手段〉 L記課題を解決するため、本発明は、基板表面のパラジ
ウムを過マンガン酸カリウムを含む溶液と芳香族ニトロ
化合物、アミン化合物、アミノカルボン酸、カルボン酸
、水酸化ナトリウムを含む溶液を用いて除去することを
特徴とする配線板の製造法である。
(Means for Solving the Problems) In order to solve the problems listed in item L, the present invention provides palladium on the surface of a substrate with a solution containing potassium permanganate, an aromatic nitro compound, an amine compound, an aminocarboxylic acid, a carboxylic acid, and water. This is a method for manufacturing a wiring board, characterized in that removal is performed using a solution containing sodium oxide.

また、本発明が適用できる基板は、エポキシ樹脂、フェ
ノール樹脂、ポリイミド樹脂、ポリエステル樹脂等の熱
硬化性樹脂や、ポリエチレン、フッ素樹脂、ポリエーテ
ルサルフォン、ポリエーテルイミド等の熱可塑性樹脂や
NBR,アクリルゴム、シリコンゴム、ポリエチレンゴ
ム、ポリイソプレンゴム、ポリプロピレンゴム、ポリス
チレンゴム等のゴム性樹脂および前述した熱硬化性樹脂
、熱可塑性樹脂、ゴム性樹脂等と紙基材、ガラス布、ガ
ラス不織布、無材フィラー等を複合化したもの等である
In addition, the substrate to which the present invention can be applied is thermosetting resin such as epoxy resin, phenol resin, polyimide resin, polyester resin, thermoplastic resin such as polyethylene, fluororesin, polyether sulfone, polyetherimide, NBR, etc. Rubber resins such as acrylic rubber, silicone rubber, polyethylene rubber, polyisoprene rubber, polypropylene rubber, and polystyrene rubber, as well as the aforementioned thermosetting resins, thermoplastic resins, rubber resins, etc., and paper base materials, glass cloth, glass nonwoven fabrics, These are composites of non-material fillers, etc.

さらに、本発明が適用できるパラジウムの基板付着方法
はあえて限定されるものではなく、塩化パラジウム溶液
中に基板を浸漬して、基板表面に吸着させる方法、また
あらかじめ基板利料中にパラジウムを分散させておく方
法等である。
Furthermore, the method of attaching palladium to a substrate to which the present invention can be applied is not intentionally limited, and includes a method of immersing the substrate in a palladium chloride solution and adsorbing it to the substrate surface, and a method of dispersing palladium in the substrate material in advance. How to keep it.

なお、パラジウム除去時には、まず、過マンガン酸カリ
ウムを含む溶液(溶液A)に浸漬した後、次に芳香族ニ
トロ化合物、アミノ化合物、アミノカルボン酸、カルボ
ン酸、水酸化ナトリウ1、を含む溶液(溶液B)に浸漬
する。なお、必要であれば、順次溶液A、溶液Bに浸漬
することを複数回繰り返してもよい。
Note that when removing palladium, it is first immersed in a solution containing potassium permanganate (solution A), and then immersed in a solution containing an aromatic nitro compound, an amino compound, an aminocarboxylic acid, a carboxylic acid, and sodium hydroxide (solution A). Immerse in solution B). Note that, if necessary, sequential immersion in solution A and solution B may be repeated multiple times.

(作用) 」記聞構成の本発明による配線板の製造法は、パラジウ
ム除去工程において過マンガン酸カリウムを含む溶液に
浸漬することで、基板表面に凹凸形状を有する樹脂酸化
層が形成され、次に芳香族ニトロ化合物、アミン化合物
、アミノカルボン酸、カルボン酸、水酸化ナトリウムを
含む溶液に浸漬することで、基板表面の樹脂酸化層を除
去することができるので、凹凸形状を有した樹脂酸化層
に存在していたパラジウムを基板表面から完全排除する
ことができる。
(Function) In the method of manufacturing a wiring board according to the present invention having a paper structure, a resin oxide layer having an uneven shape is formed on the surface of the substrate by immersing it in a solution containing potassium permanganate in the palladium removal process, and then The resin oxide layer on the surface of the substrate can be removed by immersing it in a solution containing aromatic nitro compounds, amine compounds, aminocarboxylic acids, carboxylic acids, and sodium hydroxide. The existing palladium can be completely removed from the substrate surface.

(実施例) 以下、図面に基づき本発明による配線板の製造法の一実
施例を説明する。
(Example) Hereinafter, an example of the method for manufacturing a wiring board according to the present invention will be described based on the drawings.

通常の配線板に用いる35μmの銅箔1の片面に、以下
に示す条件で第1図に示すように、酸化銅2を形成する
As shown in FIG. 1, copper oxide 2 is formed on one side of a 35 μm thick copper foil 1 used for ordinary wiring boards under the following conditions.

(組成) NaOH:15g/、g Na3 PO4・12H20: 30g/、eNaCI
02       : 80g/、g純水      
   :全量でIJ2となる量(条件) 液温度         :85℃ 銅箔浸漬時間      =120秒 上記条件で、酸化銅を形成した後、第2図に示すように
銅箔の酸化銅を形成した面に、複数枚のガラス入りエポ
キシプリプレグE−67(日立化成工業、商品名)3を
接するように配置し、加熱加圧して積層体構造物とする
(Composition) NaOH: 15g/, g Na3 PO4・12H20: 30g/, eNaCI
02: 80g/g pure water
: Amount that makes the total amount IJ2 (conditions) Liquid temperature: 85°C Copper foil immersion time = 120 seconds After forming copper oxide under the above conditions, as shown in Figure 2, the surface of the copper foil on which copper oxide was formed is A plurality of glass-containing epoxy prepregs E-67 (trade name, Hitachi Chemical Co., Ltd., trade name) 3 are arranged so as to be in contact with each other, and heated and pressed to form a laminate structure.

そして、第3図に示すように通常の配線板製造工程で用
いられているNCドリルマシンで、所望の付置に貫通孔
4を設ける。
Then, as shown in FIG. 3, through holes 4 are formed at desired locations using an NC drill machine used in a normal wiring board manufacturing process.

その後、第4図に示すように、塩化第2銅水溶演を用い
て銅箔および酸化銅を化学的に除去する。
Thereafter, as shown in FIG. 4, the copper foil and copper oxide are chemically removed using cupric chloride aqueous solution.

この構造物を、めっき触媒吸着液であるH8−101B
 (日立化成工業、商品名)に浸漬後、めっき密着促進
剤であるADP201 (日立化成工業、商品名)に浸
漬して、第5図に示すように構造物表面にめっき触媒で
あるパラジウム5を吸着させる。
This structure was used as a plating catalyst adsorbent, H8-101B.
(Hitachi Chemical Co., Ltd., trade name) and then dipped in ADP201 (Hitachi Chemical Co., Ltd., trade name), which is a plating adhesion promoter, to coat the surface of the structure with palladium 5, which is a plating catalyst, as shown in Figure 5. Let it absorb.

次に、構造物表面に、ドライフィルムレジストであるフ
オテック5R−3000(日立化成工業、商品名)を貼
り合わせ、露光・現像して第6図に示すめっきレジスト
像6を形成する。
Next, a dry film resist, FOTECH 5R-3000 (trade name, manufactured by Hitachi Chemical Co., Ltd.), is bonded to the surface of the structure, and exposed and developed to form a plating resist image 6 shown in FIG. 6.

その後、以下の無電解銅めっき液に浸漬して、第7図に
示すめっき銅7を形成する。
Thereafter, it is immersed in the following electroless copper plating solution to form plated copper 7 shown in FIG.

(組成) CuSO+ ”5H20: 10g/fEDTA ・4
Na      : 40g/、e37%CH20: 
3mf/、C (条件) PH:12.3 めっき液温度      ニア0℃ このようにして、無電解銅めっき後、塩化メチレン溶成
に浸漬して、めっきレジスト像6を剥離し、過マンガン
酸カリウt1が六まれている薬品であるターフ4338
−C(化工材商事、商品名)を濃度50g/、e、7f
fl温80℃の水溶液にして、めっきレジスト像剥離後
のサンプルを浸漬し、引き続き、芳香族ニトロ化合物、
アミン化合物、アミノカルボン酸、カルボン酸が含まれ
ている薬品であるトップリップAZNol (奥野製薬
、商品名)を40 g/、e、トップリップAZNo2
 (奥野製薬、商品名)を500m、e/、e、それに
水酸化ナトリウムを30g/、e配合した液温90℃の
水溶液に浸漬して、第8図に示すように、不要部分のパ
ラジウムを除去し、配線板とする。
(Composition) CuSO+ "5H20: 10g/fEDTA ・4
Na: 40g/, e37% CH20:
3mf/, C (Conditions) PH: 12.3 Plating solution temperature Near 0°C In this way, after electroless copper plating, the plating resist image 6 was peeled off by dipping in methylene chloride solution, and potassium permanganate was removed. Turf 4338, a drug containing six t1
-C (Kakozai Shoji, trade name) at a concentration of 50g/, e, 7f
The sample after the plating resist image was peeled off was immersed in an aqueous solution with a fl temperature of 80°C, and then an aromatic nitro compound,
Toplip AZNol (Okuno Pharmaceutical, trade name), a drug containing amine compounds, aminocarboxylic acids, and carboxylic acids, at 40 g/e, Toplip AZNo2
(Okuno Pharmaceutical, trade name) was immersed in an aqueous solution containing 500 m, e/, e and 30 g/e of sodium hydroxide at a temperature of 90°C to remove palladium from unnecessary parts, as shown in Figure 8. Remove it and use it as a wiring board.

(発明の効果) 」記聞構成よりなるこの発明に係る配線板の製造方法に
よれは、下記のような効果が達成できる。
(Effects of the Invention) The following effects can be achieved by the method of manufacturing a wiring board according to the present invention having a record-and-record structure.

(1)銅配線の細りゃ断線がなく、安価に不要なパラジ
ウムを完全に除去できるため、高密度配線化に適したア
ディティブ法による配線板を高歩留で安価に製造できる
(1) There is no disconnection if the copper wiring becomes thin, and unnecessary palladium can be completely removed at low cost, so wiring boards can be manufactured at high yield and at low cost using the additive method, which is suitable for high-density wiring.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明に係る配線板の製造法の一実施例を示
すもので、銅箔に酸化銅を形成する工程の断面図、第2
図は第1図の酸化銅を形成した面に複数枚のガラス入り
エポキシプリプレグを接するように配置し、加熱加圧し
て積層体構造物を形成する工程を示す断面図、第3図は
第2図で形成した積層体に貫通孔を形成する通常の配線
板製造工程を示す断面図、第4図は第2図で形成した積
層体から塩化第2銅水溶液を用いて銅箔および酸化銅を
化学的に除去する工程を示す断面図、第5図は第4図の
工程で形成されたものにパラジウムを吸着させる吸着工
程を示す断面図、第6図は第5図でパラジウムを吸着さ
せた構造物表面にドライフィルムレジストを貼り合わせ
る工程を示す断面図、第7図は第6図で形成された構造
物を無電解銅めっき液に浸漬し、めっき銅を形成する工
程を示す断面図、第8図は第7図で形成された構造物か
ら不要部分のパラジウムを除去して配線板を形成する工
程を示す断面図である。 1・・・銅箔 2・・・酸化銅 3・・・絶縁基材 4・・・貫通孔 5・・・パラジウt5 6・・・めっきレジス・ト像 7・・・めっき銅
Fig. 1 shows an embodiment of the method for manufacturing a wiring board according to the present invention, and shows a cross-sectional view of the step of forming copper oxide on copper foil, and Fig.
The figure is a cross-sectional view showing the process of arranging a plurality of glass-filled epoxy prepregs so as to be in contact with the surface on which the copper oxide of Figure 1 is formed, and heating and pressurizing them to form a laminate structure. Figure 4 is a cross-sectional view showing a normal wiring board manufacturing process in which through holes are formed in the laminate formed in Figure 2. A cross-sectional view showing the chemical removal process, Figure 5 is a cross-sectional view showing the adsorption process in which palladium is adsorbed to the material formed in the process shown in Figure 4, and Figure 6 is a cross-sectional view showing the adsorption process in which palladium is adsorbed in the process shown in Figure 5. 7 is a sectional view showing a process of bonding a dry film resist to the surface of a structure; FIG. 7 is a sectional view showing a process of immersing the structure formed in FIG. 6 in an electroless copper plating solution to form plated copper; FIG. 8 is a sectional view showing a process of removing unnecessary portions of palladium from the structure formed in FIG. 7 to form a wiring board. 1... Copper foil 2... Copper oxide 3... Insulating base material 4... Through hole 5... Palladium t5 6... Plating resist image 7... Plated copper

Claims (1)

【特許請求の範囲】[Claims] 1.基板表面に無電解めっき用触媒であるパラジウムを
付着させ回路導体となる部分以外の箇所にめっきレジス
トを形成し、そのめっきレジストから露出した部分にの
み導体を形成してめっきレジストを解除した後、基板表
面に残ったパラジウムを除去する配線板の製造法におい
て、 基板表面のパラジウムを過マンガン酸カリウムを含む溶
液と芳香族ニトロ化合物、アミン化合物、アミノカルボ
ン酸、カルボン酸、水酸化ナトリウムを含む溶液を用い
て除去することを特徴とする配線板の製造法。
1. After depositing palladium, which is a catalyst for electroless plating, on the surface of the substrate and forming a plating resist in areas other than the parts that will become circuit conductors, forming a conductor only on the parts exposed from the plating resist and removing the plating resist, In a wiring board manufacturing method that removes palladium remaining on the substrate surface, palladium on the substrate surface is removed using a solution containing potassium permanganate, an aromatic nitro compound, an amine compound, an aminocarboxylic acid, a carboxylic acid, and a solution containing sodium hydroxide. A method for manufacturing a wiring board, characterized by removing the wiring board using a.
JP5304590A 1990-03-05 1990-03-05 Manufacture of wiring board Pending JPH03254179A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5304590A JPH03254179A (en) 1990-03-05 1990-03-05 Manufacture of wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5304590A JPH03254179A (en) 1990-03-05 1990-03-05 Manufacture of wiring board

Publications (1)

Publication Number Publication Date
JPH03254179A true JPH03254179A (en) 1991-11-13

Family

ID=12931910

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5304590A Pending JPH03254179A (en) 1990-03-05 1990-03-05 Manufacture of wiring board

Country Status (1)

Country Link
JP (1) JPH03254179A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08186351A (en) * 1994-12-27 1996-07-16 Internatl Business Mach Corp <Ibm> Circuit board and its preparation
JP2012511828A (en) * 2008-12-12 2012-05-24 ネーデルランドセ・オルガニサティ・フォール・トゥーヘパスト−ナトゥールウェテンスハッペライク・オンデルズーク・テーエヌオー Electronic circuit deposition method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08186351A (en) * 1994-12-27 1996-07-16 Internatl Business Mach Corp <Ibm> Circuit board and its preparation
JP2012511828A (en) * 2008-12-12 2012-05-24 ネーデルランドセ・オルガニサティ・フォール・トゥーヘパスト−ナトゥールウェテンスハッペライク・オンデルズーク・テーエヌオー Electronic circuit deposition method

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