JPH03230508A - Chip type ceramic electronic parts and manufacture thereof - Google Patents

Chip type ceramic electronic parts and manufacture thereof

Info

Publication number
JPH03230508A
JPH03230508A JP2025216A JP2521690A JPH03230508A JP H03230508 A JPH03230508 A JP H03230508A JP 2025216 A JP2025216 A JP 2025216A JP 2521690 A JP2521690 A JP 2521690A JP H03230508 A JPH03230508 A JP H03230508A
Authority
JP
Japan
Prior art keywords
solder
ceramic electronic
type ceramic
chip
external electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2025216A
Other languages
Japanese (ja)
Inventor
Yohachi Yamashita
洋八 山下
Michihiko Inaba
道彦 稲葉
Osamu Furukawa
修 古川
Hideyuki Kanai
金井 秀之
Mitsuo Harada
光雄 原田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2025216A priority Critical patent/JPH03230508A/en
Publication of JPH03230508A publication Critical patent/JPH03230508A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof

Abstract

PURPOSE:To obtain excellent reliability for thermal load, by constituting outer electrodes of soft solder alloy. CONSTITUTION:The damage of element main body 1-3 in the course of a heat cycle test is caused by the difference of thermal expansion between the element main body 1-3 and outer electrodes 4, 5. By considering oxidation resistance and the like, Pb-Sn based solder is selected. In order to reduce the stress applied to the element main body 1-3, the Young's modulus is decreased. The melting point of the outer electrodes is made higher than that of melted solder at the time of mounting a circuit board. Thereby a highly reliable electronic parts having excellent test characteristics for resistance to cycle or to heat shock can be obtained.

Description

【発明の詳細な説明】 [発明の目的コ (産業上の利用分野) 本発明は積層セラミックコンデンサに代表されるチップ
型セラミック電子部品及びその製造方法に係り、特に素
子本体に接合される外部電極の改良に関する。
[Detailed Description of the Invention] [Purpose of the Invention (Field of Industrial Application) The present invention relates to a chip-type ceramic electronic component represented by a multilayer ceramic capacitor and a method for manufacturing the same, and particularly relates to an external electrode bonded to an element body. Regarding improvements.

(従来の技術) 第1図に概略断面図として示したように積層型セラミッ
クコンデンサは、誘電体層(1)と内部電極(2)(3
)とが交互に積層・一体止された構造を取る。内部電極
(2) (3)は対向する端面のそれぞれに交互に引き
出され、その端面に形成された外部電極(4) (5)
により電気的接合が行なわれている。
(Prior Art) As shown in a schematic cross-sectional view in Fig. 1, a multilayer ceramic capacitor consists of a dielectric layer (1), internal electrodes (2), (3)
) are alternately laminated and fixed together. The internal electrodes (2) (3) are drawn out alternately to each of the opposing end faces, and the external electrodes (4) (5) are formed on the end faces.
Electrical connection is performed by.

般的にはこの内部電極はAg/Pd系合金からなる。Generally, this internal electrode is made of an Ag/Pd alloy.

これは一体止が内部電極と誘電体層との同時焼成により
行なわれるため、1000℃を越えるような誘電体の焼
結条件下でも導電性を失うことなく、また誘電体の特性
に悪影響を及ぼさないことが必要だからである。−力作
部電極も通常Ag/Pd系合金ベーストを焼き付けるこ
とにより形成される。これは内部電極との確実な電気的
接合を得るためである。
This is achieved by simultaneously firing the internal electrode and dielectric layer, so that conductivity is not lost even under dielectric sintering conditions that exceed 1000°C, and the properties of the dielectric are not adversely affected. This is because it is necessary that there is no such thing. - The force acting part electrode is also usually formed by baking an Ag/Pd alloy base. This is to obtain reliable electrical connection with the internal electrodes.

この様な電子部品ははんだにより回路基板に実装される
わけであるが、はんだ付は性を考慮すると外部電極中の
Pduを低下するほうがよいのだが、はんだ耐熱性が低
下し、はんだ食われが生じ易くなる。逆にPdmを多く
するとはんだ耐熱性こそ良好となるが、はんだ付は性が
低下し、また外部電極のコストが上昇してしまうという
問題がある。
Such electronic components are mounted on circuit boards by soldering. Considering soldering properties, it is better to reduce the Pdu in the external electrodes, but the solder heat resistance decreases and there is a risk of solder erosion. It becomes more likely to occur. On the other hand, if Pdm is increased, the soldering heat resistance becomes better, but there is a problem that the soldering properties deteriorate and the cost of the external electrode increases.

素子のコストの大部分を外部電極が占めてしまうといっ
た事態にもなる。この様な問題を考慮し、Pd量を増や
すことなくはんだ耐熱性を上げるために幾つかの技術が
ある。例えばAg/Pd合金の外部電極層上にN1バリ
ヤー層を形成し、その上にSn層もしくは95Sn15
Pb層を形成するというものである。
This also results in a situation where the external electrodes account for most of the cost of the element. In consideration of such problems, there are several techniques for increasing soldering heat resistance without increasing the amount of Pd. For example, an N1 barrier layer is formed on the external electrode layer of Ag/Pd alloy, and a Sn layer or 95Sn15 layer is formed on top of the N1 barrier layer.
This is to form a Pb layer.

すなわちAg/Pd合金の低いはんだ耐熱性をN1バリ
ヤー層で補い、回路基板実装時のはんだ付は性はSn層
で補うというものである。しかしながらこの様な構成の
製造工程は長く、またN1メツキ及びはんだメツキなど
のウェットプロセスを要するため、素子の信頼性に問題
が残る。すなわち素子に残存する液体がヒートショクな
どで蒸発し、素子を損傷してしまうという問題がある。
That is, the low soldering heat resistance of the Ag/Pd alloy is compensated for by the N1 barrier layer, and the soldering resistance during circuit board mounting is compensated for by the Sn layer. However, since the manufacturing process for such a configuration is long and requires wet processes such as N1 plating and solder plating, problems remain in the reliability of the device. That is, there is a problem in that the liquid remaining in the element evaporates due to heat shock or the like, damaging the element.

(発明が解決しようとする課題) この様に外部電極に関しては各種の試みがあるが、基本
的にはAg/Pd系合金の焼き付けが用いられているの
が現状である。
(Problems to be Solved by the Invention) As described above, various attempts have been made regarding external electrodes, but the current situation is that basically baked-on Ag/Pd alloys are used.

一方例えば積層セラミックコンデンサでは大容量への要
求に応えるため、4.5X 3.2 +n+gなど大型
の素子が開発されている。ここで別の問題が生じてきた
。比較的小型のチップ部品では目立たなかったが、大型
化によりヒートサイクル、ヒートショックなどの熱負荷
による素子損傷などが顕著になるという問題である。こ
れは前述の如くの方法では回避しきれない問題である。
On the other hand, for example, in multilayer ceramic capacitors, large elements such as 4.5X 3.2 +n+g have been developed in order to meet the demand for large capacitance. Another problem has arisen here. This problem was not noticeable with relatively small chip components, but as the chip components become larger, element damage due to heat loads such as heat cycles and heat shock becomes more noticeable. This is a problem that cannot be avoided using the methods described above.

また厳しい熱負荷条件では小型の素子でもこの問題は大
きなものとなる。
Furthermore, under severe heat load conditions, this problem becomes serious even in small devices.

本発明は上述の如くの問題点を考慮してなされたもので
、外部電極を改良することで、熱負荷に対して優れた信
頼性を示すチップ型セラミック電子部品及びその製造方
法を提供することを目的とする。
The present invention has been made in consideration of the above-mentioned problems, and an object of the present invention is to provide a chip-type ceramic electronic component that exhibits excellent reliability against heat loads by improving the external electrode, and a method for manufacturing the same. With the goal.

[発明の構成] (課題を解決するための手段及び作用)本発明者らはヒ
ートサイクル試験において素子本体が損傷する原因につ
いて検討した。その結果セラミックが主体である素子本
体と外部電極との熱膨張差に起因することが分かった。
[Structure of the Invention] (Means and Effects for Solving the Problems) The present inventors have studied the causes of damage to the element body in a heat cycle test. As a result, it was found that this was caused by a difference in thermal expansion between the element body, which is mainly made of ceramic, and the external electrode.

すなわちヒートサイクル時に外部電極と素子本体との間
の熱膨張差により内部応力が発生し、結果として素子本
体が割れるなどの損傷が生じるのである。この熱膨張差
をなくすのは困難であり、本発明者らはこの熱膨張差に
起因する応力を吸収若しくは緩和する方法を検討した。
That is, during heat cycling, internal stress is generated due to the difference in thermal expansion between the external electrode and the element body, resulting in damage such as cracking of the element body. It is difficult to eliminate this difference in thermal expansion, and the present inventors have investigated methods for absorbing or relaxing the stress caused by this difference in thermal expansion.

その結果として導き出されたのが本発明であり、外部電
極としてはんだ合金を用いることを特徴とするものであ
る。
As a result, the present invention was developed, and is characterized by using a solder alloy as the external electrode.

外部電極を柔らかいはんだ合金で構成することにより、
前述の応力は外部電極に吸収される。従って素子本体が
損傷を受けることがなくなる。前述のごとく積層セラミ
ックコンデンサの内部電極との良好な電気的接続を考慮
して、外部電極としてもAg/Pd合金を使用していた
わけであるが、意外なことにはんだ合金を用いても十分
外部電極として機能することを本発明者らは確認した。
By constructing the external electrode with a soft solder alloy,
The aforementioned stress is absorbed by the external electrode. Therefore, the element body will not be damaged. As mentioned above, an Ag/Pd alloy was used for the external electrodes in consideration of good electrical connection with the internal electrodes of multilayer ceramic capacitors, but surprisingly, even if a solder alloy was used, the external electrodes could be sufficiently connected. The present inventors confirmed that it functions as an electrode.

なお内部電極のはんだ食われの恐れがある場合には下層
として1μm以上程度のAg/Pd合金層を形成しても
よい。しかしながらあまり下層が厚いと、従来のAg/
Pd焼き付は電極(30〜50μm)と変わりがなくな
り、素子本体の損傷の問題解決とはならない。従って下
層は厚くても15μmである。
Note that if there is a risk of solder erosion of the internal electrodes, an Ag/Pd alloy layer of approximately 1 μm or more may be formed as a lower layer. However, if the lower layer is too thick, conventional Ag/
Pd burning is no different from the electrode (30 to 50 μm), and does not solve the problem of damage to the element body. Therefore, the thickness of the lower layer is 15 μm at most.

このはんだ合金は特に限定されるものではなく、90重
量%以上のPbを含有する高温はんだ、 Pb−3n系
の共晶はんだ、 In−Sn系などの低温はんだ等各種
のはんだを用いることができる。しかしながら回路基板
実装時の電気的接続の良好性、耐酸化性等を考慮すると
Pl)−3n系のはんだが好ましい。また素子本体にか
かる応ノjを低減するためにはヤング率か小さいほうか
好ましい。また回路基板実装時の溶融はんだの融点が2
00℃以下程度であるため、外部電極の融点はそれ以上
であることが好ましい。従ってPb含kmは50重−%
以上であることが好ましい。この点を考慮すると好まし
いはんだ合金組成はPb50〜100重量%、Sn O
〜50重量%となる。そのほかCu=Ni、Zn、I″
c、Ag、Pd等の微量添加も可能である。特にAg、
Pdの添加は前述のごとくの内部電極の食われを防止す
る上で有効であるが、多くても5重量%までであり、0
.1〜5重Q9oが好ましい。
This solder alloy is not particularly limited, and various solders can be used, such as high-temperature solder containing 90% by weight or more of Pb, Pb-3n-based eutectic solder, and In-Sn-based low-temperature solder. . However, Pl)-3n based solder is preferable in consideration of good electrical connection during circuit board mounting, oxidation resistance, etc. In addition, in order to reduce the stress applied to the element body, it is preferable to have a smaller Young's modulus. Also, the melting point of molten solder when mounting a circuit board is 2.
Since the melting point of the external electrode is about 00° C. or lower, it is preferable that the melting point of the external electrode is higher than that. Therefore, Pb content km is 50 wt-%
It is preferable that it is above. Considering this point, the preferred solder alloy composition is Pb50-100% by weight, SnO
~50% by weight. In addition, Cu=Ni, Zn, I″
It is also possible to add trace amounts of c, Ag, Pd, etc. Especially Ag,
Addition of Pd is effective in preventing erosion of the internal electrodes as described above, but it is limited to 5% by weight at most, and 0% by weight.
.. 1 to 5 times Q9o is preferred.

なおこのはんだ外部電極は一層である必要はなく、例え
ば二層としてもよい(第2図)。すなわち表面は耐酸化
性、接合性などが重i1されるため、Snの含有量を多
くし、逆に内部は素子本体にかかる応力を低減するため
Pbの含有量が多くする。
Note that this solder external electrode does not need to be one layer, and may be two layers, for example (FIG. 2). That is, since oxidation resistance, bondability, etc. are important on the surface, the content of Sn is increased, and conversely, the content of Pb is increased on the inside to reduce the stress applied to the element body.

この場合の外層は最低限の厚さがあればよく、1〜15
μm以下の薄層で十分である。この様な外層(4−1)
としてはPb24〜42重量%、  5n5B〜78重
量%の融点が190℃以下程度のはんだ合金を用い、内
層(4−2)としてPb80〜100重量%、SnO〜
20重量%の融点が260℃以上程度のはんだ合金を用
いれば良い。また二層以上でも良いことは言うまでもな
い。
In this case, the outer layer only needs to have a minimum thickness of 1 to 15
A thin layer of .mu.m or less is sufficient. Outer layer like this (4-1)
For the inner layer (4-2), a solder alloy containing 24-42% by weight of Pb and 78% by weight of 5n5B with a melting point of about 190°C or lower is used, and as the inner layer (4-2), 80-100% by weight of Pb and 78% by weight of Pb and 78% by weight of SnO are used.
A solder alloy having a melting point of 20% by weight of about 260° C. or higher may be used. It goes without saying that it is good to have two or more layers.

なお外部電極中には電気伝導度の低下が問題とならない
程度であれば、ボアを含有しても構わない。
Note that a bore may be included in the external electrode as long as the decrease in electrical conductivity is not a problem.

さてこの様な外部電極であるが、一般に外部電極形成で
用いられている方法をそのまま使用することができる。
Now, for such an external electrode, the method generally used for forming the external electrode can be used as is.

すなわちはんだ合金からなる導電体(50〜80重量%
)とガラスフリットとを有機ビヒクルと混練したペース
トとし、ディッピング、塗布などの方法で素子本体に付
着せしめた後、大気中、還元雰囲気中など素子本体に適
した条件で焼成する方法である。また溶融はんだに超音
波を印加しながら素子本体に接触することにより、はん
だ合金のみからなる外部電極を形成することも可能であ
る。以下に超音波はんだ法を用いた場合について説明す
る。
That is, a conductor made of a solder alloy (50 to 80% by weight)
) and glass frit are kneaded with an organic vehicle to form a paste, which is adhered to the device body by dipping, coating, etc., and then fired under conditions suitable for the device body, such as in air or a reducing atmosphere. It is also possible to form external electrodes made only of solder alloy by contacting the element body while applying ultrasonic waves to molten solder. The case where the ultrasonic soldering method is used will be explained below.

超音波はんだ法は溶融はんだに超音波を印加できれば良
く、幾つかの手法が考えられる。例えばはんだ槽内に超
音波振動子を挿入してその溶融はんだ中に素子本体端面
を浸漬し外部電極を形成する方法(第3図)が挙げられ
る。第3図に示す超音波はんだ装置は噴流タイプの装置
であり、撹拌器により溶融はんだが環流路を通って噴流
するように構成されている。その溶融はんだ噴流位置に
超音波振動子を配置し、溶融はんだに超音波を印加する
よう構成されている。この噴流位置で素子本体を浸漬す
ることによりはんだ合金からなる外部電極を形成するこ
とができる。このほか超音波振動が可能なはんだごてを
用いる方法(第4図);はんだ槽目体を超音波振動させ
る方法(第5図)などが挙げられる。この場合も各種は
んだ合金が使用できる。ただし、素子本体との接合部分
の大部分がセラミックであるため、その接合をより確実
にするため、2口を含有するはんだ合金を用いることが
好ましい。このZnは雰囲気中の酸素と化学的に結合し
、素子本体のセラミックと強固な接合を生み出す。しか
しながらあまり添加量が多いとはんだの溶融性が低下す
るため、多くてもIO重量%程度までである。実用上は
0.1〜1,0重量%程度の添加で十分効果が確認され
る。
The ultrasonic soldering method only requires applying ultrasonic waves to molten solder, and several methods can be considered. For example, there is a method (FIG. 3) in which an ultrasonic vibrator is inserted into a solder bath and the end face of the element body is immersed in the molten solder to form external electrodes. The ultrasonic soldering device shown in FIG. 3 is a jet type device, and is configured so that molten solder is jetted through a circulation path by a stirrer. An ultrasonic vibrator is disposed at the position of the molten solder jet and is configured to apply ultrasonic waves to the molten solder. By immersing the element body at this jet position, an external electrode made of the solder alloy can be formed. Other methods include a method using a soldering iron capable of ultrasonic vibration (FIG. 4); and a method of causing the solder pot body to vibrate ultrasonically (FIG. 5). Also in this case, various solder alloys can be used. However, since most of the bonding portion with the element body is made of ceramic, it is preferable to use a solder alloy containing two ports in order to ensure the bonding. This Zn chemically combines with oxygen in the atmosphere to create a strong bond with the ceramic of the element body. However, if the amount added is too large, the melting properties of the solder will decrease, so the amount is limited to about IO% by weight at most. In practice, sufficient effects can be confirmed with addition of about 0.1 to 1.0% by weight.

本発明は特殊なチップ型セラミック電子部品に限定され
るものではないが、特に鉛系の材料を用いた、積層セラ
ミックコンデンサ、積層圧電素子等の積層タイプの素子
に対して有効である。鉛系の誘電体材料としては、Pb
T10i 、PbZr0i 。
Although the present invention is not limited to special chip-type ceramic electronic components, it is particularly effective for multilayer type elements such as multilayer ceramic capacitors and multilayer piezoelectric elements using lead-based materials. As a lead-based dielectric material, Pb
T10i, PbZr0i.

Pb(Mg l/3 Nb2.□3)03 、 Pb(
Zn l/3 Nb2/i )Ox 。
Pb(Mg l/3 Nb2.□3)03, Pb(
Znl/3Nb2/i)Ox.

Pb(Fe l/2 Nb+z2)03 、 Pb(F
e 2/3 W l/3 )03 。
Pb(Fe l/2 Nb+z2)03, Pb(F
e 2/3 W l/3 )03.

Pb(Mg  1.、−2  W  l/2  )03
  ・ Pb(Ni  l/3  Nb2y3 )03
  。
Pb(Mg 1., -2 W l/2)03
・Pb(Nil/3Nb2y3)03
.

等のペロブスカイト型化合物が挙げられる。ペロブスカ
イト化合物に各種添加物、例えばCo2O3゜La2O
3、Sbz 03−Nip、 Y20s 、ZrO□、
Mn0z 。
Examples include perovskite-type compounds such as. Various additives are added to perovskite compounds, such as Co2O3°La2O.
3, Sbz 03-Nip, Y20s, ZrO□,
Mn0z.

各種ガラス成分などが含まれていても良いことはいうま
でもない。
It goes without saying that various glass components may be included.

特に、高い誘電率を得ることができ、その他電気特性(
絶縁抵抗、誘電損失等)にも優れたマグ* ’/ ウム
ニオlB鉛(Pb(Mg+/3Nb2.□3)03 )
、亜鉛ニオブ酸鉛(Pb(Zn+、−3Nb2z3)0
3 ) ヲ含有tル系、例えばこれらの少なくとも一種
を50mo1%以上含有するような系が好ましい。−例
を挙げればxPb(Zn+、3 Nb2.’3 )03
−yPb(Mg+73Nb2zi )03zPbTio
i で示される複合系が挙げられる。この場合x、y、zは
所望の特性に応じて適宜設定することが可能であるが、
それぞれの成分を頂点とする三元図でa (x−0,5
0,y−0,OO,z−0,50)b (x=1.00
.y−0,00,z−0,00)c (x”0.20.
y−0,80,z−0,00)d (x−0,05,y
−0,90,z−0,05)で示される各点を結ぶ領域
内の組成が好ましい。
In particular, it is possible to obtain a high dielectric constant and other electrical properties (
Mag *' / Umnior lB lead (Pb(Mg+/3Nb2.□3)03) with excellent insulation resistance, dielectric loss, etc.
, zinc lead niobate (Pb(Zn+, -3Nb2z3)0
3) It is preferable to use a system containing at least one of these, for example, a system containing 50 mo1% or more of at least one of these. -For example, xPb(Zn+, 3 Nb2.'3)03
-yPb(Mg+73Nb2zi)03zPbTio
A complex system represented by i is mentioned. In this case, x, y, and z can be set appropriately according to the desired characteristics, but
In a ternary diagram with each component as a vertex, a (x-0,5
0,y-0,OO,z-0,50)b (x=1.00
.. y-0,00,z-0,00)c (x”0.20.
y-0,80,z-0,00)d(x-0,05,y
-0,90,z-0,05) is preferable.

この場合Pbの1〜35mo1%はBa、Sr及びCa
の少なくとも一種で置換されることが誘電特性の向上の
ためには有効である。また上記組成系は1100℃以下
の低温焼成で十分な誘電特性を発揮するため、積層タイ
プの素子を形成する場合の内部電極材料として比較的安
価なAg系などの材料を使用でき、有効である。なおそ
れぞれの構成成分は1 mo1%以上含有することが実
用上好ましい。
In this case, 1 to 35 mo1% of Pb is Ba, Sr and Ca.
Substitution with at least one of these is effective for improving dielectric properties. In addition, since the above composition system exhibits sufficient dielectric properties when fired at a low temperature of 1100°C or less, relatively inexpensive materials such as Ag-based materials can be used as internal electrode materials when forming multilayer type elements, which is effective. . Note that it is practically preferable that each component is contained in an amount of 1 mo1% or more.

鉛系の誘電体材料に対し、鉛系のはんだ合金を導電体と
して用いた外部電極は接合力が十分大きく、また外部電
極が誘電体の特性を低下せしめる恐れも少ないことから
非常に有効である。
For lead-based dielectric materials, external electrodes using lead-based solder alloy as a conductor have a sufficiently large bonding force, and are extremely effective because there is little risk that the external electrode will deteriorate the properties of the dielectric. .

以上導電体としてはんだ合金を用いた場合について説明
したが、外部電極は実装基板側から素子への熱伝導路に
もなる。従ってヒートショックによる急激な温度変化に
よって、素子本体が熱膨張損傷を受けるという問題があ
る。この問題に対処するため、外部電極の熱伝導性を低
下せしめて、素子本体の温度上昇を防止するという手段
が考えられる。例えば外部電極を構成する導電体より熱
伝導率の小さい材料を外部電極中に分散し、外部電極全
体としてみた場合の熱伝導性を低下せしめ、耐ヒートシ
ヨツク性を向上することができる。この様な材料として
は、例えば、アルミナ、シリカ。
Although the case where a solder alloy is used as the conductor has been described above, the external electrode also serves as a heat conduction path from the mounting board side to the element. Therefore, there is a problem in that the element body suffers thermal expansion damage due to rapid temperature changes due to heat shock. In order to deal with this problem, it is possible to reduce the thermal conductivity of the external electrodes to prevent the temperature of the element body from rising. For example, by dispersing in the external electrode a material having a lower thermal conductivity than the conductor constituting the external electrode, the thermal conductivity of the external electrode as a whole can be reduced and the heat shock resistance can be improved. Examples of such materials include alumina and silica.

マグネシア、ジルコニア、チタン酸カリウム、チタン酸
鉛などの球状り0,3〜5μm程度の粒径)、ファイバ
ー状(直径1〜5μm、長さ20μm以下程度)の無機
物を用いることができる。添加量は外部電極の主体があ
くまで導電体であり、多くても、30重量%程度までで
ある。
Inorganic materials such as magnesia, zirconia, potassium titanate, lead titanate, etc., which are spherical (with a particle diameter of about 0.3 to 5 μm) or fibrous (with a diameter of about 1 to 5 μm, and a length of about 20 μm or less) can be used. Since the main body of the external electrode is a conductor, the amount added is about 30% by weight at most.

この場合、添加する無機物はそのままでは導電体との馴
染みが悪いため、均一な分散が困難であるため、表面に
金属化処理を施しておくことが好ましい。この金属化処
理はメツキ、蒸着など各種方法を採ることができる。金
属化表面処理により形成される金属層はあまり厚いと無
機物添加効果が十分に発揮されないため、必要最少限度
の0,1〜5μm程度にとどめておくことが望ましい。
In this case, since the inorganic substance added as it is is not compatible with the conductor and uniform dispersion is difficult, it is preferable to perform a metallization treatment on the surface. Various methods such as plating and vapor deposition can be used for this metallization treatment. If the metal layer formed by the metallization surface treatment is too thick, the effect of adding an inorganic substance will not be sufficiently exhibited, so it is desirable to keep the thickness to the minimum necessary level of about 0.1 to 5 μm.

無機質添加剤の中でもチタン酸鉛等の材料は熱膨張係数
が実用温度範囲(−55〜125℃)で負であるため、
導電体が一般に熱膨張係数が正であることを考慮すると
、外部電極全体としてみた場合、導電体の熱膨張分をキ
ャンセルすることができる。
Among inorganic additives, materials such as lead titanate have a negative coefficient of thermal expansion in the practical temperature range (-55 to 125°C), so
Considering that the conductor generally has a positive coefficient of thermal expansion, the thermal expansion of the conductor can be canceled out when considering the entire external electrode.

従って外部電極の熱膨張を低減することができるため、
前述の如くの素子本体(セラミック)との熱膨張差によ
る素子損傷を防止する効果が期待できる。この様な材料
としては前述のチタン酸鉛(PbTiO3)、またこの
チタン酸鉛のPb酸成分Ba、Sr。
Therefore, the thermal expansion of the external electrode can be reduced.
The effect of preventing element damage due to the difference in thermal expansion with the element body (ceramic) as described above can be expected. Examples of such materials include the aforementioned lead titanate (PbTiO3), and the Pb acid components Ba and Sr of this lead titanate.

Caの少なくとも一種で20原子%以下置換したような
チタン酸鉛系の材料、IjO2−A1203−8102
系ガラスセラミツクなどが挙げられる。この様な負の熱
膨張係数を有する無機物の添加は、耐ヒートシヨツク用
として考えれば、はんだ合金を導電体とした外部電極の
場合に限らず、従来のAg/Pd電極の場合にも有効な
技術である。
IjO2-A1203-8102, a lead titanate-based material substituted with at least 20 atomic % or less of Ca
Examples include glass-based ceramics. The addition of an inorganic substance with such a negative coefficient of thermal expansion is effective not only in the case of external electrodes using solder alloy as a conductor, but also in the case of conventional Ag/Pd electrodes, when considering heat shock resistance. It's technology.

(実施例) 以下に本発明の詳細な説明する。(Example) The present invention will be explained in detail below.

実施例−1 まずはんだ合金ペーストを用いた場合について説明する
Example-1 First, a case where a solder alloy paste is used will be described.

素子本体として亜鉛・ニオブ酸鉛−マグネシウム・ニオ
ブ酸鉛系の誘電体材料を用いた設計値が2.25μF/
25V、 5.OX5.8X1.5mmサイズの積層タ
イプのコンデンサを用意した。この素子本体はあらかじ
めバレル研磨により、角部分が丸めである。この素子本
体に第1表に示す組成のはんだ合金のペースト(ガラス
フリット成分を2重量26含有)を塗布し、l 00−
150℃、3〜101n、ノ条件で乾燥し、その後人々
の材料に適した焼成温度200〜900℃、大気中の条
件でベルト炉を用いて焼成し、外部電極を形成した。
The design value using zinc/lead niobate-magnesium/lead niobate based dielectric material as the element body is 2.25μF/
25V, 5. A multilayer type capacitor with a size of OX5.8x1.5mm was prepared. The main body of this element is barrel-polished in advance so that its corners are rounded. A solder alloy paste (containing glass frit component of 2% by weight) having the composition shown in Table 1 is applied to this element body, and l00-
It was dried at 150° C. and 3 to 101 nm, and then fired using a belt furnace at a firing temperature of 200 to 900° C. in the atmosphere, which is suitable for the material used, to form an external electrode.

第1表には各素子の電気特性のほかに耐ヒートサイクル
特性を併せて示した。耐ヒートサイクル特性は同条件で
製造した積層セラミックコンデンサを100個Qfiし
、ガラスエボキン基板にはんだ付けにより実装し、−5
5℃〜+125℃のヒートサイクル試験を30分間隔で
200回行なった後での、基板からの素子の剥がれ、素
子の割れ・欠けなどの不良が発生した個数として示した
Table 1 shows the heat cycle resistance characteristics as well as the electrical characteristics of each element. The heat cycle resistance characteristics were determined by Qfi 100 multilayer ceramic capacitors manufactured under the same conditions and mounted on a glass Evokin board by soldering.
The number is shown as the number of defects such as peeling of the device from the substrate, cracking and chipping of the device after conducting a heat cycle test at 5° C. to +125° C. 200 times at 30 minute intervals.

第1表から明らかなように本発明実施例では電気特性は
十分であり、良好な外部電極が形成されていることが確
認され、また、ヒートサイクル試験後でもほとんど不良
品の発生がなく、耐ヒートサイクル特性に優れているこ
とが分かる。
As is clear from Table 1, the electrical properties of the examples of the present invention were sufficient, and it was confirmed that good external electrodes were formed.Also, even after the heat cycle test, there were almost no defective products, and there was no It can be seen that it has excellent heat cycle characteristics.

また第1表には比較のため従来と同様にAg/Pd合金
の外部電極を形成した場合(No、11) 、及びNi
層、 Sn層をAg/Pd合金層の上に形成した場合(
No。
For comparison, Table 1 also shows cases in which external electrodes are made of Ag/Pd alloy (No. 11) and Ni
When a Sn layer is formed on top of an Ag/Pd alloy layer (
No.

12)について同様の特性を測定した結果も示した。The results of measuring similar characteristics for 12) are also shown.

この結果から明らかなように数多くの不良が発生し、本
発明の方が優れていることが分かる。
As is clear from these results, a large number of defects occurred, and it can be seen that the present invention is superior.

以下余白 実施例−2 次に超音波はんだ法を用いて外部電極を形成した場合に
ついて説明する。
Margin Example 2 Below, a case where external electrodes are formed using ultrasonic soldering will be described.

素子本体として実施例−1と同様の誘電体材料を用いた
積層タイプのコンデンサを用意した。超音波はんだ装置
としては、前述の第3図に示したような噴流型の装置を
用い、はんだ合金としては90Pb−7Sn−2Zn−
0,5Ti−0,5Cuの組成の合金を用い、はんだ槽
温度を350℃とし、周波数20kHz、出力80Wの
超音波を印加し、素子を2秒間浸漬することで外部電極
を形成した。
A multilayer capacitor using the same dielectric material as in Example-1 was prepared as the element body. As the ultrasonic soldering device, a jet type device as shown in Fig. 3 was used, and the solder alloy was 90Pb-7Sn-2Zn-
Using an alloy having a composition of 0.5Ti-0.5Cu, the solder bath temperature was set to 350°C, an ultrasonic wave with a frequency of 20 kHz and an output of 80 W was applied, and the element was immersed for 2 seconds to form external electrodes.

実施例−1と同様の測定を行なったところ、所望の電気
特性が得られ、良好な外部電極が形成されていることが
確認され、またヒートサイクル試験でも不良品の発生が
1個と非常に優れた結果を得た。
When the same measurements as in Example 1 were carried out, it was confirmed that the desired electrical characteristics were obtained and a good external electrode was formed.Also, there was only one defective product in the heat cycle test. Excellent results were obtained.

またこの様な超音波はんだ法により形成した外部電極は
実施例−1の外部電極に比較し、ガラスフリット成分を
含有することがないので、このガラスフリット成分のセ
ラミックへの拡散による特***化がないという利点もあ
る。
Furthermore, compared to the external electrode of Example-1, the external electrode formed by such an ultrasonic soldering method does not contain a glass frit component, so the characteristics are not changed due to the diffusion of this glass frit component into the ceramic. There is also the advantage of not having one.

その他、40Pb−58Sn−4Zn、50In−49
!1in−IZn。
Others: 40Pb-58Sn-4Zn, 50In-49
! 1in-IZn.

49Pb−45In−5Zn−0,5Y−0,5AIの
はんだ合金でも同様の測定を行なったが、いずれも外部
電極として十分に機能し、耐ヒートサイクル特性にも優
れていることが確認された。
Similar measurements were also performed on solder alloys of 49Pb-45In-5Zn-0, 5Y-0, and 5AI, and it was confirmed that all of them functioned sufficiently as external electrodes and had excellent heat cycle resistance.

またチタン酸バリウム系の材料を用いた素子の場合も同
様の結果を得ることができた。
Similar results were also obtained in the case of an element using a barium titanate-based material.

実施例−3 次に無機物の添加剤を3存する外部電極を形成した場合
について説明する。
Example 3 Next, a case will be described in which an external electrode containing three inorganic additives is formed.

平均粒径が1μmのシリカ粉末をはんだ合金ペーストに
添加・a合し、実施例−1と同様の素子を用いて特性を
測定した。なおヒートショック試験は常温から350℃
の溶融はんだ中に素子を挿入し、素子割れを確認するこ
とで行なった。
Silica powder having an average particle size of 1 μm was added to the solder alloy paste and the characteristics were measured using the same element as in Example-1. The heat shock test is performed from room temperature to 350℃.
This was done by inserting the device into molten solder and checking for cracks in the device.

シリカ以外にも、アルミナ、マグネシアを用いた場合に
ついても同様の試験を行なった。さらにはんだ合金以外
の電極材料についても同様の試験を行なった。
Similar tests were conducted using alumina and magnesia in addition to silica. Furthermore, similar tests were conducted on electrode materials other than solder alloys.

なお添加した無機物は、純粋中に分散し、水洗。The added inorganic substances are dispersed in pure water and washed with water.

酸洗いの後、パラジウムのメツキ下地液で活性化処理を
行ない、表面にCu+Snメツキを施し、金属表面処理
を行なった後、再び水洗・乾燥したものを用いた。
After pickling, activation treatment was performed with a palladium plating base solution, the surface was plated with Cu+Sn, metal surface treatment was performed, and then washed with water and dried again.

得られた結果を第2表に示す。第2表から明らかなよう
に、無機質材料を添加した場合はヒートショック試験後
もほとんど不良品の発生がなく、信頼性に於いて格段の
向上が見られる。
The results obtained are shown in Table 2. As is clear from Table 2, when an inorganic material is added, there are almost no defective products even after the heat shock test, and a marked improvement in reliability can be seen.

以下余白 実施例−4 実施例−3と同様にして、無機質材料として熱膨張係数
が負の材料を用いた場合についてもヒートショック試験
を行なった結果を第3表に示す。
Below is a blank space Example 4 Table 3 shows the results of a heat shock test conducted in the same manner as in Example 3 using a material with a negative coefficient of thermal expansion as the inorganic material.

第3表から明らかな様にPbT10.系の熱膨張係数が
負の材料を添加した場合のヒートショ・ツク試験に対す
る信頼性向上効果は大なるものであり、本実施例では不
良品は全く発生しなかった。
As is clear from Table 3, PbT10. When a material having a negative coefficient of thermal expansion is added to the system, the reliability improvement effect on the heat shock test is significant, and no defective products were generated in this example.

以下余白 [発明の効果] 以上説明したように本発明によれば、優れた耐サイクル
試験特性または耐ヒートシヨツク試験特性を有するチッ
プ型セラミック電子部品を得ることができる。特に大型
の素子の場合に有効であり、また、はんだ合金を用いた
外部電極を用いた積層セラミックコンデンサ等の電子部
品ではコストに占める外部電極材料費の大幅な低減がで
き、工業上寄与するところ大である。
Margins below [Effects of the Invention] As explained above, according to the present invention, it is possible to obtain a chip-type ceramic electronic component having excellent cycle resistance test characteristics or heat shock resistance test characteristics. It is particularly effective in the case of large-sized elements, and in electronic components such as multilayer ceramic capacitors that use external electrodes made of solder alloys, the cost of external electrode materials can be significantly reduced, making it an industrial contribution. It's large.

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は積層セラミック電子部品の概略断面
図、第3図乃至第5図は超音波はんだ装置の概略図であ
る。 誘電体層 ・・・・・・ (1)
1 and 2 are schematic cross-sectional views of a multilayer ceramic electronic component, and FIGS. 3 to 5 are schematic views of an ultrasonic soldering apparatus. Dielectric layer... (1)

Claims (6)

【特許請求の範囲】[Claims] (1)素子本体に接合された外部電極を構成する導電体
がはんだ合金からなることを特徴とするチップ型セラミ
ック電子部品。
(1) A chip-type ceramic electronic component characterized in that the conductor constituting the external electrode bonded to the element body is made of a solder alloy.
(2)前記はんだ合金がPbを50重量%以上含有する
ことを特徴とする請求項1記載のチップ型セラミック電
子部品。
(2) The chip-type ceramic electronic component according to claim 1, wherein the solder alloy contains 50% by weight or more of Pb.
(3)前記外部電極は融点が190℃以下のPb−Sn
系はんだ合金からなる外層と、融点が260℃以上のP
b−Sn系はんだ合金からなる内層とからなることを特
徴とする請求項1乃至2記載のチップ型セラミック電子
部品。
(3) The external electrode is made of Pb-Sn with a melting point of 190°C or less.
An outer layer made of a solder alloy and P with a melting point of 260°C or higher.
3. The chip-type ceramic electronic component according to claim 1, further comprising an inner layer made of a b-Sn-based solder alloy.
(4)素子本体が銀パラジウム系合金からなる内部電極
を有する積層型素子であり、前記外部電極が銀パラジウ
ム系合金薄層からなる下層を介して接合されていること
を特徴とする請求項1乃至3記載のチップ型セラミック
電子部品。
(4) Claim 1 characterized in that the element body is a multilayer element having internal electrodes made of a silver-palladium alloy, and the external electrodes are joined via a lower layer made of a thin layer of a silver-palladium alloy. 3. The chip-type ceramic electronic component according to 3.
(5)外部電極が正の熱膨張係数を有する導電体の他に
、負の熱膨張係数を有する無機質添加剤を含有したこと
を特徴とするチップ型セラミック電子部品。
(5) A chip-type ceramic electronic component characterized in that the external electrode contains an inorganic additive having a negative thermal expansion coefficient in addition to a conductor having a positive thermal expansion coefficient.
(6)溶融はんだを超音波を印加しながら素子本体に接
触せしめることにより、はんだ合金からなる外部電極を
形成することを特徴とするチップ型セラミック電子部品
の製造方法。
(6) A method for manufacturing a chip-type ceramic electronic component, which comprises forming external electrodes made of a solder alloy by bringing molten solder into contact with an element body while applying ultrasonic waves.
JP2025216A 1990-02-06 1990-02-06 Chip type ceramic electronic parts and manufacture thereof Pending JPH03230508A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2025216A JPH03230508A (en) 1990-02-06 1990-02-06 Chip type ceramic electronic parts and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2025216A JPH03230508A (en) 1990-02-06 1990-02-06 Chip type ceramic electronic parts and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH03230508A true JPH03230508A (en) 1991-10-14

Family

ID=12159766

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2025216A Pending JPH03230508A (en) 1990-02-06 1990-02-06 Chip type ceramic electronic parts and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH03230508A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0629769A (en) * 1992-07-09 1994-02-04 Murata Mfg Co Ltd Chip type electronic parts
JP2002015944A (en) * 2000-06-30 2002-01-18 Kyocera Corp Ceramic capacitor
JP2002025852A (en) * 2000-07-07 2002-01-25 Matsushita Electric Ind Co Ltd Electronic component
US6342732B1 (en) 1998-09-18 2002-01-29 Tdk Corporation Chip-type multilayer electronic part
JP2018098327A (en) * 2016-12-13 2018-06-21 太陽誘電株式会社 Multilayer ceramic capacitor and manufacturing method thereof

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0629769A (en) * 1992-07-09 1994-02-04 Murata Mfg Co Ltd Chip type electronic parts
US6342732B1 (en) 1998-09-18 2002-01-29 Tdk Corporation Chip-type multilayer electronic part
JP2002015944A (en) * 2000-06-30 2002-01-18 Kyocera Corp Ceramic capacitor
JP2002025852A (en) * 2000-07-07 2002-01-25 Matsushita Electric Ind Co Ltd Electronic component
JP2018098327A (en) * 2016-12-13 2018-06-21 太陽誘電株式会社 Multilayer ceramic capacitor and manufacturing method thereof

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