JPH0322822A - Digital bus protective relay - Google Patents
Digital bus protective relayInfo
- Publication number
- JPH0322822A JPH0322822A JP15642489A JP15642489A JPH0322822A JP H0322822 A JPH0322822 A JP H0322822A JP 15642489 A JP15642489 A JP 15642489A JP 15642489 A JP15642489 A JP 15642489A JP H0322822 A JPH0322822 A JP H0322822A
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- Prior art keywords
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- zero
- phase current
- sequence
- magnitude
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000001681 protective effect Effects 0.000 title abstract 3
- 238000001514 detection method Methods 0.000 claims abstract description 14
- 230000000903 blocking effect Effects 0.000 claims abstract description 3
- 230000007935 neutral effect Effects 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 11
- 238000000034 method Methods 0.000 description 5
- 230000035945 sensitivity Effects 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000007257 malfunction Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
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- Emergency Protection Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
[発明の目的]
(産業上の利用分野)
本発明はディジタル形母線保護リレー、特に零相電流を
用いた電流差動原理により、抵抗接地系母線の地絡事故
を検出するディジタル形母線保護リレーに関する.
(従来の技術)
従来技術によるディジタル形母線保護リレーの梢成例を
第6図に示す。また第7図に保護シーケンス例を示す。[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention is a digital bus protection relay, and in particular, uses a current differential principle using zero-sequence current to prevent ground faults in resistance-grounded busbars. Concerning digital bus protection relays for detection. (Prior Art) FIG. 6 shows an example of the construction of a digital bus protection relay according to the prior art. Further, FIG. 7 shows an example of a protection sequence.
第6図においてディジタル形母線保護継電器1は、母線
2に接続される各フイーダ3−1 . 3−2 .3−
3に設けられた変流器4−1 . 4−2 . 4−3
の2次(1′!l電流を導入するが、この場合、補助変
流器5−1.5−2 . 5−3により各フィーダ電流
の整合をとって導入する.この電流はサンプルホールド
回路6により一定のサンプリング周波数でサングリング
され、マルチプレクサにより順次選択され、^/D変換
器8に送られディジタル量に変換される.cpu9はA
/D変換器8より出力される系統電流のディジタルデー
夕をもとにして保護演算を行ない、系統の事故検出、及
び保護出力の送出等の保護動作を行なう。設定部10は
CPU 9に対し事故検出感度、動作時間整定等を入力
するものである。さらに変圧器中性点に接続されている
中性点接地抵抗11はこの系統の地絡事故電流が所定以
上とならないよう制限している.
ここで零相電流は図示していないが、各相電流の残留回
路接続により得られ、これも図示していない零相電流用
補助変流器より導入され、第6図に示す各相電流と同様
にCPU 9へ導入される。In FIG. 6, the digital bus protection relay 1 includes each feeder 3-1 . 3-2. 3-
Current transformer 4-1 provided in 3. 4-2. 4-3
A secondary current (1'!l) is introduced, but in this case, each feeder current is matched by auxiliary current transformers 5-1, 5-2, and 5-3. 6 at a constant sampling frequency, sequentially selected by a multiplexer, and sent to the ^/D converter 8 where it is converted into a digital quantity.
A protection calculation is performed based on the digital data of the system current output from the /D converter 8, and protection operations such as system accident detection and protection output transmission are performed. The setting section 10 inputs accident detection sensitivity, operation time setting, etc. to the CPU 9. Furthermore, the neutral point grounding resistor 11 connected to the transformer neutral point limits the ground fault current in this system from exceeding a predetermined value. Although the zero-sequence current is not shown here, it is obtained by connecting the residual circuit of each phase current, and this is introduced from the auxiliary current transformer for the zero-sequence current, which is also not shown, and the each phase current shown in Figure 6. Similarly, it is introduced into the CPU 9.
CPtl 9では第6図に示したように、短絡事故を検
出する87S要索と地絡事故を検出する87G要素及び
過電流検出要素51の演算及び第7図に示す保護シーゲ
ンス処理も行なっている。その他の処理については本発
明に関係していないため説明は省略する。As shown in Fig. 6, CPtl 9 also performs calculations of the 87S element for detecting short-circuit accidents, the 87G element for detecting ground faults, and the overcurrent detection element 51, and the protection sequence processing shown in Fig. 7. . The other processes are not related to the present invention, so their explanation will be omitted.
第7図において、87S要素12. 87G要素13は
以下に示す電流差動原理により母線内部事故を検出する
差動要素であり、51要素15は各フィーダの各相毎の
電涜に応動する過電流検出要素である。In FIG. 7, 87S element 12. The 87G element 13 is a differential element that detects faults inside the bus bar based on the current differential principle described below, and the 51G element 15 is an overcurrent detection element that responds to electrical faults in each phase of each feeder.
第6図に示すディジタル形母線保護リレーの梢成例にお
いては、各フィーダ3−1,〜3−3の相電流1 ,
12.13よりベクトル和■,を演算す1
ると、I ””i +i,,+i3となり、通常時
及d1
び母線外部事故時は、母線へ流入する電流と流出する電
流は等しく、l I,1 l =O<Kとなる。ここで
Kは878要素12の動作レベルであり、87S要素1
2は不動作である.しかしながら母線の内部事故時は、
母線へ流入する電流が大きく、I■,〉Kとなり、87
3要素12は動作となって母線の内部,外部の事故判別
ができる。87G要素13は上記処理にて、零相電流1
〜1 を用い、IIOd01 03
を求めて動作レベルk。と比較し、動作判定を行なうも
のである.51要素15は87G要素13が以下に示す
ように、大電流による零相誤差電流で誤動作することを
防止する目的で各フィーダ毎に設けている.
一般に抵抗接地系では、通信線への誘導障害や人体への
!5響を考慮し、第6図に示す変圧器中性点接地抵抗1
1は地絡電流を数百(A>程度に制限するよう選ばれて
いる。87G要素13は、この電流を検出し動作するよ
う非常に高感度としている。In the top configuration example of the digital busbar protection relay shown in FIG. 6, the phase currents 1,
From 12.13, calculate the vector sum ■,1, then I ``”i +i,, +i3, and under normal conditions, d1, and in the event of an external fault on the bus, the current flowing into the bus and the current flowing out are equal, and l I , 1 l =O<K. Here, K is the operating level of 878 element 12, and 87S element 1
2 is inactive. However, in the event of an internal accident on the busbar,
The current flowing into the bus bar is large, I■,>K, and 87
The three elements 12 are activated and can determine whether an accident occurs inside or outside the bus. The 87G element 13 has a zero-sequence current of 1 in the above process.
~1 to find IIOd01 03 and the operating level k. This is used to determine the motion by comparing the The 51 element 15 is provided for each feeder in order to prevent the 87G element 13 from malfunctioning due to a zero-phase error current caused by a large current, as shown below. In general, resistance grounding systems can cause inductive disturbances to communication lines and damage to the human body! Considering the 5 harmonics, the transformer neutral point earthing resistance 1 shown in Figure 6
1 is chosen to limit the ground fault current to a few hundred amps. The 87G element 13 is very sensitive to detect and operate on this current.
ここで数十{k^}にもなる大電流を伴なう短絡事故が
発生すると、事故による直接の零相電流は生じなくても
、例えば数パーセントの誤差電流のため、87G要素1
3の誤動作が考えられる.従って、87G要素13にと
っては、大電流を伴なう2線事故はその保護責務外と一
般に考えられている。If a short circuit accident with a large current of several tens of {k^} occurs, even if no direct zero-sequence current is generated due to the accident, for example, due to an error current of several percent, the 87G element 1
3 malfunctions are possible. Therefore, for the 87G element 13, two-wire accidents involving large currents are generally considered to be outside its protection responsibilities.
第6図に示す従来例では、過電流検出要素51要素15
にて2線事故時の動作を阻止する楕成としている。そし
て大電流の母線流入時は878要素で検出し保護を行な
っている。In the conventional example shown in FIG.
The system is designed to prevent operation in the event of a two-line accident. When a large current flows into the bus bar, 878 elements are used to detect and protect the bus.
(発明が解決しようとする課題)
ここで過電流検出要素の動作値整定は、母線の内部1線
地絡時に誤って動作し、87G要素が本来動作すべきで
あるにも拘らず、この動作を阻止することがないよう決
める必要がある。(Problem to be Solved by the Invention) Here, the operation value setting of the overcurrent detection element is erroneously activated when a one-line ground fault occurs inside the bus bar, and even though the 87G element should be activated, this operation does not occur. It is necessary to decide so as not to prevent this.
第8図は零相電流と各種電流との関係を示したものであ
り、直B16は負荷電流と零相電流の関係.直線17は
1線地絡時の地絡相電流と零相電流の関係を示す。ここ
で18は最大負荷電流ILOADmax ,19は1線
地絡事故時の最大事故電流I を示]LGnax
している.また、20は零相差電流要素87G要素の動
作値レベルを示す。過電流検出要素51要素の整?値2
1は、■,。ADlaX ■LGllaxの和以上
とすると■
必要があった。このような整定とした時、負荷電流が減
少すると、例えば零となると、1線地絡時の零相電流間
係を示す直線17は破822の如くなる。Figure 8 shows the relationship between the zero-sequence current and various currents, and the line B16 shows the relationship between the load current and the zero-sequence current. A straight line 17 shows the relationship between the ground fault phase current and the zero-sequence current at the time of a one-wire ground fault. Here, 18 indicates the maximum load current ILOADmax, and 19 indicates the maximum fault current I in the event of a single-wire ground fault.]LGnax. Further, 20 indicates the operating value level of the zero-sequence difference current element 87G element. Is the overcurrent detection element 51 properly adjusted? value 2
1 is ■,. ADlaX ■If it is greater than the sum of LGllax,■ it was necessary. With such a setting, when the load current decreases, for example, to zero, the straight line 17 representing the zero-sequence current relationship at the time of a one-line ground fault becomes a broken line 822.
23は最大負荷電流状態より2線短絡事故が生じた場合
であり、直線20と交わる点で87G要素が誤動作する
ことを示している.ただし、51要素の整定値21以上
となるため51要素の動作により87G要素の動作出力
は阻止される。ここで24は負荷電流零の場合であり、
51要素の整定値21以下で直線20と交わるため、8
7G要素の不要動作となる可能性が高かった.また異相
地絡事故時にも同様の電流が流れるため不要応動の可能
性があった。23 is a case where a two-wire short-circuit accident occurs due to the maximum load current state, indicating that the 87G element malfunctions at the point where it intersects with straight line 20. However, since the set value of the 51 elements is greater than or equal to 21, the operation output of the 87G element is blocked by the operation of the 51 elements. Here, 24 is the case where the load current is zero,
8 because it intersects with straight line 20 below the setting value of 51 elements 21.
There was a high possibility that this would result in unnecessary operation of the 7G element. In addition, because a similar current flows in the event of a different-phase ground fault, there is a possibility of an unnecessary response.
本発明は上記問題点を解決するためになさ゜れたもので
あり、2線以上の短絡及び地絡時の87G要素の確実な
動作阻止を可能としたディジタル形母線保護リレーを提
供することを目的としている。The present invention was made in order to solve the above problems, and an object of the present invention is to provide a digital busbar protection relay that can reliably prevent the operation of the 87G element in the event of a short circuit of two or more wires or a ground fault. It is said that
[発明の梢成]
(課題を解決するための手段)
本発明は零相電流を用いた電流差動要素と各フィーダの
零相電流の大きさを検出する手段と、この手段の少なく
とも1つの出力により前記差動要素の出力を阻止する手
段とからなる。[Archives of the invention] (Means for solving the problem) The present invention includes a current differential element using a zero-sequence current, a means for detecting the magnitude of the zero-sequence current of each feeder, and at least one of the means. and means for blocking the output of the differential element by the output.
(作 用〉
上記手段により大電流を伴なう2線以上の事故時は、零
相電流による電流差動要素の不要応動を防止でき、母線
の1線地絡事故のみを確実に検出し保護できる。(Function) With the above means, in the event of an accident involving two or more wires involving large currents, unnecessary response of the current differential element due to zero-sequence current can be prevented, and only single-line ground faults on the busbar can be reliably detected and protected. can.
(実施例) 以下図面を参照し本発明の実施例を説明する。(Example) Embodiments of the present invention will be described below with reference to the drawings.
第1図は本発明によるディジタル形母線保護リレーの一
実施例の梢或図である。第l図にいおいて、第6図と同
一部分については同一機能を有しており、同一符号を付
して説明を省略する。FIG. 1 is a top view of one embodiment of a digital busbar protection relay according to the present invention. In FIG. 1, the same parts as in FIG. 6 have the same functions, are given the same reference numerals, and description thereof will be omitted.
第1図においては、第6図に対し構成は同一であるが、
CPU 9で処理する要儂が異なっている.第1図では
CPU 9は各相電流を用いた電流差動要素873と零
相電流を用いた電流差動要素87G及び各フィーダ毎の
零相電流の大きさを判定する地絡過電流検出要素51G
の処理を行なっている.上記横或を有するディジタル形
母線保護リレーの保護シーゲンス図を第2図に示す。第
2図において、各相電流差動要素87S要素12.零相
電流差勤要素87G要素13は第6図に示した同一符号
の各要素と同一機能を有するものであり、その説明は省
略する。In Fig. 1, the configuration is the same as in Fig. 6, but
The essential information processed by CPU 9 is different. In FIG. 1, the CPU 9 includes a current differential element 873 using each phase current, a current differential element 87G using zero-sequence current, and a ground fault overcurrent detection element 51G that determines the magnitude of zero-sequence current for each feeder.
The process is being carried out. FIG. 2 shows a protection sequence diagram of a digital type busbar protection relay having the above-mentioned horizontal direction. In FIG. 2, each phase current differential element 87S element 12. The zero-sequence current differential element 87G element 13 has the same function as each element with the same reference numeral shown in FIG. 6, and the explanation thereof will be omitted.
第2図に示す51G要素14は各フィーダ毎の零相電流
が所定値以上であること、即ち、1線地絡事故以上の地
絡過電流であることを検出し、零相差動要素87G要素
13の不要応動を阻止するものである。ここで51G要
素14の動作値整定は、動作判定量が零相電流のため常
時の負荷電流を考慮する必要がなく、高感度に地絡過電
流検出ができる。The 51G element 14 shown in FIG. This prevents unnecessary reactions. Here, in setting the operation value of the 51G element 14, since the operation determination amount is a zero-sequence current, there is no need to consider the constant load current, and ground fault overcurrent can be detected with high sensitivity.
第8図に51G要素の整定値25を示すが、従来の整定
値21に対し大幅な検出感度の向上が達成できる.
第3図に第2図に示す保護シーゲンス図の作用を説明す
るフローチャートの一例を示す.第3図は系統より各フ
ィーダ1〜nの零相電流l。1〜’Onがリレーへ導入
されている場合を示している。FIG. 8 shows a setting value of 25 for the 51G element, which can achieve a significant improvement in detection sensitivity compared to the conventional setting value of 21. Figure 3 shows an example of a flowchart explaining the operation of the protection sequence diagram shown in Figure 2. FIG. 3 shows the zero-sequence current l of each feeder 1 to n from the system. 1 to 'On are introduced into the relay.
第3図においてステップ831で各フイーダの零相電流
1。1〜’Onを導入し、ステップ832では87G要
素の動作判定に必要な各フィーダの零相電流のベクトル
和を演算する.ここでは動作レベルとの比較が必要なた
め絶対値+1o,lを得ている。In FIG. 3, in step 831, zero-sequence currents 1.1 to 'On of each feeder are introduced, and in step 832, a vector sum of the zero-sequence currents of each feeder necessary for determining the operation of the 87G element is calculated. Here, since a comparison with the operating level is required, the absolute value +1o,l is obtained.
ステッグS33では51G要素の動作判定に必要な各フ
ィーダ毎の零相電流の絶対値を得ている。ステップ83
4〜S39では、1〜nフイーダの零相電流のうち1つ
でも比較レベル以上であれば、フラグGを0にセットし
、その他の場合ではフラグGを1にセットし、87G要
素の出力阻止、許容のフラグセットを行なっている.
即ち、ステップS34ではカウンタjに初期値1を与え
、ステップS35ではjの値に相当するフィーダN8の
零相電流の絶対値11o,lを検出レベルと比較する.
ここて゛ステップ836〜83&は条件不或立時にカウ
ンタjを用い順次n迄繰返し.フラグG=1をセットず
ゐ.但しステ・ソプ335にて条件成立時はjがriと
なる迄繰返す必要はなく,ステップS39へ進み、フラ
グG=Oをセ・ソトする。Steg S33 obtains the absolute value of the zero-sequence current for each feeder necessary for determining the operation of the 51G element. Step 83
In steps 4 to S39, if even one of the zero-sequence currents of the 1 to n feeders is equal to or higher than the comparison level, the flag G is set to 0, and in other cases, the flag G is set to 1 to block the output of the 87G element. , setting the permissible flag. That is, in step S34, an initial value 1 is given to counter j, and in step S35, the absolute value 11o,l of the zero-sequence current of feeder N8 corresponding to the value of j is compared with the detection level.
Here, steps 836 to 83& are repeated sequentially up to n using counter j when the conditions are not met. Set flag G=1. However, if the condition is satisfied in step S335, there is no need to repeat the process until j becomes ri, and the process proceeds to step S39, where the flag G=O is set.
次にステップS40では87G要素の動作判定を行ない
、ステップ341で条件成立時動作フラグFをF=1に
セットし、ステップ342で51G要素のフラグが許容
のときステップS43にて動作出力を送出する.ステッ
プ334では87G要素はステツア840における条件
不成立時であり、ステップ842における不成立も含め
、ステップ345にて87G要素を復帰させる.
上記実施例によれば、各フィーダの零相電流の大きさを
各フィーダ毎に検出し、この検出結果により、零相電流
による電流差動要素の動作を阻止する構成としており、
1線地絡事故時にのみ確実に動作する、零相電流を用い
た差動要素を有するディジタル形保護リレーを提供でき
る。Next, in step S40, the operation of the 87G element is determined, in step 341, the operation flag F is set to F=1 when the condition is met, and in step 342, when the flag of the 51G element is permissible, the operation output is sent in step S43. .. In step 334, the 87G element is used when the condition in step 840 is not satisfied, and in step 345, the 87G element is restored, including when the condition in step 842 is not satisfied. According to the above embodiment, the magnitude of the zero-sequence current of each feeder is detected for each feeder, and the operation of the current differential element due to the zero-sequence current is blocked based on the detection result.
It is possible to provide a digital protection relay having a differential element using zero-sequence current, which operates reliably only in the event of a one-line ground fault.
なお、上記実施例では、電流差動要素の動作を阻止する
要素として、地絡過電流要素の51G要素のみとした場
合について説明したが、本発明はこれに限定されるもの
ではなく、例えば従来の過電流要素51G要素と併用し
ても何ら問題ない.第4図にこの場合の梢或図を示す。In addition, in the above embodiment, the case where only the 51G element of the earth fault overcurrent element is used as the element that prevents the operation of the current differential element is explained, but the present invention is not limited to this, and for example, the conventional There is no problem when used in combination with the overcurrent element 51G element. FIG. 4 shows a treetop view in this case.
また第5図に保護シーゲンス図を示す。ここで51G要
素は異相地絡事故時の短絡事故電流相等の零相電流によ
る87G要素の不要応動阻止、51要素は2線以上の短
絡事故時の大電流による零相誤差電流による87G要素
の不要応動阻止に各々効果が期待できる。Furthermore, a protection sequence diagram is shown in FIG. Here, the 51G element prevents the unnecessary response of the 87G element due to the zero-sequence current such as the short circuit fault current phase in the event of a different phase ground fault, and the 51G element prevents the unnecessary response of the 87G element due to the zero-sequence error current caused by the large current in the event of a short circuit fault of two or more wires. Each can be expected to be effective in preventing reaction.
さらにその他の実施例として地絡事故時に発生する地#
@電圧に応動ずる地絡過電圧検出要素などを87G要素
の動作条件の一部とした構成に、地絡過電流要素51G
要素を加えて同様の効果が得られることは言うまでもな
い。Furthermore, as another example, the ground number that occurs during a ground fault accident
@ In a configuration where a ground fault overvoltage detection element that responds to voltage is part of the operating conditions of the 87G element, the ground fault overcurrent element 51G
It goes without saying that similar effects can be obtained by adding other elements.
[発明の効果]
以上説明したように、本発明によれば各フィーダの零相
電流の何れかが所定値以上のとき、零相電流による差動
要素の動作出力を阻止する構成としたので、2線以上の
事故時の大電流による地絡差動要素の不要応動を防止で
き、母線のlit地絡事故を確実に検出できる信頼性の
向上にディジタル形母線保護リレーを提供できる。[Effects of the Invention] As explained above, according to the present invention, when any of the zero-sequence currents of each feeder is equal to or higher than a predetermined value, the operational output of the differential element due to the zero-sequence current is blocked. It is possible to provide a digital bus protection relay that can prevent unnecessary response of the ground fault differential element due to a large current in the event of a fault in two or more wires, and improve the reliability of reliably detecting a bus lit ground fault fault.
第1図は本発明によるディジタル形母線保護リレーの一
実施例の構成図、第2図は本発明によるディジタル形母
線保護リレーの実施例の保護シーケンス図、第3図は第
2図の作用を説明するフローチャート、第4図は他の実
施例の椹成図、第5図は他の実施例の保護シーゲンス図
、第6図は従来のディジタル形f線保護リレーの構成図
、第7図は従来のディジタル形母線保護リレーの保護シ
ーケンス図、第8図は従来技術と本発明の特徴を説明す
る図である。
1・・・ディジタル形母線保護リレー
2・・・母線 3・・・フィーダ4・・
・変流器 5・・・補助変流器6・・・サン
プルホールド回路
7・・・マルチプレクサ 8・・・A/D変換器9・
・・CPU 10・・・整定部11・・
・中性点接地抵抗 12・・・873要素13・・・
87G要素 14・・・51G要素15・・・
51要素FIG. 1 is a block diagram of an embodiment of the digital bus protection relay according to the present invention, FIG. 2 is a protection sequence diagram of the embodiment of the digital bus protection relay according to the invention, and FIG. 3 shows the operation of FIG. 2. Flow chart to explain, FIG. 4 is a diagram of another embodiment, FIG. 5 is a protection sequence diagram of another embodiment, FIG. 6 is a configuration diagram of a conventional digital f-ray protection relay, and FIG. 7 is a diagram of a conventional digital f-line protection relay. FIG. 8, a protection sequence diagram of a conventional digital busbar protection relay, is a diagram for explaining the characteristics of the prior art and the present invention. 1...Digital type bus bar protection relay 2...Bus bar 3...Feeder 4...
・Current transformer 5...Auxiliary current transformer 6...Sample and hold circuit 7...Multiplexer 8...A/D converter 9・
...CPU 10...Setting section 11...
・Neutral point grounding resistance 12...873 element 13...
87G element 14...51G element 15...
51 elements
Claims (1)
ダの零相電流のベクトル和を用いる差動要素にて保護す
るディジタル形母線保護リレーにおいて、母線につなが
る複数のフィーダからの零相電流の大きさを夫々検出す
る手段と、夫々の零相電流の大きさが所定値を越えたこ
とを検出して動作出力を導出する過電流検出手段と、前
記した各手段の少なくとも1つの動作出力により前記差
動要素の出力を阻止する手段とを備えたことを特徴とす
るディジタル形母線保護リレー。In digital bus protection relays that protect against ground faults on resistive grounding system buses using differential elements that use the vector sum of the zero-sequence currents of all feeders connected to the bus, means for detecting the magnitude of each zero-sequence current, overcurrent detection means for detecting that the magnitude of each zero-sequence current exceeds a predetermined value and deriving an operating output, and at least one operating output of each of the above-mentioned means. A digital bus protection relay comprising: means for blocking the output of the differential element.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1156424A JP3011420B2 (en) | 1989-06-19 | 1989-06-19 | Digital bus protection relay |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1156424A JP3011420B2 (en) | 1989-06-19 | 1989-06-19 | Digital bus protection relay |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0322822A true JPH0322822A (en) | 1991-01-31 |
JP3011420B2 JP3011420B2 (en) | 2000-02-21 |
Family
ID=15627447
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1156424A Expired - Lifetime JP3011420B2 (en) | 1989-06-19 | 1989-06-19 | Digital bus protection relay |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3011420B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030045249A (en) * | 2001-12-01 | 2003-06-11 | 엘지전선 주식회사 | An over current relay for underground transmission cable |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57156626A (en) * | 1981-03-19 | 1982-09-28 | Mitsubishi Electric Corp | Bus protecting relay |
JPS5866522A (en) * | 1981-10-14 | 1983-04-20 | 三菱電機株式会社 | Bus protecting and relaying device |
JPS58218825A (en) * | 1982-06-11 | 1983-12-20 | 株式会社東芝 | Bus protecting relay device |
-
1989
- 1989-06-19 JP JP1156424A patent/JP3011420B2/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57156626A (en) * | 1981-03-19 | 1982-09-28 | Mitsubishi Electric Corp | Bus protecting relay |
JPS5866522A (en) * | 1981-10-14 | 1983-04-20 | 三菱電機株式会社 | Bus protecting and relaying device |
JPS58218825A (en) * | 1982-06-11 | 1983-12-20 | 株式会社東芝 | Bus protecting relay device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030045249A (en) * | 2001-12-01 | 2003-06-11 | 엘지전선 주식회사 | An over current relay for underground transmission cable |
Also Published As
Publication number | Publication date |
---|---|
JP3011420B2 (en) | 2000-02-21 |
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