JPH0322817A - Discharge detecting circuit for high voltage power source - Google Patents

Discharge detecting circuit for high voltage power source

Info

Publication number
JPH0322817A
JPH0322817A JP15458589A JP15458589A JPH0322817A JP H0322817 A JPH0322817 A JP H0322817A JP 15458589 A JP15458589 A JP 15458589A JP 15458589 A JP15458589 A JP 15458589A JP H0322817 A JPH0322817 A JP H0322817A
Authority
JP
Japan
Prior art keywords
circuit
terminal
voltage
abnormality
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15458589A
Other languages
Japanese (ja)
Inventor
Toru Kanazawa
金沢 徹
Shigeru Yamamoto
繁 山本
Mitsukuni Touda
任田 充州
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Engineering Co Ltd
Hitachi Ltd
Original Assignee
Hitachi Engineering Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Engineering Co Ltd, Hitachi Ltd filed Critical Hitachi Engineering Co Ltd
Priority to JP15458589A priority Critical patent/JPH0322817A/en
Publication of JPH0322817A publication Critical patent/JPH0322817A/en
Pending legal-status Critical Current

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  • Protection Of Static Devices (AREA)
  • Dc-Dc Converters (AREA)
  • Emergency Protection Circuit Devices (AREA)

Abstract

PURPOSE:To inform abnormality of load to the outside by detecting electrical variation at the side of input circuit through a circuit having high voltage generating section upon occurrence of abnormality of load then stopping following discharge phenomenon through utilization of detected signal. CONSTITUTION:Upon occurrence of abnormality in a load, oscillation of ternary winding L3 stops. At this time, voltage to be produced from a current transformer 27 also drops thus lowering the potential at a terminal 32 connected with a comparator 17. When the potential at the terminal 32 drops below the potential at a terminal 43, output from the comparator 17 is inverted and the current flow is deflected from the base terminal 49 to the output of the comparator 17. Consequently, a transistor 38 is disabled and a conduction signal is fed to the gate terminal 39 of a stop thyristor 36 thus conducting the stop thyristor 36. When the stop thyristor 36 conducts, a light emission diode is lighted to inform the abnormality.

Description

【発明の詳細な説明】 〔産業上の利用分野』 本発明は、電子複写機の帯電除電用高圧電源及び集塵機
用高圧電源に係り、特に保護に好適な高圧電源放電検出
回路に関する. 〔従来の技術〕 従来の装置は、特開昭54−54232号に記載の様な
構成となっている.従来例とじて第2図を用いて説明す
る.端子13.14に端子13が正となる直流電圧を印
加し.スイッチ2を閉じると,スイッチング用トランジ
スタlが発振を描始し、昇圧用トランス3により発振周
波数に呼応して昇圧トランス3の二次巻* L zに電
圧が発生し、整流用ダイオード4及び平滑用抵抗とコン
デンサ5により出力点6に高圧出力が発生する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a high-voltage power supply for static electricity removal of an electronic copying machine and a high-voltage power supply for a dust collector, and particularly to a high-voltage power supply discharge detection circuit suitable for protection. [Prior Art] A conventional device has a configuration as described in Japanese Patent Application Laid-Open No. 54-54232. A conventional example will be explained using Figure 2. Apply a DC voltage that makes terminal 13 positive to terminals 13 and 14. When the switch 2 is closed, the switching transistor l starts to oscillate, and the step-up transformer 3 generates a voltage in the secondary winding *Lz of the step-up transformer 3 in response to the oscillation frequency, and the rectifier diode 4 and the smoothing A high voltage output is generated at the output point 6 by the resistor and capacitor 5.

尚、発振開始後は,三次巻線L8により電圧が発生し、
抵抗7及び帰還回路を構成する抵抗8,コンデンサ9よ
り発振を繰り返し出力点6には安定した出力が供給され
る. 出力点6において持続的な短絡現象が生ずる場合には三
次巻線L3の電圧は発生せず発振動作は停止する.又,
瞬間的放電生ずる場合には抵抗10,12,コンデンサ
11の回路により回路は停止しても自動的に発振を復帰
させ出力点6側の損傷と発振用トランジスタ1自体の損
傷を防いでいる. 但し,本方式においては断続的に出力点6が放電を繰り
返す場合に,放電ノイズが外部に発散することになり高
圧電圧系と論理回路系が混在する回路においては、誤動
作を防止出来ないことになる。
Furthermore, after the oscillation starts, a voltage is generated by the tertiary winding L8,
Oscillation is repeated by the resistor 7, the resistor 8, and the capacitor 9 that constitute the feedback circuit, and a stable output is supplied to the output point 6. If a continuous short circuit phenomenon occurs at the output point 6, no voltage is generated in the tertiary winding L3 and the oscillation operation stops. or,
When an instantaneous discharge occurs, the circuit of resistors 10, 12 and capacitor 11 automatically restores oscillation even if the circuit stops, thereby preventing damage to the output point 6 side and damage to the oscillation transistor 1 itself. However, in this method, if the output point 6 repeatedly discharges intermittently, discharge noise will be emitted to the outside, and malfunctions cannot be prevented in a circuit where a high voltage system and a logic circuit system coexist. Become.

別の公知例として第3図に示す様な負荷電流を検出し,
入力を遮断する様な方法が使用される。
Another known example is to detect the load current as shown in Figure 3,
A method such as blocking the input is used.

この動作を説明すると、スイッチ2を投入することによ
り,発振回路15により発振用トランジスタ1は発振を
行い昇圧用トランス3の二次巻線L2には高圧が発生し
5l1流用ダイオード4,抵抗及びコンデンサ5により
直流電圧が出力点6に発生する.この場合の発振方式に
ついてはどの様な発振方式を使用してもかまわない.抵
抗とコンデンサ5より出力点6に流れる電流を検出する
為,検出用抵抗l6を接続しておき、定常電流について
は,比較器17が動作しない様に基準電圧l8を設定し
ておく,出力点6に短絡現象が生じた場合には,検出用
抵抗l6に発生する電位が増大する為,基準電圧18を
越えた場合に制御回路19を介し、スイッチ2を開放し
、出力点6の異常を検出する. この公知例の場合、再起動させる為にスイッチ2を再投
入する必要あるが、出力点6の異常について、特に断続
的短絡現象については,入力部をスイッチで開放するこ
とが出来、負荷及び発振用トランジスタ1の損失を防ぐ
ことが出来る.但し,その検出点をトランスの二次巻g
Lz側に持・つている為,検出用抵抗16は耐電圧能力
を確保する必要があり形状が大きくなり,価格も高くな
る. 絶縁能力に関しても検出用抵抗16を介しても出力点6
と電気的に接続されることにより比較器17及び制御回
路19については#@縁能力の高い電源用トランスを要
することになる。
To explain this operation, when the switch 2 is turned on, the oscillation transistor 1 is caused to oscillate by the oscillation circuit 15, and high voltage is generated in the secondary winding L2 of the step-up transformer 3. 5, a DC voltage is generated at output point 6. Any oscillation method can be used in this case. In order to detect the current flowing from the resistor and capacitor 5 to the output point 6, a detection resistor l6 is connected, and for steady current, a reference voltage l8 is set so that the comparator 17 does not operate. If a short-circuit phenomenon occurs at the output point 6, the potential generated at the detection resistor l6 will increase, so if it exceeds the reference voltage 18, the switch 2 will be opened via the control circuit 19, and the abnormality at the output point 6 will be detected. To detect. In the case of this known example, it is necessary to turn on switch 2 again in order to restart, but in case of an abnormality at output point 6, especially in the case of an intermittent short circuit phenomenon, the input section can be opened with a switch, and the load and oscillation loss of transistor 1 can be prevented. However, the detection point is the secondary winding g of the transformer.
Since the detection resistor 16 is mounted on the Lz side, it is necessary to ensure withstand voltage capability, resulting in a larger size and higher price. Regarding the insulation ability, the output point 6 is also connected via the detection resistor 16.
Since the comparator 17 and the control circuit 19 are electrically connected to the power supply transformer, a power transformer with high power supply capacity is required for the comparator 17 and the control circuit 19.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記、従来技術は,高圧発生部を有する回路と論理回路
の混在回路について放電時に発生するノイズによる誤動
作について考慮されておらず,後者については,検出部
を高圧側と電気的に接続される為、形状が大きくなり高
価となる問題が含まれている. 本発明の目的は、高圧発生部を有する回路と論理回路の
混在回路において出力点、換言すれば負荷の異常に伴う
瞬時、断続又は連続短絡(放電現象)を検出し、この検
出信号を利用し後続の放電現象を停止し、負荷が異常で
あることを外部に告知することにある。
The above-mentioned conventional technology does not take into account malfunctions due to noise generated during discharge in a circuit that includes a high-voltage generating section and a logic circuit, and in the latter case, the detection section is electrically connected to the high-voltage side. , the problem is that the shape becomes large and expensive. An object of the present invention is to detect instantaneous, intermittent, or continuous short circuits (discharge phenomena) associated with an abnormality in the output point, in other words, in a load abnormality, in a mixed circuit including a circuit having a high voltage generating part and a logic circuit, and to utilize this detection signal. The purpose is to stop the subsequent discharge phenomenon and notify the outside that the load is abnormal.

〔I題を解決するための手段〕[Means to solve problem I]

上記目的は,負荷の異常に対する変動を入力側で検出す
ることにより達或される。
The above object is achieved by detecting on the input side variations due to load abnormalities.

〔作用〕[Effect]

高圧発生部を有する回路と論理回路の混在回路において
、負荷の異常を生じた場合に高圧発生部を有する回路に
て入力回路側に電気的変動が発生するので入力側でこれ
を検出し,この検出信号を利用して後続の放電現象を停
止させ負荷の異常を外部に告知することが出来る。
In a mixed circuit that includes a circuit that has a high voltage generator and a logic circuit, if a load abnormality occurs, electrical fluctuations will occur on the input circuit side of the circuit that has a high voltage generator. Using the detection signal, it is possible to stop the subsequent discharge phenomenon and notify the outside of the load abnormality.

〔実施例〕〔Example〕

以下,本発明の実施例を第l図により説明する。 An embodiment of the present invention will be described below with reference to FIG.

一点鎖線の高圧発生部20は帰還回路の抵抗8,コンデ
ンサ9の位置が異るものの公知例の最初に記載した回路
と同一の発振方式を行い、13,14間に13側に正の
直流電圧が印加されると二次巻線L2より高電圧を発生
し、出力点6に高電圧が発生する。
The high voltage generating section 20 shown by the dashed line performs the same oscillation method as the circuit described at the beginning of the known example, although the positions of the resistor 8 and capacitor 9 of the feedback circuit are different, and a positive DC voltage is applied to the 13 side between 13 and 14. When is applied, a high voltage is generated from the secondary winding L2, and a high voltage is generated at the output point 6.

本実施例では交流入力端子21.22に商用電圧を印加
し、電源スイッチ2,負荷異常時電源供給を停止する停
止用機械式接点23を介し整流回路24にて整流し、制
限抵抗25を通してコンデンサ26にて平滑,直流電U
E &供給する.以下,検出動作につき説明するε,停
止用機械式接点23を閉じた状態にして回路を構成し、
電源スイッチ2を閉じると既に記載の如く端子13,1
4に直流電圧が印加され出力点6に高圧電圧が発生する
In this embodiment, commercial voltage is applied to AC input terminals 21 and 22, rectified by a rectifier circuit 24 through a power switch 2 and a stop mechanical contact 23 that stops power supply in the event of a load abnormality, and passed through a limiting resistor 25 to a capacitor. Smoothed at 26, DC current U
E & supply. The detection operation will be explained below, and the circuit is configured with the stop mechanical contact 23 closed,
When the power switch 2 is closed, the terminals 13 and 1 are connected as described above.
A DC voltage is applied to the output point 6, and a high voltage is generated at the output point 6.

この時,交流入力の一線に変流器27を挿入することに
より、交流入力電流の値を絶縁したまま電圧へ変換出来
る. 整流回路28は、交流器27で発生した電圧を整流する
回路で、これを平滑用コンデンサ29で平滑する. 平滑された電圧を抵抗30.31で分圧することにより
端子32に検出用電圧を形或する.端子32に定常の検
出用電圧が確立した時点で、制御電源端子33.34よ
り制御スイッチ35を介して端子33が正の直流電圧を
印加する.定常状態Letおいては,停止用サイリスタ
36は非導通であり、停止用機械式接点23の励磁コイ
ル37は励磁されていないので停止用機械式接点23は
閉じたままである, 又,トランジスタ38は定常時導通状態であり、停止用
サイリスタ36のゲート端子39には導通用信号は与え
られない。
At this time, by inserting a current transformer 27 in one line of the AC input, the value of the AC input current can be converted to voltage while being insulated. The rectifier circuit 28 is a circuit that rectifies the voltage generated by the alternator 27, and smooths this with a smoothing capacitor 29. A detection voltage is formed at the terminal 32 by dividing the smoothed voltage using resistors 30 and 31. When a steady detection voltage is established at the terminal 32, a positive DC voltage is applied to the terminal 33 from the control power supply terminals 33 and 34 via the control switch 35. In the steady state Let, the stop thyristor 36 is non-conducting and the excitation coil 37 of the stop mechanical contact 23 is not excited, so the stop mechanical contact 23 remains closed. It is in a conductive state during steady state, and no conduction signal is applied to the gate terminal 39 of the stop thyristor 36.

比較器17の一方には前述の端子32を経て、検出用電
圧が印加され、もう一方の入力には,制御電源電圧端子
33.34に印加された直流電圧を抵抗40,抵抗41
及び可変抵抗42で分圧された電圧が端子43に印加さ
れる。比較器17の正及び負の端子は各々44.45に
接続されている. 定常時、比較器17の出力端子46は正であるので、抵
抗47を介しトランジスタ38のベース端子49にベー
ス電流が流れ込んでいる。抵抗47.48はトランジス
タの動作を決定する抵抗である. 抵抗50,コンデンサ51及び抵抗52,コンデンサ5
3は、各々トランジスタ及び停止用サイリスタ誤動作防
止用の回路である. 尚、ダイオード54は,制御用電源端子33,34より
印加された直流電圧が比較器17の端子32に印加され
ている検出用電圧への影響を阻止する為に接続されてい
る.また,ツエナーダイオード58は、起動時、高圧発
生部20の平滑コンデンサ26が電荷がない時、電源ス
イッチ2を投入すると、突入電流が流れ込み変流器27
より、高い電圧が発生するので,これを除去する為に接
続されている. 高圧発生部20の出力点6に接続された負荷が異常とな
り短終等を起こした場合、三次巻線L3の電圧が発生し
なくなり発振が停止する.この時,交流入力電流も発振
停止に伴い減少し変流器27より発生する電圧も低下し
、付随して比較lI17に接続された端子32の電位も
減少する. この端子32の電位が端子43の電位より低くなった場
合に比較器17の出力46は反転し、トランジスタ38
のベース端子49に流れ込んでいた電流は抵抗47を介
し比較器17の出力へ流れ込む. この為,トランジスタ38は非導通となり抵抗55を介
して停止用サイリスタ36のゲート端子39に導通用信
号が与えられ停止用サイリスタ36は導通する。
A detection voltage is applied to one side of the comparator 17 via the aforementioned terminal 32, and the DC voltage applied to the control power supply voltage terminals 33 and 34 is applied to the other input through the resistors 40 and 41.
A voltage divided by a variable resistor 42 is applied to a terminal 43. The positive and negative terminals of comparator 17 are connected to 44.45, respectively. During normal operation, the output terminal 46 of the comparator 17 is positive, so a base current flows into the base terminal 49 of the transistor 38 via the resistor 47. Resistors 47 and 48 are resistors that determine the operation of the transistor. Resistor 50, capacitor 51 and resistor 52, capacitor 5
3 is a circuit for preventing malfunction of a transistor and a stop thyristor, respectively. Note that the diode 54 is connected to prevent the DC voltage applied from the control power supply terminals 33 and 34 from affecting the detection voltage applied to the terminal 32 of the comparator 17. Furthermore, when the power switch 2 is turned on when the smoothing capacitor 26 of the high voltage generating section 20 has no charge at startup, an inrush current flows into the Zener diode 58 and the current transformer 27
Since a higher voltage is generated, it is connected to remove this voltage. If the load connected to the output point 6 of the high voltage generator 20 becomes abnormal and causes a short termination, etc., the voltage in the tertiary winding L3 will not be generated and oscillation will stop. At this time, the AC input current also decreases as the oscillation stops, the voltage generated by the current transformer 27 also decreases, and the potential of the terminal 32 connected to the comparison lI17 also decreases. When the potential of this terminal 32 becomes lower than the potential of the terminal 43, the output 46 of the comparator 17 is inverted, and the transistor 38
The current flowing into the base terminal 49 of the current flows into the output of the comparator 17 via the resistor 47. Therefore, the transistor 38 becomes non-conductive, and a conductive signal is applied to the gate terminal 39 of the stop thyristor 36 through the resistor 55, so that the stop thyristor 36 becomes conductive.

停止用サイリスタ36の導通に伴い励磁コイル37が励
磁され。同時に制限抵抗56を介し発光ダイオード57
が点灯し,、異常を告知する.励磁コイル37の励磁に
より停止用機械式接点23は開となり、後続の交流入力
がなくなる為、放電現象は発生シ、,ない。
As the stop thyristor 36 becomes conductive, the excitation coil 37 is excited. At the same time, a light emitting diode 57 is connected via a limiting resistor 56.
lights up to notify you of an abnormality. Due to the excitation of the excitation coil 37, the stop mechanical contact 23 is opened and there is no subsequent AC input, so no discharge phenomenon occurs.

ここで,製品の縮少化に伴い、論理回路系(マイクロプ
ロセッサを含む)59や信号線60が出力点6と近接す
る場合に出力点6に接続された負荷の異常により短絡又
は、絶縁破壊による短絡により放電時のノイズが論理回
路系59に伝播されることが有る. これに伴い論理回路系59が誤動作又は破損する可能性
がある為異常検出を行う場合留意を要する. この様に高圧系と論理回路系の混在回路において、放電
時のノイズに対する個々の論理回路系の耐量は、高圧系
と論理回路系の結合容量、取付方法,信号線又は電源線
の配線長、回路自体の耐量及び放電エネルギーの大小等
各要素が組み合わされて生ずる為定量的把握は難しいが
、論理回路系のノイズ耐量に見合った回路構成を要する
ことになる. 例えば、本実施例の場合、端子32の検出電位と端子4
3の基準電位の差を少なくする程検出感度は良くなる. 又,平滑用コンデンサ29の静電容量を少なくする程検
出感度は良くなることは明らかである。
With the shrinking of products, if the logic circuit system (including microprocessor) 59 or signal line 60 is close to the output point 6, a short circuit or dielectric breakdown may occur due to an abnormality in the load connected to the output point 6. Noise during discharge may be propagated to the logic circuit system 59 due to a short circuit. As a result, there is a possibility that the logic circuit system 59 may malfunction or be damaged, so care must be taken when detecting abnormalities. In this way, in a mixed circuit of high voltage system and logic circuit system, the ability of each logic circuit system to withstand noise during discharge depends on the coupling capacitance of high voltage system and logic circuit system, installation method, wiring length of signal line or power line, Although it is difficult to understand quantitatively because it is caused by a combination of various factors such as the circuit's withstand capacity and the magnitude of the discharge energy, it is necessary to have a circuit configuration that is commensurate with the noise capacity of the logic circuit system. For example, in the case of this embodiment, the detected potential of terminal 32 and the terminal 4
The detection sensitivity improves as the difference between the reference potentials in step 3 is reduced. Furthermore, it is clear that the detection sensitivity improves as the capacitance of the smoothing capacitor 29 is reduced.

比較器17も高速型を使用し、トランジスタ39及び検
出用サイリスタ3¥3の誤動作防止用コンデンサ51.
53の静電容量を小さくすれば更に検出感度は良くなる
. 但し,本実施例の場合交流入力電流を検出対象としてい
る為、5 0 H z動作の場合には全波整流回路の電
流を変流器で検出している為10msecが理論的限界
である. 更に検出感度を高める為には、負荷短終に伴い影響を受
ける発振用トランジスタ1のコレクタエミツタ間電位を
分圧して検出電位として端子32に与える方法も考えら
れる。
The comparator 17 also uses a high-speed type, and the transistor 39 and the capacitor 51 for preventing malfunction of the detection thyristor 3.
If the capacitance of 53 is made smaller, the detection sensitivity will be further improved. However, in this embodiment, since the AC input current is the object of detection, in the case of 50 Hz operation, the current of the full-wave rectifier circuit is detected by a current transformer, so 10 msec is the theoretical limit. In order to further increase the detection sensitivity, it is conceivable to divide the collector-emitter potential of the oscillation transistor 1, which is affected by the short load, and apply it to the terminal 32 as a detection potential.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、高圧発生部を有する回路と論理回路(
マイクロプロセッサ含む)において負荷の異常に伴う瞬
時、断続又は連続知絡(放ffi現象)を検出できるの
で、この検出信号を利用し後続の放電現象を停止し、負
荷が異常であることを外部に告知できる。
According to the present invention, a circuit having a high voltage generating section and a logic circuit (
(including microprocessors) can detect instantaneous, intermittent, or continuous short circuits (discharge phenomenon) associated with load abnormalities, so this detection signal can be used to stop subsequent discharge phenomena and notify the outside that the load is abnormal. Can be announced.

【図面の簡単な説明】[Brief explanation of drawings]

第l図は本発明の一実施例を示す図,第2図,第3図は
従来の実施例を示す図である。 l・・・スイッチング用トランジスタ、2・・・電源ス
イッチ、3・・・昇圧用トランス、4・・・整流用ダイ
オ−第 2 .A 第 1 図 第 3 図
FIG. 1 shows an embodiment of the present invention, and FIGS. 2 and 3 show conventional embodiments. 1... Switching transistor, 2... Power switch, 3... Step-up transformer, 4... Rectifier diode - 2nd. A Figure 1 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 1、高圧発生部を有する回路と論理回路(マイクロプロ
セッサを含む)の混在回路において高圧発生部に接続さ
れた負荷の異常に伴う断続又は連続の放電現象を検出し
、この検出信号を利用し後続の放電現象を停止し、負荷
が異常であることを外部に告知することを特徴とする高
圧電源放電検出回路。
1. Detects intermittent or continuous discharge phenomena due to an abnormality in the load connected to the high voltage generator in a mixed circuit that has a high voltage generator and a logic circuit (including a microprocessor), and uses this detection signal to detect subsequent discharges. A high-voltage power supply discharge detection circuit is characterized in that it stops the discharge phenomenon and notifies the outside that the load is abnormal.
JP15458589A 1989-06-19 1989-06-19 Discharge detecting circuit for high voltage power source Pending JPH0322817A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15458589A JPH0322817A (en) 1989-06-19 1989-06-19 Discharge detecting circuit for high voltage power source

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15458589A JPH0322817A (en) 1989-06-19 1989-06-19 Discharge detecting circuit for high voltage power source

Publications (1)

Publication Number Publication Date
JPH0322817A true JPH0322817A (en) 1991-01-31

Family

ID=15587418

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15458589A Pending JPH0322817A (en) 1989-06-19 1989-06-19 Discharge detecting circuit for high voltage power source

Country Status (1)

Country Link
JP (1) JPH0322817A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06340027A (en) * 1993-06-01 1994-12-13 Sumitomo Metal Ind Ltd Polyolefin resin-coated steel pipe

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06340027A (en) * 1993-06-01 1994-12-13 Sumitomo Metal Ind Ltd Polyolefin resin-coated steel pipe

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