JPH03219670A - Manufacture of photoelectric transducer - Google Patents

Manufacture of photoelectric transducer

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Publication number
JPH03219670A
JPH03219670A JP2015312A JP1531290A JPH03219670A JP H03219670 A JPH03219670 A JP H03219670A JP 2015312 A JP2015312 A JP 2015312A JP 1531290 A JP1531290 A JP 1531290A JP H03219670 A JPH03219670 A JP H03219670A
Authority
JP
Japan
Prior art keywords
forming
crystal
semiconductor
substrate
semiconductor crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2015312A
Other languages
Japanese (ja)
Inventor
Tetsuya Kawachi
哲也 河内
Toru Maekawa
前川 通
Kosaku Yamamoto
山本 功作
Tetsuo Saito
哲男 齊藤
Iwao Sugiyama
巌 杉山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2015312A priority Critical patent/JPH03219670A/en
Publication of JPH03219670A publication Critical patent/JPH03219670A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To enable a subelectrode to be formed easily by forming a recessed part of a specified pattern on a semiconductor substrate, by forming a light-receiving part by selectively introducing an impurity atom for forming an element at a semiconductor crystal for forming the element within the recessed part, by forming an extraction electrode on the light-receiving part, and by forming the subelectrode which is common to the element on the semiconductor substrate. CONSTITUTION:A resist film is formed on a P-type GaAs substrate 11 where an impurity atom is doped. Then, a recessed part 12 is formed with the resist film as a mask. Then, a CdTe layer 13 is formed on the P-type GaAs substrate 11. Further, an Hg1-XCdXTe crystal 14 with x=0.2 is formed. Then, heat treatment is performed to form a P-type crystal with a carrier concentration of 1X10<16>/cm<2>. Then, the Hg1-XCdXTe crystal which is allowed to grow on a region other than the recessed part 12 of the P-type GaAs substrate 11. Then, using the resist film as a mask, a B atom is selectively ion-implanted for forming an N-type layer 15. This N-type layer becomes a light-receiving part. Then, a extraction electrode 16 is formed at the light- receiving part of the N-type layer 15 and a subelectrode 17 is formed also on the P-type GaAs substrate 11, thus enabling a photoelectric transducer to be formed.

Description

【発明の詳細な説明】 〔概 要〕 光電変換素子の製造方法に関し、 クロストークの発生がなく、かつサブ電極の形成が容易
な光電変換素子を目的とし、 素子形成用半導体結晶よりもエネルギーバンドギャップ
が広く、かつ低抵抗の半導体基板に所定パターンの凹部
を形成し、 該半導体基板上に前記素子形成用半導体結晶の構成元素
を含む半導体結晶を形成後、 前記半導体基板上に素子形成用半導体結晶を形成し、 前記基板上に形成した半導体結晶と素子形成用半導体結
晶との相互拡散により前記半導体結晶を素子形成用半導
体結晶とした後、 該凹部内以外の領域の素子形成用半導体結晶を除去し、 前記凹部内の素子形成用半導体結晶に素子形成用不純物
原子を選択的に導入して受光部を形成後、該受光部上に
引き出し電極を形成するとともに、前記半導体基板上に
素子に共通のサブ電極を形成することで構成する。
[Detailed Description of the Invention] [Summary] Regarding a method for manufacturing a photoelectric conversion element, the aim is to produce a photoelectric conversion element that does not cause crosstalk and allows easy formation of sub-electrodes, and has an energy band lower than that of a semiconductor crystal for forming the element. After forming a predetermined pattern of recesses in a semiconductor substrate with a wide gap and low resistance, and forming a semiconductor crystal containing constituent elements of the semiconductor crystal for forming an element on the semiconductor substrate, forming a semiconductor for forming an element on the semiconductor substrate. After forming a crystal and making the semiconductor crystal into a semiconductor crystal for element formation by interdiffusion between the semiconductor crystal formed on the substrate and the semiconductor crystal for element formation, the semiconductor crystal for element formation in a region other than the inside of the recess is After selectively introducing element-forming impurity atoms into the semiconductor crystal for element formation in the recess to form a light-receiving part, an extraction electrode is formed on the light-receiving part, and an element is formed on the semiconductor substrate. It is constructed by forming a common sub-electrode.

〔産業上の利用分野〕[Industrial application field]

本発明は赤外線検知素子のような光電変換素子の製造方
法に関する。
The present invention relates to a method for manufacturing a photoelectric conversion element such as an infrared sensing element.

赤外線検知素子のような光電変換素子は、エネルギーバ
ンドギャップの狭い水銀・カドミウム・テルルのような
化合物半導体基板に形成されており、これらの素子の高
解像度化を図るために、該基板に多数の素子を高密度に
配置する構造が採られている。
Photoelectric conversion elements such as infrared sensing elements are formed on compound semiconductor substrates such as mercury, cadmium, and tellurium, which have narrow energy band gaps. A structure is adopted in which elements are arranged at high density.

〔従来の技術〕[Conventional technology]

従来、このような光電変換素子を形成する場合、第4図
に示すようにP型Hg1−x CdXTe結晶1にN型
のボロン(B)原子を所定のパターンにイオン注入して
N型層2を形成してP−N接合を形成して素子を形成し
ている。
Conventionally, when forming such a photoelectric conversion element, as shown in FIG. is formed to form a PN junction to form an element.

ところで、このような素子を高密度に配置すると、素子
間の距Mdが該結晶内で光電変換されたキャリア3の拡
散長よりも短くなると、上記キャリアが隣接する検知素
子に導入されて、該検知素子で得られる信号にクロスト
ークが発生するようになり、空間分解能が低下した感度
の悪い検知素子となる。
By the way, when such elements are arranged at high density, when the distance Md between the elements becomes shorter than the diffusion length of the carriers 3 photoelectrically converted within the crystal, the carriers are introduced into the adjacent detection element and Crosstalk begins to occur in the signals obtained by the sensing element, resulting in a sensing element with poor sensitivity and reduced spatial resolution.

従来、このようなりロストークの発生を防止した光電変
換素子の製造方法として第3図に示すように、CdTe
基板4にイオンミリング法、或いはレジスト膜をマスク
とした選択エツチング法により所定のパターンの凹部5
を形成する。
Conventionally, as shown in FIG. 3, as a method for manufacturing photoelectric conversion elements that prevents the occurrence of such losstalk, CdTe
A predetermined pattern of recesses 5 is formed on the substrate 4 by ion milling or selective etching using a resist film as a mask.
form.

次いで該基板上に液相エピタキシャル成長方法、MOC
VD法等を用いてP型のHgt−s+ ca、 Te結
晶6を形成後、該結晶6を研磨して前記した凹部5内に
P型Hg1−x Cdx Te結晶6を埋設する。
Next, a liquid phase epitaxial growth method, MOC
After forming a P-type Hgt-s+ ca, Te crystal 6 using a VD method or the like, the crystal 6 is polished and the P-type Hg1-x Cdx Te crystal 6 is buried in the recess 5 described above.

次いでレジスト膜をマスクとしてボロン(B)原子を選
択的にイオン注入してN型層2を形成する。このN型層
2が受光部となる。
Next, using the resist film as a mask, boron (B) atoms are selectively ion-implanted to form an N-type layer 2. This N-type layer 2 becomes a light receiving section.

次いでレジスト膜をマスクとして用いてインジウム(I
n)の蒸着等により前記形成した受光部に引き出し電極
7を形成するとともに、上記P型のHgt−* Cdx
 Te結晶6上にもサブ電極(前記受光部上の引き出し
電極より低電位となる電極)8を形成している。
Next, using the resist film as a mask, indium (I
An extraction electrode 7 is formed on the light receiving portion formed above by vapor deposition or the like of n), and the above P-type Hgt-*Cdx
A sub-electrode 8 (an electrode having a lower potential than the extraction electrode on the light receiving section) is also formed on the Te crystal 6.

そして前記電極7.8間に前記受光部上より入射した光
によって生じるキャリアの電流を検知して光の入射量を
検知している。
The amount of incident light is detected by detecting carrier current generated by light incident from above the light receiving section between the electrodes 7 and 8.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

ところで上記した従来の構造の光電変換素子では各素子
毎にサブ電極8を形成しており、そのためサブ電極を多
数形成する必要があり、その工程が煩雑で光電変換素子
の製造に手間が掛かる問題がある。
By the way, in the photoelectric conversion element of the conventional structure described above, the sub-electrode 8 is formed for each element, so it is necessary to form a large number of sub-electrodes, and the process is complicated and the manufacturing of the photoelectric conversion element takes time. There is.

このようなサブ電極は、複数の光電変換素子に対して共
通に設けても良いが、前記CdTe基板は絶縁体に近く
、所定の抵抗値に制御してドーピングする技術が確立し
て居らず、低抵抗の基板が得難い。そのため、上記サブ
電極とCdTe基板との間の接触抵抗が高い難点があり
、そのため素子を形成しているP型のHgt□Cdy 
Te結晶に素子毎に形成している。
Such a sub-electrode may be provided in common for a plurality of photoelectric conversion elements, but the CdTe substrate is close to an insulator, and there is no established technology for controlling and doping it to a predetermined resistance value. Low resistance substrates are difficult to obtain. Therefore, there is a drawback that the contact resistance between the sub-electrode and the CdTe substrate is high.
Each element is formed in a Te crystal.

本発明は上記した問題点を除去し、クロストークの発生
が無く、かつサブ電極が容易に形成できる光電変換素子
の製造方法を目的とする。
An object of the present invention is to provide a method for manufacturing a photoelectric conversion element that eliminates the above-mentioned problems, does not cause crosstalk, and allows easy formation of sub-electrodes.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的を達成する本発明の光電変換素子の製造方法は
、素子形成用半導体結晶よりもエネルギーバンドギャッ
プが広く、かつ低抵抗の半導体基板に所定パターンの凹
部を形成し、 該半導体基板上に前記素子形成用半導体結晶の構成元素
を含む半導体結晶を形成後、 前記半導体基板上に素子形成用半導体結晶を形成し、 前記基板上に形成した半導体結晶と素子形成用半導体結
晶との相互拡散により前記半導体結晶を素子形成用半導
体結晶とした後、 該凹部内板外の領域の素子形成用半導体結晶を除去し、 前記凹部内の素子形成用半導体結晶に素子形成用不純物
原子を選択的に導入して受光部を形成後、該受光部上に
引き出し電極を形成するとともに、前記半導体基板上に
素子に共通のサブ電極を形成する。
A method for manufacturing a photoelectric conversion element of the present invention that achieves the above object includes forming a predetermined pattern of recesses on a semiconductor substrate having a wider energy bandgap and lower resistance than a semiconductor crystal for forming the element, and forming the recesses on the semiconductor substrate as described above. After forming a semiconductor crystal containing constituent elements of a semiconductor crystal for forming an element, forming a semiconductor crystal for forming an element on the semiconductor substrate, and interdiffusion between the semiconductor crystal formed on the substrate and the semiconductor crystal for forming an element, After converting the semiconductor crystal into a semiconductor crystal for forming an element, removing the semiconductor crystal for forming an element in a region outside the inner plate of the recess, and selectively introducing impurity atoms for forming an element into the semiconductor crystal for forming an element within the recess. After forming a light receiving section, an extraction electrode is formed on the light receiving section, and a sub-electrode common to the elements is formed on the semiconductor substrate.

〔作 用] 本発明の方法は、素子形成用のHg+−x Cdx T
e結晶よりもエネルギーバンドギヤツブが大きく、かつ
不純物原子の添加により容易に低抵抗の結晶が得られる
シリコン(Si)、ゲルマニウム(Ge)、ガリウム砒
素(GaAs) 、インジウム燐(InP ) 、イン
ジウム・ガリウム・砒素(InGaAs) 、アルミニ
ウム・ガリウム・砒素(1lGaAs) 、ガリウム燐
(GaP)、ガリウムアンチモン(Ga5b) 、炭化
珪素(5iC)等の半導体を基板として用い、この基板
に凹部を形成した後、該基板と格子定数が接近して単結
晶が得られ易いCdTe結晶を形成する。
[Function] The method of the present invention provides Hg+-x Cdx T for element formation.
Silicon (Si), germanium (Ge), gallium arsenide (GaAs), indium phosphide (InP), and indium phosphorus (InP), which have a larger energy band gear than e-crystals and can easily be made into low-resistance crystals by adding impurity atoms. Using a semiconductor such as gallium arsenide (InGaAs), aluminum gallium arsenide (1lGaAs), gallium phosphorous (GaP), gallium antimony (Ga5b), or silicon carbide (5iC) as a substrate, after forming a recess in this substrate, A CdTe crystal whose lattice constant is close to that of the substrate and a single crystal is easily obtained is formed.

次いでこのCdTe結晶上に、素子形成用のf(g+〜
XCdXTe結晶を形成し、このCdTe結晶と”gi
−x CdxTe結晶とを相互拡散して凹部内にHg1
−x Cdx Te結晶を埋設し、該ng、−Xcaつ
Te結晶に素子形成用不純物原子を導入して受光部を形
成する。そして凹部領域以外に形成されたHg+−x 
Cdx Te結晶を除去後、露出した半導体基板にサブ
電極を形成するとこの基板はCdTe結晶より抵抗値が
低くサブ電極が確実に形成できる。
Next, on this CdTe crystal, f(g+~
XCdXTe crystal is formed, and this CdTe crystal and “gi
-x CdxTe crystal is interdiffused to form Hg1 in the recess.
A -x Cdx Te crystal is embedded, and element-forming impurity atoms are introduced into the ng, -Xca Te crystal to form a light receiving section. And Hg+-x formed outside the concave area
After removing the Cdx Te crystal, if a sub-electrode is formed on the exposed semiconductor substrate, this substrate has a lower resistance value than the CdTe crystal, and the sub-electrode can be formed reliably.

また第2図に示すように、上記P型のGaAs基板11
は、素子形成用のP型のHg+−m CdX Te結晶
14よりもエネルギーバンドギャップが大きいために、
検知素子間に導入された赤外線は透過して検知素子間で
キャリアは発生せず、矢印C方向より入射されて素子内
で形成されたキャリア18は、GaAs基板の広エネル
ギーバンドギャップのエネルギーバンド障壁によって遮
られて素子内に溜り、隣接の素子に到達できないために
クロストークの発生が無く、高感度の素子が得られる。
Further, as shown in FIG. 2, the P-type GaAs substrate 11
has a larger energy band gap than the P-type Hg+-m CdX Te crystal 14 for device formation.
The infrared rays introduced between the sensing elements are transmitted and no carriers are generated between the sensing elements, and the carriers 18 formed within the elements by being incident from the direction of arrow C are the energy band barrier of the wide energy bandgap of the GaAs substrate. Since the light is blocked by the light and accumulated in the element and cannot reach adjacent elements, crosstalk does not occur, and a highly sensitive element can be obtained.

(実 施 例〕 以下、図面を用いて本発明の一実施例につき詳細に説明
する。
(Example) Hereinafter, one example of the present invention will be described in detail using the drawings.

第1図(a)より第1図(gi迄は、本発明の光電変換
素子の製造方法を示す平面図、および断面図である。
FIG. 1(a) to FIG. 1(gi) are a plan view and a cross-sectional view showing the method for manufacturing a photoelectric conversion element of the present invention.

第1図(a)および第1図ta+のIi′線断面図の第
1図(b)に示すように、不純物原子をドープしたP型
でキャリア濃度がl xlQ”/ cll”の高キャリ
ア濃度で、面積が0.5インチ×0.5インチで、厚さ
が300μmのGaAs基板11に図示しないが所定の
パターンのレジスト膜を形成する。
As shown in FIG. 1(a) and FIG. 1(b), which is a cross-sectional view taken along line Ii' of FIG. Then, a resist film having a predetermined pattern (not shown) is formed on a GaAs substrate 11 having an area of 0.5 inches by 0.5 inches and a thickness of 300 μm.

次いで該レジスト膜をマスクとして、臭素(Brz)と
メタノールの混合液のエツチング液を用い、直径が10
μmで深さが8μ−の凹部12を形成する。
Next, using the resist film as a mask, an etching solution of a mixture of bromine (Brz) and methanol was used to make a
A recess 12 with a depth of 8 μm is formed.

次いで第1図(C)に示すように、基板温度を300℃
、CdTe結晶をソースとして用い、成長時間を1時間
としたホットウォールエピタキシャル成長方法により、
P型GaAs基板11上にCdTe層13を4μmの厚
さに形成する。
Next, as shown in Figure 1(C), the substrate temperature was increased to 300°C.
, by a hot wall epitaxial growth method using a CdTe crystal as a source and a growth time of 1 hour.
A CdTe layer 13 is formed on a P-type GaAs substrate 11 to a thickness of 4 μm.

更に第1図(d)に示すように、液相エピタキシャル成
長方法により成長温度480 ”Cで成長時間を2時間
としてx=0.2のl1g+−x Cd)+ Te結晶
14を10μmの厚さに形成する。
Furthermore, as shown in FIG. 1(d), an l1g+-x Cd)+ Te crystal 14 with x=0.2 was grown to a thickness of 10 μm using a liquid phase epitaxial growth method at a growth temperature of 480"C and a growth time of 2 hours. Form.

このエピタキシャル成長時に基板上のCdTe結晶13
はその上に形成される11g1□Cd、 Te結晶14
との相互拡散によってHg1−、 Cd、 Te結晶に
変換する。
During this epitaxial growth, the CdTe crystal 13 on the substrate
11g1□Cd, Te crystal 14 formed on it
It is converted into Hg1-, Cd, and Te crystals by interdiffusion with Hg1-, Cd, and Te crystals.

次いでこの基板を水銀ガス雰囲気内で熱処理(。This substrate is then heat treated in a mercury gas atmosphere.

て上記Hg+□Cd、 Te結晶の空格子点を埋めてキ
ャリア濃度がI XIO”/ cm’のP型結晶とする
Then, the vacancies in the Hg+□Cd, Te crystal are filled to form a P-type crystal with a carrier concentration of IXIO''/cm'.

次いで第1図(e)に示すように、P型GaAs基板1
1の凹部12以外の領域上に成長したHg+−x Cd
X Te結晶を臭素とメタノールのエツチング液で除去
する。
Next, as shown in FIG. 1(e), a P-type GaAs substrate 1
Hg+-xCd grown on the area other than the recess 12 of No.1
Remove the X Te crystals with an etching solution of bromine and methanol.

次いで第1図(f)に示すように、レジスト膜(図示せ
ず)をマスクとして用い、B原子を選択的にイオン注入
して直径が3μmのN型層15を形成する。このN型層
が受光部となる。
Next, as shown in FIG. 1(f), using a resist film (not shown) as a mask, B atoms are selectively ion-implanted to form an N-type layer 15 having a diameter of 3 μm. This N-type layer becomes a light receiving section.

次いで第1図(匂に示すように、N型層15の受光部上
に引き出し電極16をレジスト膜を用いたりフトオフ法
を用いて蒸着により形成するとともに、P型GaAs基
板11にも上記の方法によりサブ電極17を形成し光電
変換素子を形成する。
Next, as shown in FIG. 1, an extraction electrode 16 is formed on the light-receiving portion of the N-type layer 15 by vapor deposition using a resist film or a foot-off method, and the P-type GaAs substrate 11 is also formed using the above method. A sub-electrode 17 is formed by this, and a photoelectric conversion element is formed.

このようにするとサブ電極17は低抵抗のP型Ga^S
基板ll上に接触抵抗の小さい状態で確実に形成される
ので各素子毎に形成する必要はなく共通に形成出来るの
で製造方法が容易となり、工程が短縮される。
In this way, the sub-electrode 17 is made of low-resistance P-type Ga^S.
Since it is reliably formed on the substrate 11 with low contact resistance, it is not necessary to form it for each element, but it can be formed commonly, which simplifies the manufacturing method and shortens the process.

また矢印A方向のように検知素子間に入射した赤外線は
、GaAs基板がHg+−x caX Teよりもエネ
ルギーバンドギャップか°広いために、透過してキャリ
アは形成されず、クロストークは発生しない。
Further, the infrared rays incident between the sensing elements as shown in the direction of arrow A are transmitted through the GaAs substrate and no carriers are formed, so that no crosstalk occurs.

また矢印B方向のように検知素子に入射した赤外線は、
Hg+−x Cdx Te結晶14で光電変換されてキ
ャリアとなり、このキャリアはGaAs基板がHg+−
8CdXTe結晶よりエネルギーバンドギャップが広い
ために、エネルギー障壁によってGaAs基板側へ移動
出来ず、)Ig+−x C(1+ Te結晶内に溜りこ
み、入射光量が少ない場合でも高感度に検知できる高感
度の素子が得られる。
Also, infrared rays incident on the detection element in the direction of arrow B,
Hg+-x Cdx is photoelectrically converted into carriers by the Te crystal 14, and these carriers become carriers when the GaAs substrate becomes Hg+-
Since the energy band gap is wider than that of the 8CdXTe crystal, it cannot move toward the GaAs substrate due to the energy barrier, and the )Ig+-x C(1+) accumulates inside the Te crystal, making it a highly sensitive material that can be detected with high sensitivity even when the amount of incident light is small. An element is obtained.

また上記サブ電極は高エネルギーバンドギャップのGa
As基板上に形成されているので、キャリアの再結合も
生じない。
In addition, the above sub-electrode is made of high energy bandgap Ga.
Since it is formed on an As substrate, carrier recombination does not occur.

なお、本実施例では半導体基板としてGaAs基板を用
いたが、その他Hg+−x Cd、 Te結晶よりもエ
ネルギーバンドギャップが大きく、かつ不純物原子のド
ーピングにより低抵抗の結晶が得られるシリコン(Si
)、ゲルマニウム(Ge)、ガリウム砒!(GaAs)
 、インジウム燐(InP ) 、インジウム・ガリウ
ム・砒素(1nGaAs) 、アルミニウム・ガリウム
・砒素(AIGaAs) 、ガリウム燐(GaP)、ガ
リウムアンチモン(Ga5b) 、炭化珪素(5iC)
等の半導体を基板として用いても良い。
In this example, a GaAs substrate was used as the semiconductor substrate, but silicon (Si), which has a larger energy bandgap than Hg+-x Cd or Te crystals and can obtain a crystal with low resistance by doping with impurity atoms, may also be used.
), germanium (Ge), gallium arsenic! (GaAs)
, indium phosphorus (InP), indium gallium arsenide (1nGaAs), aluminum gallium arsenide (AIGaAs), gallium phosphorus (GaP), gallium antimony (Ga5b), silicon carbide (5iC)
A semiconductor such as the following may be used as the substrate.

〔発明の効果〕〔Effect of the invention〕

以上の説明から明らかなように本発明によれば、サブ電
極が容5に形成できるので製造方法が容易となり、かつ
クロストークの発生しない高感度の光電変換素子が得ら
れる効果がある。
As is clear from the above description, according to the present invention, since the sub-electrode can be formed in the shape of the container 5, the manufacturing method becomes easy, and a highly sensitive photoelectric conversion element without crosstalk can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)より第1図(l迄は、本発明の光電変換素
子の製造方法を示す平面図、および断面図、第2図は本
発明の光電変換素子のエネルギーバンドの説明図、 第3図は従来の光電変換素子を示す断面図、第4図は従
来の光電変換素子の不都合を示す説明図である。 図において、 11はP型GaAs基板、12は凹部、13はCdTe
層、14はllgt−x caXTe結晶、15はN型
層、16は引き出し電極、17はサブ電極、18はキャ
リアを示す。 第 1 図 (−+n2)
1(a) to 1(l) are plan views and cross-sectional views showing the method of manufacturing the photoelectric conversion element of the present invention, FIG. 2 is an explanatory diagram of the energy band of the photoelectric conversion element of the present invention, Fig. 3 is a sectional view showing a conventional photoelectric conversion element, and Fig. 4 is an explanatory diagram showing disadvantages of the conventional photoelectric conversion element. In the figure, 11 is a P-type GaAs substrate, 12 is a recess, and 13 is a CdTe
14 is an llgt-x caXTe crystal, 15 is an N-type layer, 16 is an extraction electrode, 17 is a sub-electrode, and 18 is a carrier. Figure 1 (-+n2)

Claims (1)

【特許請求の範囲】 素子形成用半導体結晶(14)よりもエネルギーバンド
ギャップが広く、かつ低抵抗の半導体基板(11に所定
パターンの凹部(12)を形成し、 該半導体基板上に前記素子形成用半導体結晶の構成元素
を含む半導体結晶(13)を形成後、前記半導体基板上
に素子形成用半導体結晶を形成し、 前記基板上に形成した半導体結晶と素子形成用半導体結
晶との相互拡散により前記半導体結晶を素子形成用半導
体結晶とした後、 該凹部内以外の領域の素子形成用半導体結晶を除去し、 前記凹部内の素子形成用半導体結晶に素子形成用不純物
原子を選択的に導入して受光部(15)を形成後、 該受光部上に引き出し電極(16)を形成するとともに
、前記半導体基板上に素子に共通のサブ電極(17)を
形成することを特徴とする光電変換素子の製造方法。
[Claims] Forming a predetermined pattern of recesses (12) in a semiconductor substrate (11) with a wider energy bandgap and lower resistance than a semiconductor crystal (14) for forming an element, and forming the element on the semiconductor substrate (11). After forming a semiconductor crystal (13) containing constituent elements of the semiconductor crystal for use in the semiconductor device, a semiconductor crystal for forming an element is formed on the semiconductor substrate, and by mutual diffusion between the semiconductor crystal formed on the substrate and the semiconductor crystal for forming the element. After the semiconductor crystal is used as a device-forming semiconductor crystal, removing the device-forming semiconductor crystal in a region other than the recess, and selectively introducing device-forming impurity atoms into the device-forming semiconductor crystal in the recess. After forming a light receiving part (15), an extraction electrode (16) is formed on the light receiving part, and a sub-electrode (17) common to the element is formed on the semiconductor substrate. manufacturing method.
JP2015312A 1990-01-24 1990-01-24 Manufacture of photoelectric transducer Pending JPH03219670A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2015312A JPH03219670A (en) 1990-01-24 1990-01-24 Manufacture of photoelectric transducer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015312A JPH03219670A (en) 1990-01-24 1990-01-24 Manufacture of photoelectric transducer

Publications (1)

Publication Number Publication Date
JPH03219670A true JPH03219670A (en) 1991-09-27

Family

ID=11885269

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015312A Pending JPH03219670A (en) 1990-01-24 1990-01-24 Manufacture of photoelectric transducer

Country Status (1)

Country Link
JP (1) JPH03219670A (en)

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