JPH03208346A - Removal of void from solder bump - Google Patents
Removal of void from solder bumpInfo
- Publication number
- JPH03208346A JPH03208346A JP150990A JP150990A JPH03208346A JP H03208346 A JPH03208346 A JP H03208346A JP 150990 A JP150990 A JP 150990A JP 150990 A JP150990 A JP 150990A JP H03208346 A JPH03208346 A JP H03208346A
- Authority
- JP
- Japan
- Prior art keywords
- voids
- bumps
- solder
- solder bump
- styluses
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910000679 solder Inorganic materials 0.000 title claims abstract description 37
- 239000011800 void material Substances 0.000 title claims description 11
- 238000000034 method Methods 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 abstract description 5
- 239000000463 material Substances 0.000 abstract description 3
- 238000002844 melting Methods 0.000 abstract description 3
- 230000008018 melting Effects 0.000 abstract description 3
- 230000004907 flux Effects 0.000 abstract description 2
- 241001422033 Thestylus Species 0.000 abstract 2
- 238000007872 degassing Methods 0.000 description 8
- 238000013022 venting Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 239000012776 electronic material Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/225—Correcting or repairing of printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、はんだバンプ中に発生したボイドの除去方法
に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for removing voids generated in solder bumps.
従来のはんだバンプ内に発生したボイドを除去する方法
は、ボイドのみつかったはんだバンプを除去した後、再
度はんだバンプの形成を行なうものであった。A conventional method for removing voids generated in solder bumps involves removing the solder bumps in which voids have been found, and then forming the solder bumps again.
なおこの種の技術として関連するものには例えば(株)
工業調査会発行の[電子材料のはんだ付技術J (1
985年1月15日発行)P271〜P273に記載さ
れた技術がある。Related technologies of this type include, for example, Co., Ltd.
[Soldering Technology for Electronic Materials J (1) published by the Industrial Research Council
There is a technique described in pages 271 to 273 (published January 15, 1985).
上記従来技術は、はんだバンプ除去の際の作業性や信頼
性確保の点について配慮がされておらず、除去工程及び
再形成に時間がかかること、および再形成登行った際に
再びボイドが発生する可能性がある等の問題があった。The above conventional technology does not take into consideration workability and reliability when removing solder bumps, and the removal process and re-forming take time, and voids occur again when re-forming. There were problems such as the possibility of
本発明の目的は、ボイドの除去時間を短縮し、ボイドの
除去を確実に行うことにある。An object of the present invention is to shorten the time required to remove voids and to ensure the removal of voids.
上記目的を達成するために、本発明は、はんだバンプを
加熱して溶融させた状態で、該はんだバンプに針を刺し
、はんだバンプ中のボイドからガスを抜くようにしたも
のであ。In order to achieve the above object, the present invention is designed to pierce a solder bump with a needle after heating and melting the solder bump to release gas from voids in the solder bump.
はんだバンプを溶融した状態で加熱した針をはんだバン
プに通すと、はんだバンプの形成の際にはんだバンプ中
に残留したガスを抜くことができる。その後、針を抜け
ば、はんだの表面張力によリ、再び球形のはんだバンプ
を得ることができる。By passing a heated needle through the solder bump while the solder bump is molten, gas remaining in the solder bump during formation of the solder bump can be removed. After that, when the needle is removed, a spherical solder bump can be obtained again due to the surface tension of the solder.
以下1本発明の一実施例について図面を用いて説明する
。An embodiment of the present invention will be described below with reference to the drawings.
第1図は、本実施例の実施状態を示す縦断面図である。FIG. 1 is a longitudinal sectional view showing the implementation state of this embodiment.
1ははんだバンプ、2はボイド、3は接続パッド、4は
電子部品、5は部品加熱用ホットプレート、6はボイド
内ガス抜き絹針、7はボイド内ガス抜き絹針を加熱する
ヒータである。ボイド内ガス抜き絹針6は、はんだの付
着しない材質とし、接続パッド3と同ピツチで設けであ
る。1 is a solder bump, 2 is a void, 3 is a connection pad, 4 is an electronic component, 5 is a hot plate for heating the component, 6 is a silk needle for venting gas in the void, and 7 is a heater for heating the silk needle for venting gas in the void. . The void gas venting silk needles 6 are made of a material to which solder does not adhere, and are provided at the same pitch as the connection pads 3.
はんだバンプ1にフラックスを塗布した部品4をホット
プレート5上に位置決めして固定後、はんだバンプ1に
用いられているはんだ材の融点を10〜20度越える温
度まで加熱する。またその際に、ガス抜き絹針6も加熱
ヒータ7で同様の温度まで加熱する。ガス抜き絹針6を
接続パッド3と同じ位置になる様に位置決めした後、ガ
ス抜き絹針6を第2図に示す様に、はんだバンプl中に
。A component 4 with solder bumps 1 coated with flux is positioned and fixed on a hot plate 5, and then heated to a temperature 10 to 20 degrees higher than the melting point of the solder material used for the solder bumps 1. At this time, the degassing silk needle 6 is also heated to the same temperature by the heater 7. After positioning the degassing silk needle 6 to be at the same position as the connection pad 3, insert the degassing silk needle 6 into the solder bump l as shown in FIG.
0.5〜2mm/秒の速度で刺す、この時にボイド2内
のガスが抜ける。それから5〜10秒経過後、ガス抜き
絹針6を0,5〜2 m m 7秒の速度で引き上げる
と、はんだの表面張力によって第3図に示す様なボイド
の消滅した球状のはんだバンプが得られる。なお、本作
業実施の際、ガス抜き絹針6を刺してからの保持時間が
短かすぎると。Stab at a speed of 0.5 to 2 mm/sec, at which time the gas in the void 2 is released. After 5 to 10 seconds have elapsed, when the degassing needle 6 is pulled up at a speed of 0.5 to 2 mm for 7 seconds, the surface tension of the solder creates a spherical solder bump with no voids as shown in Figure 3. can get. In addition, when carrying out this work, if the holding time after pricking with the degassing silk needle 6 is too short.
ガス抜きが不充分となり、ボイドを除去することができ
ない場合がある。なお上記条件は1本実施例に使用した
部品によるもので必ずしもこれに固定されるものではな
い。Gas venting may be insufficient and voids may not be removed. Note that the above conditions depend on the parts used in this embodiment and are not necessarily fixed thereto.
この様にして、はんだバンプ1を溶融した状態でガス抜
き絹針6をはんだバンプ中に通すと、はんだバンプ形成
時に発生したボイド2を容易に短時間で除去することが
できる。In this way, by passing the degassing silk needle 6 through the solder bump 1 in a molten state, the voids 2 generated during the solder bump formation can be easily removed in a short time.
本発明によれば、はんだバンプ形成時に生じたボイドを
容易に除去することができるので、部品の接続寿命を長
くすることができる。また従来時間のかかっていた作業
を短時間で行うことができる。According to the present invention, voids generated when forming solder bumps can be easily removed, so that the connection life of components can be extended. In addition, tasks that conventionally took time can be completed in a short time.
さらに、接続パッド数と同様の針を同時にはんだバンプ
中に通すことによってボイドの全体を一度に除去するこ
とができる。Additionally, the entire void can be removed at once by passing as many needles as the number of connection pads through the solder bump at the same time.
第1図は、本発明の一実施例の基本構成を示した図、第
2図は、ガス抜き絹針をはんだバンプに刺した状態を示
した図、第3図は、ガス抜き絹針を引き上げた後の状態
を示した図である。
1:はんだバンプ、 2:ボイド、 3:接続パッド
、 4:部品、 5:部品加熱用ヒータ、6:ボイド内
ガス抜き絹針、 7:ヒータ。
第 1 図
第2図
¥!J 3図
・r)、FIG. 1 is a diagram showing the basic configuration of an embodiment of the present invention, FIG. 2 is a diagram showing a state in which a degassing silk needle is inserted into a solder bump, and FIG. 3 is a diagram showing a state in which a degassing silk needle is inserted into a solder bump. It is a figure showing the state after being pulled up. 1: Solder bump, 2: Void, 3: Connection pad, 4: Component, 5: Heater for heating the component, 6: Silk needle for venting gas in void, 7: Heater. Figure 1 Figure 2 ¥! J Figure 3/r),
Claims (1)
バンプに針を刺し、該はんだバンプ中のボイドからガス
を抜くことにより該ボイドを消滅させることを特徴とす
るはんだバンプのボイド除去方法。1. A method for removing voids from a solder bump, which comprises: inserting a needle into the heated solder bump in a molten state, and removing gas from the void in the solder bump to eliminate the void.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP150990A JPH03208346A (en) | 1990-01-10 | 1990-01-10 | Removal of void from solder bump |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP150990A JPH03208346A (en) | 1990-01-10 | 1990-01-10 | Removal of void from solder bump |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03208346A true JPH03208346A (en) | 1991-09-11 |
Family
ID=11503454
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP150990A Pending JPH03208346A (en) | 1990-01-10 | 1990-01-10 | Removal of void from solder bump |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03208346A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5877079A (en) * | 1996-12-02 | 1999-03-02 | Fujitsu Limited | Method for manufacturing a semiconductor device and a method for mounting a semiconductor device for eliminating a void |
JP2016157766A (en) * | 2015-02-24 | 2016-09-01 | 株式会社タムラ製作所 | Reflow method for solder bump |
-
1990
- 1990-01-10 JP JP150990A patent/JPH03208346A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5877079A (en) * | 1996-12-02 | 1999-03-02 | Fujitsu Limited | Method for manufacturing a semiconductor device and a method for mounting a semiconductor device for eliminating a void |
JP2016157766A (en) * | 2015-02-24 | 2016-09-01 | 株式会社タムラ製作所 | Reflow method for solder bump |
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