JPH0320782A - Picture display device - Google Patents
Picture display deviceInfo
- Publication number
- JPH0320782A JPH0320782A JP15543589A JP15543589A JPH0320782A JP H0320782 A JPH0320782 A JP H0320782A JP 15543589 A JP15543589 A JP 15543589A JP 15543589 A JP15543589 A JP 15543589A JP H0320782 A JPH0320782 A JP H0320782A
- Authority
- JP
- Japan
- Prior art keywords
- signal lines
- vertical signal
- circuit
- short
- odd
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000007689 inspection Methods 0.000 claims abstract description 7
- 238000012360 testing method Methods 0.000 claims description 20
- 239000011159 matrix material Substances 0.000 claims description 4
- 239000010409 thin film Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 9
- 239000004973 liquid crystal related substance Substances 0.000 abstract description 7
- 238000010586 diagram Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
Landscapes
- Liquid Crystal Display Device Control (AREA)
- Liquid Crystal (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、絶縁基板上に薄膜トランジスタを用いて形威
した液晶画像表示装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a liquid crystal image display device formed using thin film transistors on an insulating substrate.
従来の技術 以下に従来の画像表示装置について説明する。Conventional technology A conventional image display device will be explained below.
第３図に従来の構戒図を示す。垂直走査回路１１及び水
平走査回路１２による駆動回路があり、水平走査回路１
２の各出力部には、水平走査回路１２の出力により制御
される転送用トランジスタスイッチ群１３が形成されて
いる。画素部１４は二次元マトリクス状に配列され、ア
クティブマトリクス方式で駆動される。垂直走査回路１
１の出力である水平ゲート線はポリシリコンで形成され
、垂直信号線はＡＬにより形成されており、画素部へ点
順次に書き込まれるようになっている。Figure 3 shows a conventional composition diagram. There is a drive circuit including a vertical scanning circuit 11 and a horizontal scanning circuit 12.
A transfer transistor switch group 13 that is controlled by the output of the horizontal scanning circuit 12 is formed in each output section of 2 . The pixel section 14 is arranged in a two-dimensional matrix and driven by an active matrix method. Vertical scanning circuit 1
The horizontal gate line, which is the output of 1, is formed of polysilicon, and the vertical signal line is formed of AL, so that data is written into the pixel portion in a dot-sequential manner.
発明が解決しようとする課題
しかしながら、このような従来の構成では、垂直信号線
間に短絡がある場合、その箇所を見つけることは非常に
困難であり、通常、信号線を１本１本確認するか、液晶
工程を通し、画素を表示させなければならないという欠
点があった。Problems to be Solved by the Invention However, in such a conventional configuration, if there is a short circuit between vertical signal lines, it is very difficult to find the location, and it is usually necessary to check each signal line one by one. Another drawback was that pixels had to be displayed through a liquid crystal process.
本発明は上記欠点に鑑み、垂直信号線間に短絡がある場
合、液晶工程以前に短絡の有無と箇所が判定できる画像
表示装置を提供するものである。In view of the above drawbacks, the present invention provides an image display device that can determine the presence or absence and location of a short circuit before the liquid crystal process when there is a short circuit between vertical signal lines.
課題を解決するための手段
上記課題を解決するために、本発明の画像表示装置は垂
直信号線の奇数番目の終端，偶数番目の終端にそれぞれ
検査用スイッチ群を設け、各信号線の信号が検査用スイ
ッチ群の制御端子に接続されることにより構成されてい
る。そして検査用スイッチ群は抵抗を直列接続すること
でＮＯＲ回路になる。Means for Solving the Problems In order to solve the above problems, the image display device of the present invention provides a group of inspection switches at the odd-numbered ends and the even-numbered ends of the vertical signal lines, so that the signals of each signal line are It is configured by being connected to the control terminal of the test switch group. The testing switch group becomes a NOR circuit by connecting resistors in series.
作用
上記構成により、画素部を通る垂直信号線の奇数番目の
終端には各々検査用スイッチが設けられており、抵抗と
直列接続することによりそれぞれＮＯＲ回路を構成して
いる。また偶数番目の終端にも同様のＮＯＲ回路を構成
している。水平走査回路の出力により制御される転送用
トランジスタスイッチ群の入力端子には、水平走査回路
の各出力の選択期間よりも短いパルスを入力する。もし
も垂直信号線間に短絡があれば、奇数番目及び偶数番目
の垂直信号線終端のＮＯＲ回路の出力は短絡のある所で
同じ波形となる。Effect With the above configuration, a test switch is provided at each odd-numbered end of the vertical signal line passing through the pixel section, and each of the test switches is connected in series with a resistor to form a NOR circuit. Similar NOR circuits are also configured at even-numbered terminals. A pulse shorter than the selection period of each output of the horizontal scanning circuit is input to the input terminal of the transfer transistor switch group controlled by the output of the horizontal scanning circuit. If there is a short circuit between the vertical signal lines, the outputs of the NOR circuits at the ends of the odd-numbered and even-numbered vertical signal lines will have the same waveform at the location where the short circuit exists.
本発明は上記の原理に基づくものであり、垂直信号線間
の短絡の有無及びその位置を簡単に調べることのできる
画像表示装置を提供するものである。The present invention is based on the above principle, and provides an image display device that can easily check for the presence or absence of short circuits between vertical signal lines and their positions.
実施例
以下、本発明の一実施例について図面を参照しながら説
明する。EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.
第１図は本発明の実施例における画像表示装置の構成図
を示す。１は垂直走査回路、２は水平走査回路、３は転
送用トランジスタスイッチ群、４は画素部、５は奇数段
信号線用検査用スイッヂ群、６は偶数段信号線用検査用
スイッチ群、７は水平ゲート線、８は垂直信号線である
。画素はアクティブマトリクス方式で、スイッチング用
薄膜トランジスタを有している。また、水平走査回路２
の出力部には、水平走査回路２の出力により制御される
転送用トランジスタスイッチ群３が備えられており、画
素部４へＡＬ配線により点順次書き込みで信号伝達を行
う。FIG. 1 shows a configuration diagram of an image display device in an embodiment of the present invention. 1 is a vertical scanning circuit, 2 is a horizontal scanning circuit, 3 is a group of transfer transistor switches, 4 is a pixel section, 5 is a group of testing switches for odd-numbered signal lines, 6 is a group of testing switches for even-numbered signal lines, 7 8 is a horizontal gate line, and 8 is a vertical signal line. The pixels are of an active matrix type and have thin film transistors for switching. In addition, the horizontal scanning circuit 2
The output section is equipped with a transfer transistor switch group 3 controlled by the output of the horizontal scanning circuit 2, and signals are transmitted to the pixel section 4 by dot-sequential writing through AL wiring.
次に本発明の画像表示装置の画素部４を通る垂直信号線
間の短絡を調べる方法について説明する。第２図（ａ）
． （ｂ）にその構成図と各点における電圧波形図を
示す。Ａ，Ｂ，Ｃは水平走査回路２の出力波形、Ｄは転
送用トランジスタスイッチ群３に入力する検査用パルス
を示している。各垂直信号線は奇数及び偶数段信号線用
検査用スイッチ群５．６のゲートに入力されており、各
段のスイッチ群のソース，ドレインは共通になっている
。さらに、奇数及び偶数段検査用スイッチ群５，６はそ
れぞれ抵抗とによりＮＯＲ回路を構威している。抵抗Ｒ
の大きさは検査用スイッチに用いるトランジスタのオン
抵抗よりも大きく、オフ抵抗よりも小さく設定される。Next, a method of checking for short circuits between vertical signal lines passing through the pixel section 4 of the image display device of the present invention will be described. Figure 2(a)
．． (b) shows its configuration and voltage waveform diagrams at each point. A, B, and C indicate output waveforms of the horizontal scanning circuit 2, and D indicates a test pulse input to the transfer transistor switch group 3. Each vertical signal line is input to the gate of a test switch group 5.6 for odd and even stage signal lines, and the source and drain of the switch groups in each stage are common. Furthermore, the odd-numbered and even-numbered stage test switch groups 5 and 6 each constitute a NOR circuit with a resistor. Resistance R
is set to be larger than the on-resistance and smaller than the off-resistance of the transistor used in the test switch.
ここで例えば図中の矢印で示された垂直信号線間が短絡
していたとする。まず垂直信号ｌｌ１！８間に短絡がな
いとすると、Ｅで観測される出力波形はＤに入力する検
査用パルスにおいて、水平走査回路２の奇数段目が選択
される期間内のみが出力される。同様にＦで観測される
波形は偶数段目の選択期間内のみが出力される。すなわ
ちＤに入力される検査用パルスがＥとＦに分配された格
好となる。しかし、図中に矢印で示されたように垂直信
号線間に短絡があった場合、必ず奇数番目と偶数番目が
短絡する事となり、短絡のある箇所ではＥとＦの出力は
同じになり、同じ出力のある所で短絡があることがわか
る。また、垂直信号線８の短絡が３本以上にわたる場合
も同様の検査で行うことができ、この場合、ＥとＦの出
力において同じ波形になる期間が長くなるだけである。For example, suppose that the vertical signal lines indicated by arrows in the figure are short-circuited. First, assuming that there is no short circuit between vertical signals ll1!8, the output waveform observed at E is output only during the period when the odd-numbered stage of horizontal scanning circuit 2 is selected in the test pulse input to D. . Similarly, the waveform observed at F is output only within the selection period of the even-numbered stage. In other words, the test pulse input to D is distributed to E and F. However, if there is a short circuit between the vertical signal lines as shown by the arrow in the figure, the odd-numbered and even-numbered lines will always be shorted, and the outputs of E and F will be the same at the point where there is a short circuit. It can be seen that there is a short circuit where there is the same output. Furthermore, if three or more vertical signal lines 8 are short-circuited, a similar test can be performed, and in this case, the period during which the E and F outputs have the same waveform is simply lengthened.
以上のように画像表示装置の奇数段及び偶数段目の垂直
信号線の終端にそれぞれ検査用スイッチ群を設け、抵抗
とによりＮＯＲ回路を構成し、その出力波形を観察する
ことにより、従来各信号線を１本１本調べるか又は液晶
工程を経て画像を表示させるまで不明であった垂直信号
線間の短絡とその位置を液晶工程以前に簡単に知ること
ができる。また、検査用スイッチ群は実施例では薄膜ト
ランジスタにより形成しているため、水平，垂直各走査
回路を形成する場合と同時に作製することができるので
、新たにプロセスを増や必要がない。As described above, test switch groups are provided at the ends of the odd-numbered and even-numbered vertical signal lines of the image display device, a NOR circuit is configured with a resistor, and the output waveform of the NOR circuit is observed. Short circuits between vertical signal lines and their positions, which were unknown until the lines were inspected one by one or an image was displayed through the liquid crystal process, can be easily known before the liquid crystal process. Furthermore, since the test switch group is formed of thin film transistors in the embodiment, it can be manufactured at the same time as the horizontal and vertical scanning circuits, so there is no need to add new processes.
なお、本実施例では、検査用スイッチ群としてトランジ
スタを用いたが、他の構戒にしてもよい。また抵抗は外
付けにしても内蔵としてもよく、トランジスタによる抵
抗を用いてもよい。さらに、転送用トランジスタスイッ
チ群はｎチャネルトランジスタでもＰチャネルトランジ
スタでよく、またはＣＭＯＳ−ＴＦＴ構威の転送用ゲー
トでもよい。Note that in this embodiment, transistors are used as the test switch group, but other structures may be used. Further, the resistor may be externally attached or built-in, or a resistor using a transistor may be used. Further, the transfer transistor switch group may be an n-channel transistor or a p-channel transistor, or may be a transfer gate of a CMOS-TFT structure.
発明の効果
以上のように、本発明は、奇数番目の垂直信号線終端に
検査用スイッチ群を設け、直列接続する抵抗とによりＮ
ＯＲ回路を構成し、さらに偶数番目の垂直信号線終端に
も検査用回路を設けて抵抗とによりＮＯＲ回路を構成し
たところにある。このような構成によれば、奇数番目，
偶数番目にそれぞれ設けたＮＯＲ回路の出力信号を確認
するだけで、従来困難であった垂直信号線間の短絡を、
液晶工程以前に簡単に知ることができるようになり、そ
の実用的効果は大なるものがある。Effects of the Invention As described above, the present invention provides a group of test switches at the ends of odd-numbered vertical signal lines, and connects the resistors in series to
An OR circuit is constructed, and a testing circuit is also provided at the end of an even-numbered vertical signal line, and a NOR circuit is constructed with a resistor. According to this configuration, the odd numbered,
Just by checking the output signals of the NOR circuits installed at even-numbered positions, short circuits between vertical signal lines, which was previously difficult, can be detected.
This can be easily understood before the liquid crystal process, and its practical effects are significant.
第１図は本発明の実施例における画像表示装置の構威図
、第２図（ａ） ． （ｂ）は本発明の実施例における
短絡の検査例の構成図、電圧波形図、第３図は従来の画
像表示装置の構成図である。
１・・・・・・垂直走査回路、２・・・・・・水平走査
回路、３・・・・・・転送用トランジスタスイッチ群、
４・・・・・・画素部、５・・・・・・奇数段信号線用
検査用スイッチ群、６・・・・・・偶数段信号線用検査
用スイッチ群、７・・・・・・水平ゲート線、８・・・
・・・垂直信号線。FIG. 1 is a structural diagram of an image display device according to an embodiment of the present invention, and FIG. 2(a). (b) is a configuration diagram and a voltage waveform diagram of an example of short circuit inspection in the embodiment of the present invention, and FIG. 3 is a configuration diagram of a conventional image display device. 1...Vertical scanning circuit, 2...Horizontal scanning circuit, 3...Transfer transistor switch group,
4...Pixel section, 5...Odd-numbered stage signal line inspection switch group, 6...Even-numbered stage signal line inspection switch group, 7...・Horizontal gate line, 8...
...Vertical signal line.
Claims (1)
直走査回路、二次元マトリクス状に配列された画素、各
列の画素に映像信号を供給する垂直信号線、水平ゲート
線を備え、前記水平走査回路の出力部は前記水平走査回
路の出力パルスにより制御される映像信号を垂直信号線
に転送するスイッチ群があり、垂直信号線の終端は検査
用スイッチ群の制御端子に接続されており、奇数番目の
垂直信号線終端にある検査用スイッチ群のソース、ドレ
インが共通で、偶数番目の垂直信号線終端にある検査用
スイッチ群のソース、ドレインが共通であることを特徴
とする画像表示装置。A horizontal scanning circuit using thin film transistors, a vertical scanning circuit, pixels arranged in a two-dimensional matrix, a vertical signal line supplying a video signal to each column of pixels, and a horizontal gate line are provided on an insulating substrate, and an output of the horizontal scanning circuit is provided. The part has a switch group that transfers the video signal controlled by the output pulse of the horizontal scanning circuit to the vertical signal line, and the terminal end of the vertical signal line is connected to the control terminal of the inspection switch group, and the odd-numbered vertical An image display device characterized in that a group of test switches located at the ends of signal lines have a common source and a drain, and a group of test switches located at the ends of even-numbered vertical signal lines have a common source and drain.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15543589A JP2594358B2 (en) | 1989-06-16 | 1989-06-16 | Image display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15543589A JP2594358B2 (en) | 1989-06-16 | 1989-06-16 | Image display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0320782A true JPH0320782A (en) | 1991-01-29 |
| JP2594358B2 JP2594358B2 (en) | 1997-03-26 |
Family
ID=15605966
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15543589A Expired - Fee Related JP2594358B2 (en) | 1989-06-16 | 1989-06-16 | Image display device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2594358B2 (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH055897A (en) * | 1991-06-28 | 1993-01-14 | Sharp Corp | Method for checking active matrix substrate |
| US6982568B2 (en) | 2003-03-07 | 2006-01-03 | Mitsubishi Denki Kabushiki Kaisha | Image display device having inspection terminal |
| KR100671513B1 (en) * | 2000-12-12 | 2007-01-19 | 비오이 하이디스 테크놀로지 주식회사 | Method for detecting short position of liquid crystal display device |
| CN105261317A (en) * | 2015-09-17 | 2016-01-20 | 京东方科技集团股份有限公司 | Detection method and detection device for short-circuited defect of data wires |
| JP2016085269A (en) * | 2014-10-23 | 2016-05-19 | セイコーエプソン株式会社 | Electro-optic substrate, electro-optic device and electronic device |
| WO2021139658A1 (en) * | 2020-01-06 | 2021-07-15 | 京东方科技集团股份有限公司 | Test circuit, array substrate, and display panel |
| US12062305B2 (en) | 2020-01-06 | 2024-08-13 | Hefei Xinsheng Optoelectronics Technology Co., Ltd. | Test circuit, array substrate, and display panel |
-
1989
- 1989-06-16 JP JP15543589A patent/JP2594358B2/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH055897A (en) * | 1991-06-28 | 1993-01-14 | Sharp Corp | Method for checking active matrix substrate |
| KR100671513B1 (en) * | 2000-12-12 | 2007-01-19 | 비오이 하이디스 테크놀로지 주식회사 | Method for detecting short position of liquid crystal display device |
| US6982568B2 (en) | 2003-03-07 | 2006-01-03 | Mitsubishi Denki Kabushiki Kaisha | Image display device having inspection terminal |
| JP2016085269A (en) * | 2014-10-23 | 2016-05-19 | セイコーエプソン株式会社 | Electro-optic substrate, electro-optic device and electronic device |
| CN105261317A (en) * | 2015-09-17 | 2016-01-20 | 京东方科技集团股份有限公司 | Detection method and detection device for short-circuited defect of data wires |
| CN105261317B (en) * | 2015-09-17 | 2018-05-29 | 京东方科技集团股份有限公司 | The undesirable detection method of data cable short circuit and detection device |
| WO2021139658A1 (en) * | 2020-01-06 | 2021-07-15 | 京东方科技集团股份有限公司 | Test circuit, array substrate, and display panel |
| US12062305B2 (en) | 2020-01-06 | 2024-08-13 | Hefei Xinsheng Optoelectronics Technology Co., Ltd. | Test circuit, array substrate, and display panel |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2594358B2 (en) | 1997-03-26 |
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