JPH03167919A - Superconducting logic circuit - Google Patents
Superconducting logic circuitInfo
- Publication number
- JPH03167919A JPH03167919A JP30739989A JP30739989A JPH03167919A JP H03167919 A JPH03167919 A JP H03167919A JP 30739989 A JP30739989 A JP 30739989A JP 30739989 A JP30739989 A JP 30739989A JP H03167919 A JPH03167919 A JP H03167919A
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- qfp
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- exciting
- variable
- circuit
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Links
- 230000004907 flux Effects 0.000 claims abstract description 46
- 230000005284 excitation Effects 0.000 claims description 84
- 230000000737 periodic effect Effects 0.000 abstract description 7
- 230000008878 coupling Effects 0.000 abstract description 4
- 238000010168 coupling process Methods 0.000 abstract description 4
- 238000005859 coupling reaction Methods 0.000 abstract description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 239000006185 dispersion Substances 0.000 abstract 1
- 238000013139 quantization Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 5
- 230000003111 delayed effect Effects 0.000 description 2
- 230000005668 Josephson effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
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Abstract
Description
【発明の詳細な説明】
「産業上の利用分野」
本発明は極低温下で動作する超電導回路に関わり、特に
ジョセフソン素子を使ったパラメトロン型の超電導論理
回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to superconducting circuits that operate at extremely low temperatures, and particularly to parametron type superconducting logic circuits using Josephson elements.
「従来の技術」
ジョセフソン効果を示す超電導素子（以下、ジョセフソ
ン素子と称す）を使ったパラメトロン型のスイッチング
回路である量子磁束パラメトロン回路（Ｑｕａｎｔｕｍ
Ｆｌｕｘ Ｐａｒａｍｅｔｒｏｎ：以下ＱＦＰと略称
する〉は当技術分野ではすでに公知である。"Prior Art" A quantum flux parametron circuit (Quantum Flux Parametron Circuit) is a parametron-type switching circuit using a superconducting element exhibiting the Josephson effect (hereinafter referred to as a Josephson element).
Flux Parametron (hereinafter abbreviated as QFP) is already known in the art.
ＱＦＰは量子化された直流磁束を信号媒体として使う新
しい動作原理に基づくスイッチング回路で、極めて小さ
な消費電力で超高速の動作を行えるため計算機の素子と
しては極めて優れている。また、微弱な磁束を高い利得
で増幅できるため磁東センサの様なアナログ回路として
も極めて優れた特性を持っている。QFP is a switching circuit based on a new operating principle that uses quantized DC magnetic flux as a signal medium, and is extremely excellent as a computer element because it can operate at extremely high speed with extremely low power consumption. Furthermore, since it can amplify weak magnetic flux with high gain, it has extremely excellent characteristics as an analog circuit such as a magnetic east sensor.
このＱＦＰの原理的な回路構成を第１図に示す。FIG. 1 shows the basic circuit configuration of this QFP.
ＱＦＰは第１のジョセフソン素子１と第■の励振インダ
クタ３及び第２のジョセフソン素子２と第２のインダク
タ４からなる回路対を接続して構成された超電導ルーブ
５からなる。超電導ループ５には入力線７及び負荷イン
ダクタ８が直接接続されている。また、超電導ループ５
の近傍には励振線６が配置され、この励振線６は第ｌ、
第２の励振インダタト３、４と磁気的に結合している。The QFP consists of a superconducting loop 5 configured by connecting a circuit pair consisting of a first Josephson element 1 and a second excitation inductor 3, and a second Josephson element 2 and a second inductor 4. An input line 7 and a load inductor 8 are directly connected to the superconducting loop 5. In addition, superconducting loop 5
An excitation line 6 is arranged near the l-th,
It is magnetically coupled to the second excitation inductors 3 and 4.
励振線６には励振電流源９から励振電流が流れることに
よって励振磁東が供給される。以下にこのように構成さ
れたＱＦＰの動作を簡単に磁束を使って説明する。励振
磁東を印加した励振状態では、ＱＦＰから負荷に供給さ
れる出力磁束は、絶対値が同じで向きが正反対の２通り
しかない。ＱＦＰではこの磁束の向きをデジタル信号の
“１”“０”信号を対応させる。動作は以下の様である
。An excitation magnetic field is supplied to the excitation line 6 by an excitation current flowing from an excitation current source 9 . The operation of the QFP configured in this way will be briefly explained below using magnetic flux. In the excitation state in which the excitation magnetic field is applied, there are only two output magnetic fluxes supplied from the QFP to the load: those having the same absolute value and opposite directions. In QFP, the direction of this magnetic flux is made to correspond to the "1" and "0" signals of the digital signal. The operation is as follows.
先ず、励振磁東を印加しない状態で微弱な入力磁束を入
力線７を介して直接超電導ループ５と負荷インダクタ８
に注入する。この後励振線６に励振磁東を供給すると、
超電導ループ５から負荷インダクタ８に入力磁束と同じ
向きの出力磁束が供給され、出力磁束が増幅される。First, a weak input magnetic flux is directly connected to the superconducting loop 5 and the load inductor 8 via the input line 7 without applying an excitation magnetic field.
Inject into. After this, when the excitation magnetic east is supplied to the excitation line 6,
Output magnetic flux in the same direction as the input magnetic flux is supplied from the superconducting loop 5 to the load inductor 8, and the output magnetic flux is amplified.
ＱＦＰを使った論理回路（以下、ＱＦＰ回路と略称する
）では、従来、多数決の論理に基づいて論理演算を行な
う。基本のＱＦＰ多数決論理回路を第２図に示し、それ
について説明する。ＱＦＰ１００ａ，１００ｂと−１
０ ０ ｃは同一の励振信号で励振される。まず、それ
ぞれにｘ１、ｘ２、ｘ３の２値論理信号を入れて励振信
号を印加すると、増幅された磁束は出力線を経て次段の
ＱＦＰ１００ｄに供給される。増幅された磁束は絶対値
は同じで向きは入力信号によって正方向と逆方向とがあ
るが、多数である向きの信号が次段のＱＦＰ１００ｄの
入力になる。ＱＦＰ１００ｄの入力信号を２値論理変数
ｙとすると、ｙはｘ１、ｘ２、ｘ３の多数決関数ｙ＝ｘ
ｌｘ２＋ｘ２ｘ３＋ｘ３ｘｌ．となる。増幅された磁束
が十分に安定した後、ＱＦＰ１００ｄに励振信号を印加
して入力を増幅し、次の段のｑＦｐｒこ２値論理信号を
送る。ＱＦＰ回路ではこの様に同じ段のＱＦＰの間の接
線で論理演算を行なう。また、一つの段から次の段に論
理信号を送るために後段のＱＦＰには遅れた励振信号を
供給することにより複数のＱＦＰに意図しーた順序で論
理動作を行なわせるが、通常、励振信号は周期的に変化
信号を使うので相次ぐ励振信号が位相的に遅れるように
設ける。Logic circuits using QFP (hereinafter abbreviated as QFP circuits) conventionally perform logical operations based on majority logic. A basic QFP majority logic circuit is shown in FIG. 2 and will be described. QFP100a, 100b and -1
0 0 c is excited with the same excitation signal. First, when binary logic signals x1, x2, and x3 are input to each of them and an excitation signal is applied, the amplified magnetic flux is supplied to the next stage QFP 100d via the output line. The amplified magnetic flux has the same absolute value and its direction can be positive or reverse depending on the input signal, but the signals in the majority direction become input to the next stage QFP 100d. When the input signal of QFP100d is a binary logic variable y, y is a majority function of x1, x2, x3 y=x
lx2+x2x3+x3xl. becomes. After the amplified magnetic flux becomes sufficiently stable, an excitation signal is applied to the QFP 100d to amplify the input, and a binary logic signal is sent to the next stage qFpr. In the QFP circuit, logical operations are performed on tangents between QFPs in the same stage in this way. In addition, in order to send a logic signal from one stage to the next, a delayed excitation signal is supplied to the QFPs in the subsequent stage, causing multiple QFPs to perform logic operations in the intended order. Since a periodically changing signal is used, successive excitation signals are provided so as to be delayed in phase.
「発明が解決しようとする問題点」
上述された多数決論理回路では励振信号のばらつき、製
造状態によるばらつき等の原因で前段のＱＦＰの出力が
同じ絶対値を持っていなければ演算結果が間違える恐れ
があり、ＱＦＰの出力磁束のばらつきに対する安定度は
あまりよくない。３入力の場合には前段のＱＦＰの出力
磁束の許されるばらつきは最大３３％しかない。例えば
、３入力の中に二つが同じ方向の磁束でもう一つが逆方
向の磁束の場合、同方向の２個の入力が３３％減って逆
方向の入力が３３％増えるとＱＦＰ１００ｄの入力磁束
は０になって出力信号が“０″になるか“１”になるか
不確定である。このように多数論理演算の安定度は入力
の数が多くなるほど悪くなる。故に、設計幅が狭くなる
。本発明はこの間題点を解決した新しいＱＦＰ論理回路
を提供することにある。"Problem to be Solved by the Invention" In the above-mentioned majority logic circuit, if the outputs of the QFP in the previous stage do not have the same absolute value due to variations in excitation signals, variations due to manufacturing conditions, etc., there is a risk of incorrect calculation results. However, the stability against variations in the output magnetic flux of the QFP is not very good. In the case of three inputs, the maximum variation allowed in the output magnetic flux of the QFP in the previous stage is only 33%. For example, if two of the three inputs have magnetic flux in the same direction and the other has magnetic flux in the opposite direction, if the two inputs in the same direction decrease by 33% and the input in the opposite direction increases by 33%, the input magnetic flux of QFP100d will be 0, and it is uncertain whether the output signal will become "0" or "1". In this way, the stability of multiple logic operations worsens as the number of inputs increases. Therefore, the design width becomes narrow. The object of the present invention is to provide a new QFP logic circuit that solves this problem.
「問題点を解決するための手段」
この目的を達成するために、本発明ではＱＦＰを２種類
：周期励振ＱＦＰと可変励振ＱＦＰに分けて使用する手
段を特長とするＱＦＰ論理回路を提供する。周期励振Ｑ
ＦＰとは従来のＱＦＰと同じように周期的に変化する励
振磁束（以下、クロック信号と称す）を外部から供給し
て励振するＱＦＰであって、但し、２値磁束を増幅する
だけに使用する。可変励振ＱＦＰとは前段のＱＦＰの出
力磁束で励振するという新しい励振方法を特長とするＱ
ＦＰであって、２値論理演算に使用する。"Means for Solving the Problem" In order to achieve this object, the present invention provides a QFP logic circuit characterized by means for using QFPs divided into two types: periodic excitation QFPs and variable excitation QFPs. Periodic excitation Q
FP is a QFP that excites by supplying periodically changing excitation magnetic flux (hereinafter referred to as a clock signal) from the outside like a conventional QFP, but it is used only to amplify binary magnetic flux. . Variable excitation QFP is a QFP that features a new excitation method in which it is excited by the output magnetic flux of the QFP in the previous stage.
It is an FP and is used for binary logic operations.
「実施例」
周期励振ＱＦＰの回路構成と操作は従来のＱＦＰと同じ
で既に述べられたので可変励振ＱＦＰについて詳しく説
明する。"Embodiment" Since the circuit configuration and operation of the periodic excitation QFP are the same as those of the conventional QFP and have already been described, the variable excitation QFP will be explained in detail.
第３図に示すように可変励振ＱＦＰは回路の構成は励振
の部分を除いて従来のＱＦＰと同じである。励振回路は
励振線６と２個の励振人カインダクタ１０、１１が直列
に接続されて構成したルーブ■４からなる。各々の励振
入力インダクタの近傍には入力線１２、１３が配置され
、対応する励振入力インダクタと磁気的に結合されてい
る。この二つの磁気結合の向きによって励振入力磁束の
和或は差が励振磁東として可変励振ＱＦＰに供給される
。まず、和の場合について説明する。直接入力信号をＸ
、励振入力信号をｓ， ｔとし、出力信号を２とする
と、２は３入力ｘ， ｓとｔの論理関数ｚ＝ｘ ｓ
ｔ＋ｘ ｓ’ｔ’ になる。但し、ｓ’とｔ′はＳとｔ
の逆信号であって、また、二つの励振入力線と励振人カ
インダクタとの磁気結合が同方向の場合であるとする。As shown in FIG. 3, the circuit configuration of the variable excitation QFP is the same as the conventional QFP except for the excitation part. The excitation circuit consists of an excitation line 6 and two excitation inductors 10 and 11 connected in series. Input lines 12 and 13 are arranged near each excitation input inductor and are magnetically coupled to the corresponding excitation input inductor. Depending on the direction of these two magnetic couplings, the sum or difference of the excitation input magnetic fluxes is supplied to the variable excitation QFP as an excitation magnetic east. First, the case of sum will be explained. Direct input signal
, the excitation input signals are s, t, and the output signal is 2, then 2 is the logical function of 3 inputs x, s and t, z=x s
It becomes t+x s't'. However, s' and t' are S and t
It is assumed that the magnetic coupling between the two excitation input lines and the excitation inductor is in the same direction.
Ｓとｔとが等しければ可変励振ＱＦＰに励振磁東が供給
され、入力信号Ｘは増幅されて出力される。等しくなけ
ればＳとｔがお互いに消し会うので、可変励振ＱＦＰは
励振磁東が０で励振されない。この時、可変励振ＱＦＰ
の出力磁束はほとんど０に近いかないとみなす。If S and t are equal, the excitation magnetic field is supplied to the variable excitation QFP, and the input signal X is amplified and output. If they are not equal, S and t cancel each other out, so the variable excitation QFP has an excitation magnetic east of 0 and is not excited. At this time, variable excitation QFP
It is assumed that the output magnetic flux of is almost close to zero.
励振入力磁束の差が励振磁東になる場合は、出力信号２
は３入力論理関数ｚ＝ｘｓ’ｔ＋ｘｓｔ’になって、可
変励振ＱＦＰはＳとｔとが等しいときに励振されず、ｓ
（！：ｔとが等しくなければ励振されるように操作する
。この様に２種類の可変励振ＱＦＰがある。If the difference in the excitation input magnetic flux becomes the excitation magnetic east, the output signal 2
becomes a three-input logic function z=xs't+xst', and the variable excitation QFP is not excited when S and t are equal, and s
(!: If t and t are not equal, it is operated so that it is excited. In this way, there are two types of variable excitation QFPs.
可変励振ＱＦＰは励振されない場合には出力がないので
単独で論理演算素子として使えない。２種類の可変励振
ＱＦＰを組み合わせると非常に便利な論理演算回路が出
来る。第４図に本発明が提供するＱＦＰ論理回路の基本
論理演算回路を表わす。回路を大きく分けると２つの可
変励振ＱＦＰと１つの周期励振ＱＦＰから出来ることが
わかる。Since the variable excitation QFP has no output when not excited, it cannot be used alone as a logical operation element. Combining two types of variable excitation QFPs creates a very convenient logic operation circuit. FIG. 4 shows the basic logic operation circuit of the QFP logic circuit provided by the present invention. Broadly dividing the circuit, it can be seen that it is made up of two variable excitation QFPs and one periodic excitation QFP.
可変励振ＱＦＰには同じ励振入力信号が二つ入れられる
が、一方の可変励振ＱＦＰは励振入力信号の和で、もう
一方の可変励振ＱＦＰは励振入力信号の差で励振される
ように励振入力線と励振入力インダクタとの磁気結合の
向きを設ける。可変励振ＱＦＰ２００ａは論理関数ｚ
１ ＝ｘｓｔ ＋ｘｓ’ｔ’を出力し、可変励振ＱＦＰ
２００ｂは論理関数ｚ ２ ＝ｙｓ’ ｔ ＋ｙ ｓｔ
’を出力する。同時に２つの可変励振ＱＦＰの中のどち
らか１つしか励振されないので、２つの可変励振ＱＦＰ
の出力線を直列に繋ぎ直接に周期励振ＱＦＰＩＯＯの入
力線に繋ぐことによって２１と２２との○Ｒ論理関数が
えられる。ＱＦＰＩＯＯは出力が十分取られるために可
変励振ＱＦＰの出力を増幅する。ここではこの基本論理
演算回路をＤゲートと称す。Ｄゲートの出力は４変数の
関数Ｄ （ｘ， ｙ， ｓ， ｔ）となるが、論理回路
設計に必要なＡＮＤと○Ｒは下で示すように入力信号を
適当に取ればできる。Two of the same excitation input signals are input to the variable excitation QFP, but the excitation input lines are connected so that one variable excitation QFP is excited by the sum of the excitation input signals, and the other variable excitation QFP is excited by the difference between the excitation input signals. The direction of magnetic coupling between the input inductor and the excitation input inductor is determined. Variable excitation QFP200a has logic function z
1 =xst +xs't' output, variable excitation QFP
200b is a logical function z 2 =ys' t +y st
' is output. Since only one of the two variable excitation QFPs is excited at the same time, the two variable excitation QFPs
By connecting the output lines of QFPIOO in series and directly connecting them to the input line of the periodic excitation QFPIOO, the ○R logic functions of 21 and 22 can be obtained. The QFPIOO amplifies the output of the variable excitation QFP in order to obtain a sufficient output. Here, this basic logic operation circuit is referred to as a D gate. The output of the D gate is a four-variable function D (x, y, s, t), but the AND and ○R necessary for logic circuit design can be done by appropriately selecting the input signals as shown below.
ＡＮＤ （ｘ． ｙ） ＝Ｄ （ｘ， ”０”，ｘ．
ｙ）○Ｒ （ｘ， ｙ） ＝Ｄ （ｘ， ”１”．ｘ
， ｙ）また、算術演算に必要な３入力Ｍａｊｏｒｉ
ｔｙ演算及び３入力ｐａｒｉｔｙ演算も次式に示される
ように１つのＤゲートでできるので非常に有力な論理回
路であることが分かる。AND (x. y) = D (x, “0”, x.
y)○R (x, y) =D (x, “1”.x
, y) Also, the 3-input Majori required for arithmetic operations
It can be seen that the ty operation and the 3-input parity operation can be performed with one D gate as shown in the following equation, so it is a very powerful logic circuit.
Ｍ （ｘ，ｙ，ｚ）＝Ｄ （ｘ，ｙ，ｘ，ｚ）Ｐ （ｘ
， ｙ， ｚ） ＝Ｄ （ｘ， ｘ’， ｙ，
ｚ）「発明の効果」
本発明によって、励振信号、製作状態のばらつきにたい
して安定度の優れたＱＦＰ論理回路が実現できるので高
度の集積化することが可能となる。M (x, y, z)=D (x, y, x, z)P (x
, y, z) = D (x, x', y,
z) "Effects of the Invention" According to the present invention, it is possible to realize a QFP logic circuit with excellent stability against variations in excitation signals and manufacturing conditions, thus making it possible to achieve a high degree of integration.
また、Ｄゲートという非常に有力な論理演算回路が出来
ることによって回路設計が簡単にできる。In addition, circuit design can be simplified by creating a very powerful logic operation circuit called a D gate.
第１図は従来のＱＦＰの回路構戒図、第２図は従来のＱ
ＦＰで構成した多数決論理回路構成図、第３図は本発明
で提供する可変励振ＱＦＰの実施回路構成図、第４図は
本発明で提供する基本論理演算回路の実施回路構戒図で
ある。
１、２・・・・ジョセフソン素子
３、４・・・・励振インダクタ
５・・・・超電導ループ
６・・・・励振線
７・・・・入力線
８・・・・負荷インダクタ
９・・・・励振電流源
１ ０、１ １・・・・励振入力インダクタ１ ２、１
３・・・・励振入力線
１４・・・・励振回路ループ
１００・・・・周期励振ＱＦＰ
２
０
０・・・・可変励振ＱＦＰ
第１図
第３図Figure 1 is a circuit diagram of a conventional QFP, Figure 2 is a diagram of a conventional QFP.
FIG. 3 is a block diagram of a majority logic circuit configured with FPs, FIG. 3 is a block diagram of an implementation circuit of a variable excitation QFP provided by the present invention, and FIG. 4 is a block diagram of an implementation circuit of a basic logic operation circuit provided by the present invention. 1, 2...Josephson element 3, 4...Excitation inductor 5...Superconducting loop 6...Excitation line 7...Input line 8...Load inductor 9... ...Excitation current source 1 0, 1 1...Excitation input inductor 1 2, 1
3...Excitation input line 14...Excitation circuit loop 100...Periodic excitation QFP 2 0 0...Variable excitation QFP Fig. 1 Fig. 3
Claims (3)
及び第２のジョセフソン素子と第２の励振インダクタか
らなる回路対を接続して構成された超電導ループ、この
超電導ループに接続された入力線及び負荷インダクタ、
及び前記第１及び第２の励振インダクタと磁気的に結合
する励振線から成る量子磁束パラメトロン回路として、
周期的に変化する磁束で励振され、２値磁束の増幅に使
用される周期励振量子磁束パラメトロン回路と、量子磁
束パラメトロンの出力信号磁束によって励振され、２値
磁束に対する論理演算操作に使用される可変励振量子磁
束パラメトロン回路とを用いて構成される超電導論理回
路。(1) A superconducting loop configured by connecting a circuit pair consisting of a first Josephson element and a first excitation inductor, and a second Josephson element and a second excitation inductor, and an input connected to this superconducting loop. line and load inductors,
and a quantum magnetic flux parametron circuit comprising an excitation line magnetically coupled to the first and second excitation inductors,
A periodically excitation quantum flux parametron circuit excited by periodically changing magnetic flux and used to amplify binary magnetic flux, and a variable excited by the output signal magnetic flux of the quantum flux parametron and used for logic operation on binary magnetic flux. A superconducting logic circuit constructed using an excited quantum flux parametron circuit.
に異なる量子磁束パラメトロン回路の出力信号磁束の和
又は差によって励振されることを特徴とする請求項１記
載の超電導論理回路。(2) The superconducting logic circuit according to claim 1, wherein the variable excitation quantum flux parametron circuit is excited by the sum or difference of output signal fluxes of mutually different quantum flux parametron circuits.
用いられ、一方が互いに異なる量子磁束パラメトロン回
路の出力磁束の和、他方が前記互いに異なる量子磁束パ
ラメトロン回路の出力信号磁束の差によって励振され、
前記可変励振両磁束パラメトロン回路の各出力信号の和
が次段の量子磁束パラメトロン回路の入力磁束として用
いられることを特徴とする請求項１記載の超電導論理回
路。(3) the two variable excitation quantum flux parametron circuits are used, one of which is excited by the sum of the output magnetic fluxes of the different quantum flux parametron circuits, and the other excited by the difference in the output signal magnetic flux of the different quantum flux parametron circuits;
2. The superconducting logic circuit according to claim 1, wherein the sum of the output signals of both said variable excitation magnetic flux parametron circuits is used as the input magnetic flux of the next-stage quantum magnetic flux parametron circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30739989A JP2802446B2 (en) | 1989-11-27 | 1989-11-27 | Superconducting logic circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30739989A JP2802446B2 (en) | 1989-11-27 | 1989-11-27 | Superconducting logic circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03167919A true JPH03167919A (en) | 1991-07-19 |
| JP2802446B2 JP2802446B2 (en) | 1998-09-24 |
Family
ID=17968585
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30739989A Expired - Fee Related JP2802446B2 (en) | 1989-11-27 | 1989-11-27 | Superconducting logic circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2802446B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2020536440A (en) * | 2017-11-13 | 2020-12-10 | ノースロップ グラマン システムズ コーポレイションＮｏｒｔｈｒｏｐ Ｇｒｕｍｍａｎ Ｓｙｓｔｅｍｓ Ｃｏｒｐｏｒａｔｉｏｎ | Inverted phase mode logic gate |
| JP2020536436A (en) * | 2017-11-13 | 2020-12-10 | ノースロップ グラマン システムズ コーポレイションＮｏｒｔｈｒｏｐ Ｇｒｕｍｍａｎ Ｓｙｓｔｅｍｓ Ｃｏｒｐｏｒａｔｉｏｎ | Large-scale fan-in RQL gate |
| US11010686B2 (en) | 2015-02-06 | 2021-05-18 | Northrop Grumman Systems Corporation | Flux control of qubit under resonant excitation |
| JP2021513236A (en) * | 2018-02-01 | 2021-05-20 | ノースロップ グラマン システムズ コーポレーション | RQL majority gate, AND gate, and OR gate |
| US11159168B2 (en) | 2018-07-31 | 2021-10-26 | Northrop Grumman Systems Corporation | Superconducting non-destructive readout circuits |
| US11201608B2 (en) | 2020-04-24 | 2021-12-14 | Northrop Grumman Systems Corporation | Superconducting latch system |
-
1989
- 1989-11-27 JP JP30739989A patent/JP2802446B2/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11010686B2 (en) | 2015-02-06 | 2021-05-18 | Northrop Grumman Systems Corporation | Flux control of qubit under resonant excitation |
| JP2020536440A (en) * | 2017-11-13 | 2020-12-10 | ノースロップ グラマン システムズ コーポレイションＮｏｒｔｈｒｏｐ Ｇｒｕｍｍａｎ Ｓｙｓｔｅｍｓ Ｃｏｒｐｏｒａｔｉｏｎ | Inverted phase mode logic gate |
| JP2020536436A (en) * | 2017-11-13 | 2020-12-10 | ノースロップ グラマン システムズ コーポレイションＮｏｒｔｈｒｏｐ Ｇｒｕｍｍａｎ Ｓｙｓｔｅｍｓ Ｃｏｒｐｏｒａｔｉｏｎ | Large-scale fan-in RQL gate |
| JP2021513236A (en) * | 2018-02-01 | 2021-05-20 | ノースロップ グラマン システムズ コーポレーション | RQL majority gate, AND gate, and OR gate |
| US11159168B2 (en) | 2018-07-31 | 2021-10-26 | Northrop Grumman Systems Corporation | Superconducting non-destructive readout circuits |
| US11201608B2 (en) | 2020-04-24 | 2021-12-14 | Northrop Grumman Systems Corporation | Superconducting latch system |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2802446B2 (en) | 1998-09-24 |
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