JPH03151637A - Manufacture of semiconductor device and plasma cvd equipment - Google Patents

Manufacture of semiconductor device and plasma cvd equipment

Info

Publication number
JPH03151637A
JPH03151637A JP28995789A JP28995789A JPH03151637A JP H03151637 A JPH03151637 A JP H03151637A JP 28995789 A JP28995789 A JP 28995789A JP 28995789 A JP28995789 A JP 28995789A JP H03151637 A JPH03151637 A JP H03151637A
Authority
JP
Japan
Prior art keywords
stress
substrate
semiconductor substrate
plasma cvd
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28995789A
Other languages
Japanese (ja)
Inventor
Isao Serita
芹田 功
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KOWA KURIEITAA KK
Original Assignee
KOWA KURIEITAA KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KOWA KURIEITAA KK filed Critical KOWA KURIEITAA KK
Priority to JP28995789A priority Critical patent/JPH03151637A/en
Publication of JPH03151637A publication Critical patent/JPH03151637A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32137Radio frequency generated discharge controlling of the discharge by modulation of energy
    • H01J37/32155Frequency modulation
    • H01J37/32165Plural frequencies

Abstract

PURPOSE:To simply prevent the warping of a semiconductor substrate, the disconnection and contact of wiring, and obtain a uniform substrate free from strain, by supplying discharge frequency electric power of different frequencies, forming thin films with different stress directions on a semiconductor substrate, and controlling the total stress by alternately stacking the thin films. CONSTITUTION:By using plasma CVD method and changing discharge frequencies of high frequency power supplies 7, 8, thin films with different stress directions are formed on a semiconductor substrate 10. A thin film 12 generating compression stress and a thin film 11 generating tensile stress are alternately stacked, thereby controlling stress. When compression stress is generated, the substrate is bent so as to protrude outside. When tensile stress is generated, the substrate is bent so as to protrude inside. Hence, by combining both of the films, the stresses are cancelled, and the semiconductor substrate can be so controlled that external force is not applied. Thereby the generation of warp of the substrate, the disconnection of wiring on the substrate, and the mutual contact of wires can be prevented.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、半導体装置の製造方法及びプラズマCVD装
置に関し、特に半導体基板上の配線表面に形成する絶縁
膜、保護膜等の薄膜を形成する方法及び装置に関する。
Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a method for manufacturing a semiconductor device and a plasma CVD apparatus, and particularly to a method for forming a thin film such as an insulating film or a protective film on the surface of a wiring on a semiconductor substrate. METHODS AND APPARATUS.

(従来の技術) 半導体基板上に薄膜を形成するため各種のCVD法が用
いられているが、その内でプラズマCVD法により形成
される薄膜(窒化珪素膜)は、般に大きなストレスを有
することが知られている。
(Prior Art) Various CVD methods are used to form thin films on semiconductor substrates, but thin films (silicon nitride films) formed by plasma CVD methods generally have large stress. It has been known.

このために該基板にそりが生じたり、基板上の配線が断
線したり、線どうしが接触したりすることがある。
For this reason, the substrate may warp, the wiring on the substrate may be disconnected, or the lines may come into contact with each other.

このような問題を解決するために、基板上に異なる種類
のCVD法によってそれぞれ圧縮応力を有する窒化珪素
膜と、引張応力を有する窒化珪素膜を形成しこれらを交
互に重ねる方法が提案されている。
In order to solve these problems, a method has been proposed in which a silicon nitride film with compressive stress and a silicon nitride film with tensile stress are formed on a substrate by different types of CVD methods, and these are alternately stacked. .

従来の方法は、CVD法が全く異なると、形成される薄
膜のストレス方向が異なることに着目したものであるた
め複数の違った種類のCVD装置を用意し、これを組み
合わせて使用するので、装置が複雑化し、保守、操作の
面等においても不便であり、また不経済でもあった。
The conventional method focuses on the fact that the stress direction of the formed thin film is different when the CVD method is completely different, so multiple different types of CVD equipment are prepared and used in combination, so the equipment The system has become complicated, inconvenient in terms of maintenance and operation, and also uneconomical.

(発明が解決しようとする課題) 本発明の目的は、これらの問題点を解決し、異なる種類
のCVD法によらないでストレス方向を制御した良好な
半導体装置を提供することである。
(Problems to be Solved by the Invention) An object of the present invention is to solve these problems and provide a good semiconductor device in which the stress direction is controlled without using different types of CVD methods.

また本発明の目的は、簡便な方法でストレス方向を制御
できるようにしたプラズマCVD装置を提供することで
ある。
Another object of the present invention is to provide a plasma CVD apparatus in which the direction of stress can be controlled in a simple manner.

(課題を解決するための手段) 本発明によれば、上記目的は、プラズマCVD法により
その放電周波数を変えることによってストレス方向の異
なる薄膜を形成し圧縮応力を生じる薄膜と引張応力を生
じる薄膜を交互に重ねストレスを制御するようにした半
導体装置の製造法により達成される。
(Means for Solving the Problems) According to the present invention, the above object is achieved by forming thin films with different stress directions by changing the discharge frequency using a plasma CVD method, and forming a thin film that produces compressive stress and a thin film that produces tensile stress. This is achieved by a method of manufacturing a semiconductor device in which stress is controlled by alternating layers.

(作用) プラズマCVD法により半導体基板上に引張応力を有す
る薄膜と圧縮応力を有する薄膜を重ねて形成する。該薄
膜はその何れを上下に形成してもよく、又これらの各薄
膜を複数の層に重ねて設けてもよい。なお、該薄膜は相
互の応力の大きさに応じて適当な厚さに形成される。
(Function) A thin film having tensile stress and a thin film having compressive stress are stacked and formed on a semiconductor substrate by a plasma CVD method. The thin films may be formed one above the other, or each of these thin films may be provided in a plurality of layers. Note that the thin film is formed to have an appropriate thickness depending on the magnitude of mutual stress.

上記薄膜は放電周波電力を変換できるようにしたプラズ
マCVD装置により形成したり、放電周波電力の異なる
プラズマCVD装置を用いることにより形成したりする
The thin film described above is formed using a plasma CVD apparatus capable of converting discharge frequency power, or by using a plasma CVD apparatus having different discharge frequency powers.

(実施例) 半導体基板上にプラズマCVD装置を用いてシリコン窒
化膜の薄膜を形成する場合、該装置の放電周波数の大き
さが相違すると引張応力が発生したり、圧縮応力が発生
したりすることが判った。
(Example) When forming a thin silicon nitride film on a semiconductor substrate using a plasma CVD device, tensile stress or compressive stress may occur if the discharge frequencies of the device are different. It turns out.

そしてこのような薄膜の応力の変化は放電周波数をほぼ
IMHz以下にすると圧縮応力が発生し、またほぼ10
MHz以上にすると引張応力が発生する傾向にあり、こ
の圧縮応力が生じたとき基板は外方に凸に湾曲され、引
張応力の場合は内方に凸に湾曲される。
In addition, when the discharge frequency is lowered to approximately IMHz or less, compressive stress occurs, and when the stress of the thin film changes to approximately 10
When the frequency is higher than MHz, tensile stress tends to occur, and when this compressive stress occurs, the substrate is curved outward in a convex manner, and in the case of tensile stress, the substrate is curved inward in a convex manner.

そこで引張応力が生じる薄膜と圧縮応力が生じる薄膜を
組み合わせることにより、それらの応力を相殺し上記半
導体基板に外力が作用しないように制御することができ
る。
Therefore, by combining a thin film that generates tensile stress and a thin film that generates compressive stress, it is possible to cancel out these stresses and control so that no external force acts on the semiconductor substrate.

第1図はプラズマCVD装置を示し、該装置は反応器1
、上部電極2、下部電極3、反応ガス導入部4、排気口
5、ヒータ6を備えている。該装置の画電極には、異な
る放電周波電力が供給できるよに構成されており、図示
のものでは200に七の高周波電源7と13.56MH
zの高周波電源8を設け、これらを並列に接続し、スイ
ッチ9によって切り換えるようにしであるが、1つの高
周波電源を可変するようにしてもよい。
FIG. 1 shows a plasma CVD apparatus, which includes a reactor 1
, an upper electrode 2, a lower electrode 3, a reactive gas introduction section 4, an exhaust port 5, and a heater 6. The picture electrodes of the device are configured to be able to supply different discharge frequency powers;
z high frequency power sources 8 are provided, connected in parallel, and switched by a switch 9, but one high frequency power source may be made variable.

上記下部電極3上に半導体基板10を載置し、該基板面
に一方の13.56MHzの高周波電力を印加し窒化珪
素膜11 (HP−8iN)を形成する。これによって
得られた薄膜は引張応力を有する。次いで上記スイッチ
9によって電源を切り換え、他方の200KHzの高周
波電力を印加してその薄膜の上に窒化珪素膜12 (L
P−3iN)を形成する(第2図)。
A semiconductor substrate 10 is placed on the lower electrode 3, and a high frequency power of 13.56 MHz is applied to one side of the substrate to form a silicon nitride film 11 (HP-8iN). The thin film obtained thereby has tensile stress. Next, the power supply is switched by the switch 9, and the other 200 KHz high frequency power is applied to form a silicon nitride film 12 (L) on the thin film.
P-3iN) is formed (Fig. 2).

第3図は上記窒化珪素膜11.12を重ねた全体の応力
状態が判るようにこれらの薄膜の厚さと線膜の応力の関
係を示したもので、この場合該窒化珪素膜12の厚さを
500人と一定にし、窒化− 珪素膜11の厚さを変化させた場合の薄膜の応力状態を
示している。これによると、窒化珪素膜12だけの場合
、圧縮応力は約10.5X108dyne/cm”であ
るが、上記窒化珪素膜11の厚さが2500人になった
ときに両室化珪素膜の応力が相殺し全体の応力がOにな
ることが判る。第4図のものは、半導体基板上に配線1
3を施し、該配線上に上記窒化珪素膜11を形成しその
上に窒化珪素膜12を形成した場合で、該薄膜による配
線の断線、接触等を防いでいる。
FIG. 3 shows the relationship between the thickness of these thin films and the stress of the line film so that the stress state of the entire layer of the silicon nitride films 11 and 12 can be seen. In this case, the thickness of the silicon nitride film 12 The graph shows the stress state of the thin film when the thickness of the silicon nitride film 11 is varied while keeping the number of people constant at 500 people. According to this, in the case of only the silicon nitride film 12, the compressive stress is about 10.5 x 108 dyne/cm'', but when the thickness of the silicon nitride film 11 becomes 2500 mm, the stress of the bichamber silicon film increases. It can be seen that the total stress due to cancellation becomes O.The one in Figure 4 shows the wiring 1 on the semiconductor substrate
3, the silicon nitride film 11 is formed on the wiring, and the silicon nitride film 12 is formed thereon, and the thin film prevents disconnection, contact, etc. of the wiring.

なお、上記窒化珪素膜11,12の組合せは、複数組積
層することもできる。
Note that a plurality of combinations of the silicon nitride films 11 and 12 may be stacked.

(発明の効果) 本発明は、上記構成により基板上に形成される薄膜をプ
ラズマCVDの放電周波数を変えることにより制御でき
るようにしたので、半導体基板のそりや配線の断線、接
触等を簡便に防止し、歪みのない均一の基板が得られる
とともに、その歩留、信頼性を向上し、かつ効率よく経
済的に得ることができる。
(Effects of the Invention) The present invention makes it possible to control the thin film formed on the substrate by changing the discharge frequency of plasma CVD with the above configuration, so warpage of the semiconductor substrate, disconnection of wiring, contact, etc. can be easily prevented. A uniform substrate without distortion can be obtained, the yield and reliability can be improved, and it can be obtained efficiently and economically.

 6 − 6 -

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本発明の実施例を示し、第1図は概略図、第2図
は半導体基板上に薄膜を形成した状態を示す一部拡大断
面図、第3図は薄膜に作用する応力と薄膜の厚さの関係
を示すグラフ、第4図は半導体基板の配線上に薄膜を形
成した状態を示す一部拡大断面図である。 2.3:電極  7,8:高周波電源  9:スイッチ
  10:半導体基板  11,12:窒化珪素膜  
13:配線  7 − N  = 手 続 補 正 書 平成1年12月5日
The drawings show embodiments of the present invention; FIG. 1 is a schematic diagram, FIG. 2 is a partially enlarged cross-sectional view showing a state in which a thin film is formed on a semiconductor substrate, and FIG. 3 shows stress acting on the thin film and FIG. 4 is a graph showing the relationship between thicknesses, and is a partially enlarged cross-sectional view showing a state in which a thin film is formed on wiring of a semiconductor substrate. 2.3: Electrode 7, 8: High frequency power supply 9: Switch 10: Semiconductor substrate 11, 12: Silicon nitride film
13: Wiring 7 - N = Procedural amendment December 5, 1999

Claims (1)

【特許請求の範囲】 1、プラズマCVD法によって周波数の異なる放電周波
電力を供給し半導体基板上にストレス方向の異なる薄膜
を形成し該薄膜を交互に重ねて全体のストレスを制御す
るようにしたことを特徴とする半導体装置の製造方法。 2、半導体基板上に引張応力と圧縮応力をそれぞれ生じ
させるべく反応器電極に異なる放電周波電力を供給する
手段を備えたことを特徴とするプラズマCVD装置。
[Claims] 1. Thin films with different stress directions are formed on a semiconductor substrate by supplying discharge frequency power with different frequencies using a plasma CVD method, and the thin films are alternately stacked to control the overall stress. A method for manufacturing a semiconductor device, characterized by: 2. A plasma CVD apparatus characterized by comprising means for supplying different discharge frequency powers to reactor electrodes to generate tensile stress and compressive stress on a semiconductor substrate, respectively.
JP28995789A 1989-11-09 1989-11-09 Manufacture of semiconductor device and plasma cvd equipment Pending JPH03151637A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28995789A JPH03151637A (en) 1989-11-09 1989-11-09 Manufacture of semiconductor device and plasma cvd equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28995789A JPH03151637A (en) 1989-11-09 1989-11-09 Manufacture of semiconductor device and plasma cvd equipment

Publications (1)

Publication Number Publication Date
JPH03151637A true JPH03151637A (en) 1991-06-27

Family

ID=17749925

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28995789A Pending JPH03151637A (en) 1989-11-09 1989-11-09 Manufacture of semiconductor device and plasma cvd equipment

Country Status (1)

Country Link
JP (1) JPH03151637A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07183224A (en) * 1993-11-15 1995-07-21 Applied Materials Inc Formation of thin film
EP0851480A3 (en) * 1996-12-25 1998-07-29 Canon Sales Co., Inc. Stress-adjusted insulating film forming method, semiconductor device and method of manufacturing the same
WO2013021705A1 (en) * 2011-08-11 2013-02-14 Sppテクノロジーズ株式会社 Apparatus, method and program for manufacturing nitride film
US9401183B2 (en) 1997-04-04 2016-07-26 Glenn J. Leedy Stacked integrated memory device
KR20200111244A (en) * 2018-06-18 2020-09-28 레이던 컴퍼니 Semiconductor device with anti-warp layer

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS621223A (en) * 1985-06-26 1987-01-07 Fujitsu Ltd Forming method for amorphous film
JPS63132433A (en) * 1986-11-21 1988-06-04 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS621223A (en) * 1985-06-26 1987-01-07 Fujitsu Ltd Forming method for amorphous film
JPS63132433A (en) * 1986-11-21 1988-06-04 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07183224A (en) * 1993-11-15 1995-07-21 Applied Materials Inc Formation of thin film
EP0851480A3 (en) * 1996-12-25 1998-07-29 Canon Sales Co., Inc. Stress-adjusted insulating film forming method, semiconductor device and method of manufacturing the same
KR100287930B1 (en) * 1996-12-25 2001-06-01 다케모토 히데하루 Method of forming stress-regulated insulating film, semiconductor device and manufacturing method thereof
US9401183B2 (en) 1997-04-04 2016-07-26 Glenn J. Leedy Stacked integrated memory device
WO2013021705A1 (en) * 2011-08-11 2013-02-14 Sppテクノロジーズ株式会社 Apparatus, method and program for manufacturing nitride film
JP2013038354A (en) * 2011-08-11 2013-02-21 Spp Technologies Co Ltd Nitride film manufacturing device, nitride film manufacturing method, and nitride film manufacturing program
KR20140050078A (en) * 2011-08-11 2014-04-28 에스피피 테크놀로지스 컴퍼니 리미티드 Apparatus, method and program for manufacturing nitride film
US9117660B2 (en) 2011-08-11 2015-08-25 Spp Technologies Co., Ltd. Apparatus, method and program for manufacturing nitride film
KR20200111244A (en) * 2018-06-18 2020-09-28 레이던 컴퍼니 Semiconductor device with anti-warp layer
JP2021526318A (en) * 2018-06-18 2021-09-30 レイセオン カンパニー Semiconductor device with anti-deflection layer

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