JPH03142883A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPH03142883A JPH03142883A JP28131589A JP28131589A JPH03142883A JP H03142883 A JPH03142883 A JP H03142883A JP 28131589 A JP28131589 A JP 28131589A JP 28131589 A JP28131589 A JP 28131589A JP H03142883 A JPH03142883 A JP H03142883A
- Authority
- JP
- Japan
- Prior art keywords
- film
- conductive layer
- layer
- amorphous
- aluminum
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 41
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000000758 substrate Substances 0.000 claims abstract description 38
- 229910000808 amorphous metal alloy Inorganic materials 0.000 claims abstract description 36
- 238000000034 method Methods 0.000 claims abstract description 26
- 238000009792 diffusion process Methods 0.000 claims abstract description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 60
- 229910052757 nitrogen Inorganic materials 0.000 claims description 29
- 230000005611 electricity Effects 0.000 claims 1
- 230000004888 barrier function Effects 0.000 abstract description 31
- 229910052782 aluminium Inorganic materials 0.000 abstract description 28
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 28
- 229910052710 silicon Inorganic materials 0.000 abstract description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 15
- 239000010703 silicon Substances 0.000 abstract description 15
- 238000005324 grain boundary diffusion Methods 0.000 abstract description 12
- 238000004544 sputter deposition Methods 0.000 abstract description 11
- 239000010936 titanium Substances 0.000 abstract description 11
- 238000010438 heat treatment Methods 0.000 abstract description 9
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 abstract description 8
- 229910011208 Ti—N Inorganic materials 0.000 abstract description 8
- 229910052719 titanium Inorganic materials 0.000 abstract description 8
- 230000008569 process Effects 0.000 abstract description 7
- 239000013078 crystal Substances 0.000 abstract description 5
- 238000005530 etching Methods 0.000 abstract description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 abstract description 4
- 238000005546 reactive sputtering Methods 0.000 abstract description 4
- 229910001069 Ti alloy Inorganic materials 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 230000002349 favourable effect Effects 0.000 abstract 1
- 238000009413 insulation Methods 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 abstract 1
- 238000007254 oxidation reaction Methods 0.000 abstract 1
- 239000010408 film Substances 0.000 description 76
- 238000001312 dry etching Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 150000004767 nitrides Chemical class 0.000 description 6
- 239000007789 gas Substances 0.000 description 5
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 239000000460 chlorine Substances 0.000 description 4
- 229910052801 chlorine Inorganic materials 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- DDTIGTPWGISMKL-UHFFFAOYSA-N molybdenum nickel Chemical compound [Ni].[Mo] DDTIGTPWGISMKL-UHFFFAOYSA-N 0.000 description 4
- FEBJSGQWYJIENF-UHFFFAOYSA-N nickel niobium Chemical compound [Ni].[Nb] FEBJSGQWYJIENF-UHFFFAOYSA-N 0.000 description 4
- 229910052723 transition metal Inorganic materials 0.000 description 4
- 150000003624 transition metals Chemical class 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 238000002441 X-ray diffraction Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- -1 0 or more Chemical compound 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910001295 No alloy Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 description 1
- PWKWDCOTNGQLID-UHFFFAOYSA-N [N].[Ar] Chemical compound [N].[Ar] PWKWDCOTNGQLID-UHFFFAOYSA-N 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 150000001805 chlorine compounds Chemical class 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000002003 electron diffraction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 239000010955 niobium Substances 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 230000009257 reactivity Effects 0.000 description 1
- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Landscapes
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
半導体集積回路装置において半導体基板とコンタクトを
有するアルミニウム配線を形成する際、シリコンとアル
電ニウムの反応を防止するためのバリアー層の形成方法
に関し、バリアー層の粒界拡散を防止することにより基
板とアルミニウム配線とのコンタクトを良好に維持する
半導体装置の製造方法を提供することを目的とし、半導
体基板と電気的に接続する導電層を備えた半導体装置に
おいて、該半導体基板と該導電層との間に該半導体基板
と該導電層の相互拡散を抑えかつ導電性を有する非晶質
膜を具備してなることを特徴とするように構成するか、
または前記非晶質膜が窒素を含んだ非晶質合金膜である
ことを特徴とするように構成するか、または半導体基板
と電気的に接続する導電層を備えた半導体装置において
半導体基板上に該半導体基板と該導ｔＮ間の相互拡散を
抑えかつ導電性を有する非晶質膜を形成する工程と該非
晶質膜上に該導電層を形成する工程とを含むように構成
する。[Detailed Description of the Invention] [Summary] The present invention relates to a method for forming a barrier layer to prevent a reaction between silicon and aluminum when forming an aluminum wiring having contact with a semiconductor substrate in a semiconductor integrated circuit device. The purpose of the present invention is to provide a method for manufacturing a semiconductor device that maintains good contact between a substrate and aluminum wiring by preventing grain boundary diffusion. An amorphous film is provided between the semiconductor substrate and the conductive layer, which suppresses interdiffusion between the semiconductor substrate and the conductive layer and has conductivity;
Alternatively, the amorphous film is an amorphous alloy film containing nitrogen, or the semiconductor device is provided with a conductive layer electrically connected to the semiconductor substrate. The method is configured to include a step of forming an amorphous film that suppresses interdiffusion between the semiconductor substrate and the conductor and has conductivity, and a step of forming the conductive layer on the amorphous film.
本発明は、半導体集積回路装置において半導体（シリコ
ン）基板とコンタクトを有するアルミニウム配線を形成
する際、シリコンとアルミニウムの反応を防止するため
のバリアー層を有する半導体装置及びその製造方法に関
する。The present invention relates to a semiconductor device having a barrier layer for preventing a reaction between silicon and aluminum when forming an aluminum wiring having contact with a semiconductor (silicon) substrate in a semiconductor integrated circuit device, and a method for manufacturing the same.
近年の半導体装置の高集積化の要求に伴い、半導体（例
えばシリコン）基板に形成される接合の深さは著しく浅
くなっている。これに伴って基板とコンタクトを有する
アルミニウム配線中のアルミニウムが拡散Ｎ（ソース或
いはドレイン）を突き抜は接合の短絡やリーク電流の増
大を招くのでこれを防止するためにアルミニウム中に予
めシリコン（Ｓｉ）を含んだＡｌ−５ｉ配線が広く用い
られている。しかしながら、このＡｌ−５ｉ配線は熱処
理後にアル逅ニウム中のシリコンがコンタクトホール内
の基板シリコン上に析出しコンタクト抵抗をあげてしま
う、近年、半導体装置の高集積化によってコンタクト面
積も縮小化し、それに伴ってコンタクト抵抗も上がって
いるので、さらにコンタクト抵抗を上げてしまうこの方
法は微細コンタクトを有する半導体装置には適さない、
そこで、近年はアルミニウムのシリコン基板への突き抜
けを防止するために基板とアルミニウムを含む電極・配
線層との間にバリアー層を付ける方法がとられている。With the recent demand for higher integration of semiconductor devices, the depth of junctions formed in semiconductor (eg, silicon) substrates has become significantly shallower. Along with this, if the aluminum in the aluminum wiring that has contact with the substrate penetrates the diffused N (source or drain), it will cause a short circuit at the junction and an increase in leakage current. ) is widely used. However, in this Al-5i wiring, after heat treatment, the silicon in the aluminum precipitates on the substrate silicon in the contact hole, increasing the contact resistance. Since the contact resistance also increases accordingly, this method, which further increases the contact resistance, is not suitable for semiconductor devices with fine contacts.
Therefore, in recent years, a method has been adopted in which a barrier layer is provided between the substrate and the electrode/wiring layer containing aluminum in order to prevent aluminum from penetrating into the silicon substrate.
このバリアー層としては、スパッタ法で形成されるチタ
ン（Ｔｉ）、ジルコニウム（Ｚｒ）タングステン（Ｗ）
、タンタル（Ｔａ）、チタン−タングステン（Ｔｉ−Ｗ
）合金等の高融点金属及びその窒化物が用いられている
。第２図を用いてこのバリアー層の形成方法を説明する
。第２図は従来技術による半導体集積回路装置の要部断
面図である。まず、シリコン基板１上にＣＶＤ （Ｃｈ
ｅｍｉｃａｌ Ｖａｐｏｕｒ １）ｅｐｏｓｉｔｉ
。This barrier layer is made of titanium (Ti), zirconium (Zr), tungsten (W), etc. formed by sputtering.
, tantalum (Ta), titanium-tungsten (Ti-W
) High melting point metals such as alloys and their nitrides are used. The method of forming this barrier layer will be explained using FIG. 2. FIG. 2 is a sectional view of a main part of a conventional semiconductor integrated circuit device. First, CVD (Ch
Chemical Vapor 1) Epositi
.
ｎ）法を用いて厚さ０．６〜１． ０μｍ程度の絶縁膜
３、例えばシリコン酸化膜（ＳｉＯｚ）を形成しコンタ
クト領域となるべき部分を除去し、基板１を表出させる
。そして、イオン注入法を用いて不純物拡散領域２を形
成した後、コンタクト抵抗を下げるため第１の導電層４
、例えばチタン膜を厚さ２００〜５００人スパッタリン
グ法を用いて形成する。その上に、スパッタリング法を
用いて厚さ１０００〜２０００人のバリアー層５を形成
する。バリアー層５の材料としては、上に述べたような
高融点金属及びその窒化物が使われる。一般的に純金属
よりその窒化物の方がアルミニウムとシリコンとの反応
を抑えるバリアー性という観点からは優れている。尚、
窒化物の場合はアルゴン−窒素（−Ａｒ Ｎ２）を用
いた反応性スパッタリング法で形成するのが一般的であ
る。最後にバリアー層の上にスパッタリング法を用いて
厚さ１゜ＯＩ１ｍ程度の第２の導電層６、例えばＡＩ配
線またはＡｌ−３ｉ配線を形成する０以上、説明したよ
うな製造方法を用いて従来は基板１と配線６のコンタク
ト領域を形成していた。n) thickness of 0.6 to 1. An insulating film 3, such as a silicon oxide film (SiOz), having a thickness of approximately 0 μm is formed, and a portion to be a contact region is removed to expose the substrate 1. After forming the impurity diffusion region 2 using ion implantation, a first conductive layer 4 is formed to reduce contact resistance.
For example, a titanium film is formed to a thickness of 200 to 500 using a sputtering method. A barrier layer 5 having a thickness of 1,000 to 2,000 layers is formed thereon using a sputtering method. As the material of the barrier layer 5, the above-mentioned high melting point metal and its nitride are used. In general, nitrides are better than pure metals from the viewpoint of barrier properties that suppress the reaction between aluminum and silicon. still,
In the case of nitride, it is generally formed by a reactive sputtering method using argon-nitrogen (-Ar N2). Finally, a second conductive layer 6 with a thickness of about 1° OI 1 m, for example, an AI wiring or an Al-3i wiring, is formed using a sputtering method on the barrier layer. formed a contact area between the substrate 1 and the wiring 6.
しかしながら、こうした高融点金属やその窒化物薄膜は
膜の厚さ方向に平行な粒界をもつ柱状晶組織８を形成す
るため、熱処理中粒界を拡散路とした粒界拡散により第
２図中、矢印で示すように配線６中のＡＩと基板１中Ｓ
ｉとの反応が徐々に進行してしまう。従って、バリアー
Ｎ５が本来のバリアー効果を発揮するためには１０００
〜２０００人の厚さが必要である。しかし、多層配線の
平坦化が求められている現在、段差はなるべく低減する
必要があるため、このような厚いバリアー層は適当では
ない。従って、バリアー層を厚くしないで粒界拡散を防
止する方法を考える必要がある。その一つは、バリアー
層を形成後、酸素を含む雰囲気中で熱処理をすることに
より粒界に酸化物を形成させ粒界をふさぐ”方法であり
、また反応性スパッタリング法でバリアー層を形成する
際、酸素を混入させて粒界に酸化物を形成させ粒界をふ
さぐ方法である。しかし、これらの方法はバリアー層の
抵抗率の上昇、アルミニウム配線パターン加工の際のド
ライエツチング工程でエツチングが充分にできずエツチ
ング残が残る等の欠点があり好ましくない。However, since these high melting point metals and their nitride thin films form a columnar crystal structure 8 with grain boundaries parallel to the thickness direction of the film, grain boundary diffusion using the grain boundaries as diffusion paths occurs during heat treatment, as shown in Figure 2. , AI in the wiring 6 and S in the board 1 as shown by the arrows.
The reaction with i proceeds gradually. Therefore, in order for Barrier N5 to exhibit its original barrier effect, it is necessary to
A thickness of ~2000 people is required. However, with the current demand for flattening of multilayer wiring, it is necessary to reduce the level difference as much as possible, so such a thick barrier layer is not appropriate. Therefore, it is necessary to consider a method of preventing grain boundary diffusion without making the barrier layer thick. One method is to form a barrier layer and then perform heat treatment in an oxygen-containing atmosphere to form oxides at the grain boundaries to block the grain boundaries.Alternatively, the barrier layer is formed using a reactive sputtering method. In this process, oxygen is mixed in to form oxides at the grain boundaries to block the grain boundaries. However, these methods increase the resistivity of the barrier layer and cause problems such as etching during the dry etching process during aluminum wiring pattern processing. This is not preferable because it has drawbacks such as insufficient etching and etching residue remains.
本発明は、上記問題点を解決し、従来より薄くても熱処
理中のバリアー層の粒界拡散を防止できる薄膜を形成し
、基板とアルミニウム配線とのコンタクトを良好に維持
する半導体装置及びそ の製造方法を提供することを目
的とする。The present invention solves the above-mentioned problems, and provides a semiconductor device that forms a thin film that can prevent grain boundary diffusion of a barrier layer during heat treatment even if it is thinner than before, and maintains good contact between a substrate and aluminum wiring, and the same. The purpose is to provide a manufacturing method.
本発明はバリアー層に非晶質（アモルファス）膜を用い
ることによって従来技術で生じていた結晶粒界からの粒
界拡散を防止しＡＩとＳｔの反応を抑える。そして、半
導体基板と電気的に接続する導電層を備えた半導体装置
において、該半導体基板と該導電層との間に該半導体基
板と該導電層の相互拡散を抑えかつ導電性を有する非晶
質膜を具備してなることを特徴とするように構成するか
、または前記非晶質膜が窒素を含んだ非晶質合金膜であ
ることを特徴とするように構成するか、または半導体基
板と電気的に接続する導電層を備えた半導体装置におい
て半導体基板上に該半導体基板と該導電層間の相互拡散
を抑えかつ導電性を有する非晶質膜を形成する工程と該
非晶質膜上に該導電層を形成する工程とを含むように構
成する。The present invention uses an amorphous film for the barrier layer to prevent grain boundary diffusion from crystal grain boundaries, which occurs in the prior art, and to suppress the reaction between AI and St. In a semiconductor device including a conductive layer electrically connected to a semiconductor substrate, an amorphous material having conductivity and suppressing mutual diffusion between the semiconductor substrate and the conductive layer is provided between the semiconductor substrate and the conductive layer. the amorphous film is an amorphous alloy film containing nitrogen; or the amorphous film is an amorphous alloy film containing nitrogen; In a semiconductor device including a conductive layer that is electrically connected, a step of forming an amorphous film on a semiconductor substrate that suppresses mutual diffusion between the semiconductor substrate and the conductive layer and has conductivity; The method is configured to include a step of forming a conductive layer.
本発明ではバリアー層を非晶質膜で形成するため結晶粒
界が存在しないので従来の粒界拡散によるＡｔとＳｉの
反応を防止できる。従って、シリコン基板とアルミニウ
ム配線とのコンタクト′を良好に維持することが可能と
なる。In the present invention, since the barrier layer is formed of an amorphous film, there are no grain boundaries, so that the reaction between At and Si due to conventional grain boundary diffusion can be prevented. Therefore, it is possible to maintain good contact between the silicon substrate and the aluminum wiring.
第１図を用いて本発明の一実施例を説明する。 An embodiment of the present invention will be described with reference to FIG.
第１図は本発明による半導体集積回路装置の要部断面図
である。図中、■はシリコン基板、２は不純物拡散領域
、３は絶縁膜、４は第１の導電層、６は第２の導電層（
配線）、７は非晶質膜である。FIG. 1 is a sectional view of a main part of a semiconductor integrated circuit device according to the present invention. In the figure, ■ is a silicon substrate, 2 is an impurity diffusion region, 3 is an insulating film, 4 is a first conductive layer, and 6 is a second conductive layer (
(wiring), 7 is an amorphous film.
まず、シリコン基板１上にＣＶＤ法を用いて厚さ例えば
０６６〜１．０μｍのＳｉＯ２からなる絶縁膜３を形成
し、コンタクト領域となるべき部分をエツチング除去す
る０次に、コンタクトホール内のシリコン基板上の自然
酸化膜をフッ酸等で除去後、複数のスパッタ処理室を有
するスパッタ装置を用いて以下の工程を連続的に行う、
まず、チタンターゲットを装着した処理室において、コ
ンタクト抵抗を下げるため第１の導電Ｎ４例えば厚さ２
００〜５００大のチタン膜（タングステンやアルミニウ
ムも可能）を形成する。続けて、Ｔａ−１０ｗｔ％Ｔｉ
合金ターゲットを装着した処理室においてスパッタガス
としてＡｒ−５０％Ｎ２混合ガスを用いた反応性スパッ
タリング法を行い、非晶質膜７としてＴａ −Ｔ ｉ−
Ｎアモルファス合金膜を従来のバリアー層５より薄く例
えば５００人程皮酸長させる。この際スパッタ圧力は５
ｍＴｏｒｒ、パワーは３ｋｗ、基板温度は２５０ ’Ｃ
であった。最後に、ＡＩフタ−ットが装着５された処理
室において厚さ例えば１μｍのアルミニウムを第２の導
電Ｎ６として形成した。尚、Ｔａ−Ｔｉ−Ｎアモルファ
ス合金膜は上面のアルミニウム配線とも下面のチタン膜
とも接合性、加工性がよい。最後に通常のフォトリソグ
ラフィ技術と塩素を含むガスを用いたドライエツチング
法によりチタン膜４、非晶質膜７、第２の導電Ｎ６をエ
ツチング除去し所望の配線パターンに加工する。以上の
ような製造工程を経て本発明の半導体装置は完成する。First, an insulating film 3 made of SiO2 with a thickness of 0.66 to 1.0 μm, for example, is formed on a silicon substrate 1 using the CVD method, and a portion that will become a contact region is etched away. After removing the natural oxide film on the substrate with hydrofluoric acid, etc., the following steps are performed continuously using a sputtering device having multiple sputtering chambers.
First, in a processing chamber equipped with a titanium target, a first conductive layer with a thickness of, for example, 2
00 to 500 titanium film (tungsten or aluminum is also possible). Next, Ta-10wt%Ti
A reactive sputtering method using an Ar-50% N2 mixed gas as a sputtering gas was performed in a processing chamber equipped with an alloy target, and the amorphous film 7 was formed using Ta-Ti-
The N amorphous alloy film is made thinner than the conventional barrier layer 5, for example, by about 500 layers. At this time, the sputtering pressure was 5
mTorr, power is 3kw, substrate temperature is 250'C
Met. Finally, aluminum having a thickness of, for example, 1 μm was formed as the second conductive material N6 in the processing chamber to which the AI cover 5 was attached. Note that the Ta-Ti-N amorphous alloy film has good bondability and workability with both the aluminum wiring on the upper surface and the titanium film on the lower surface. Finally, the titanium film 4, the amorphous film 7, and the second conductive layer N6 are etched away by a normal photolithography technique and a dry etching method using a gas containing chlorine to form a desired wiring pattern. The semiconductor device of the present invention is completed through the manufacturing process as described above.
尚、ここで非晶質膜７の材料としてＴａ−Ｔｉ−Ｎアモ
ルファス合金膜を用いたのは理由がある。Note that there is a reason why a Ta-Ti-N amorphous alloy film is used as the material for the amorphous film 7 here.
それは、このように窒素をふくんだアモルファス合金膜
の方がニオブ−ニッケル（Ｎｂ−Ｎｉ）アモルファス合
金膜やモリブデン−ニッケル（Ｍ。This is because an amorphous alloy film containing nitrogen is better than a niobium-nickel (Nb-Ni) amorphous alloy film or a molybdenum-nickel (M) film.
−Ｎｉ）アモルファス合金膜等の窒素を含まないアモル
ファス合金膜よりも薄く形成できるからである。なぜな
らば、ニオブ−ニッケルアモルファス合金膜やモリブデ
ン−ニッケルアモルファス合金膜は粒界拡散を起こすよ
うな結晶粒界が存在しなくとも合金自体アルミニウムと
の反応性が高いため、バリアー層として用いるためには
厚く形成する必要があるからである。これに比べて本実
施例のように窒素を含んだアモルファス合金膜はアルミ
ニウムとの反応性が低いので薄く形成できる。-Ni) This is because it can be formed thinner than an amorphous alloy film that does not contain nitrogen, such as an amorphous alloy film. This is because niobium-nickel amorphous alloy films and molybdenum-nickel amorphous alloy films are highly reactive with aluminum even if there are no grain boundaries that would cause grain boundary diffusion, so they cannot be used as barrier layers. This is because it needs to be formed thickly. In contrast, the amorphous alloy film containing nitrogen as in this embodiment has low reactivity with aluminum and can therefore be formed thinly.
従って、窒素を含めたアモルファス合金膜の方が多層配
線に適しているといえる。Therefore, it can be said that an amorphous alloy film containing nitrogen is more suitable for multilayer wiring.
また、もう−点本実施例のような窒素を含んだアモルフ
ァス合金膜がニオブ−ニッケルアモルファス合金膜やモ
リブデン−ニッケルアモルファス合金膜に比べて優れて
いる点は、工程最後に行うアモルファス配線パターン形
成の際、エツチング除去し易いという点である。なぜな
らば、ニオブ、モリブデン、ニッケル等の塩化物の蒸気
圧が低いためアルミニウム配線パターン形成時に使用す
る塩素を含んだガスを用いるドライエツチングではエン
チング除去が困難であるからである。その点本実施例の
ようなアモルファス合金膜は塩素を含んだガスを用いる
ドライエツチングをし易いという利点があるので、アル
ミニウムのドライエツチングプロセスとも両立しうる。Another point is that the nitrogen-containing amorphous alloy film as shown in this example is superior to the niobium-nickel amorphous alloy film and the molybdenum-nickel amorphous alloy film. In fact, it is easy to remove by etching. This is because chlorides such as niobium, molybdenum, and nickel have low vapor pressures and are difficult to remove by dry etching using a chlorine-containing gas used in forming aluminum wiring patterns. In this respect, the amorphous alloy film as in this embodiment has the advantage of being easily dry etched using a gas containing chlorine, so it is compatible with the dry etching process for aluminum.
また、本実施例のアモルファス合金膜はニオブ−ニッケ
ルアモルファス合金膜やモリブデン−ニッケルアモルフ
ァス合金膜に比べてスパッタリングを行う際、・薄膜成
長させやすいという利点ももっている。尚、本実施例の
Ｔａ−Ｔｉ−Ｎアモルファス合金膜では、窒素の量が３
０％以上の時に完全なアモルファス合金膜となり、粒界
拡散防止に大きな効果を有する。以下にその根拠を示す
。Furthermore, the amorphous alloy film of this embodiment has the advantage that it is easier to grow a thin film when sputtering, compared to a niobium-nickel amorphous alloy film or a molybdenum-nickel amorphous alloy film. Note that in the Ta-Ti-N amorphous alloy film of this example, the amount of nitrogen was 3
When it is 0% or more, it becomes a complete amorphous alloy film, which has a great effect on preventing grain boundary diffusion. The basis for this is shown below.
（１）３０％以上の窒素を含むアモルファス合金膜と３
０％未満の窒素を含むアモルファス合金膜を比較した場
合、窒素が３０％以下の膜をＸ線回折法、電子線回折法
で分析すると、回折ピークが存在し結晶性のＴａが認め
られたのに対して、窒素が３０％以上の膜を同じ方法で
分析すると、回折ピークは存在せず完全に非晶質になっ
ていることが確認できた。(1) Amorphous alloy film containing 30% or more nitrogen and 3
When comparing amorphous alloy films containing less than 0% nitrogen, when a film containing less than 30% nitrogen was analyzed by X-ray diffraction and electron diffraction, a diffraction peak was observed and crystalline Ta was observed. On the other hand, when a film containing 30% or more of nitrogen was analyzed using the same method, it was confirmed that there was no diffraction peak and that the film was completely amorphous.
このことを第３図（ａ）〜（ｄ）を用いて説明する。第
３図（ａ）〜（ｄ）はＸ線回折の結果を示すチャート図
である。（ａ）はＴａＮ、（ｂ）はＴａ、（Ｃ）は窒素
（Ｎ２）を５０％含んだＴａ−Ｔｉ−Ｎアモルファス合
金膜、（ｄ）は窒素（Ｎ２）を２５％含んだＴａ−Ｔｉ
−Ｎアモルファス合金膜をそれぞれ示すチャートである
。このチャートで横軸は格子面間隔ｄ〔入〕、縦軸は回
折の強さ（Ｉｎｔｅｎｓｉｔｙ）を表している。This will be explained using FIGS. 3(a) to 3(d). FIGS. 3(a) to 3(d) are charts showing the results of X-ray diffraction. (a) is TaN, (b) is Ta, (C) is Ta-Ti-N amorphous alloy film containing 50% nitrogen (N2), (d) is Ta-Ti containing 25% nitrogen (N2)
3 is a chart showing each of -N amorphous alloy films. In this chart, the horizontal axis represents the lattice spacing d [in], and the vertical axis represents the intensity of diffraction.
（Ｃ）図をみてもわかるとおり窒素を３０％以上含んだ
本発明のアモルファス合金膜では回折ピークが認められ
ない。従って、完全に非晶質膜が形成されたと考えられ
る０以上のように窒素を３０％以上含むときＴａ−Ｔｉ
−Ｎアモルファス合金膜は完全な非晶質膜となり粒界拡
散を防止する効果が顕著である。(C) As can be seen from the figure, no diffraction peak is observed in the amorphous alloy film of the present invention containing 30% or more of nitrogen. Therefore, when the Ta-Ti film contains 30% or more of nitrogen, such as 0 or more, it is considered that a completely amorphous film has been formed.
The -N amorphous alloy film becomes a completely amorphous film and has a remarkable effect of preventing grain boundary diffusion.
（２）２つのシリコン基板上にバリアー層として、それ
ぞれ窒素３０％未満の膜と窒素３０％以上の膜を５００
人程皮酸威し、続けてその上にそれぞれアルミニウム層
を１μｍ形成する。そして、５５０°Ｃで３０分熱処理
後アルミニウム層とバリアー層を除去し、コンタクト領
域の表出したシリコン基板ｌの表面を観察すると窒素３
０％未満で形成した場合はシリコン基板とアルミニウム
層との合金化に起因するアロイビットが存在したのに対
して窒素３０％以上で形成した場合はアロイビットは存
在しなかった。従って、窒素３０％以上含んだアモルフ
ァス合金膜の方が、よりバリアー性が高いことがわかっ
た。従って、前記（１）で述べた窒素３０％以上含むと
き完全なアモルファスになることと考え合わせると窒素
３０％以上含むアモルファス合金膜は完全な非晶質膜と
なるためバリアー効果が高いことが証明された。そして
、５５０°Ｃ１３０分熱処理後、窒素３０％未満の一膜
ではアロイビットに起因する接合部リーク電流が増加し
、コンタクト抵抗も増加したのに対して、窒素３０％以
上の膜では熱処理後も接合部リーク電流の増加、コンタ
クト抵抗の増加も認められなかったこともこのことを裏
付けている。以上の理由により本実施例のＴａ−Ｔｉ−
Ｎアモルファス合金膜は窒素が３０％以上含まれている
場合に完全な非晶質膜となり粒界拡散防止に大きな効果
が認められることがわかった。このように本実施例によ
れば従来に比べて薄い５００Å程度の厚さでも５５０°
Ｃの熱処理に対して粒界拡散を防止できる薄いバリアー
層の形成が可能になる。(2) As barrier layers on two silicon substrates, a film containing less than 30% nitrogen and a film containing 30% or more nitrogen were deposited at 500% each.
The skin was acidified to a human degree, and then an aluminum layer of 1 μm thick was formed on each layer. After heat treatment at 550°C for 30 minutes, the aluminum layer and barrier layer were removed, and the exposed contact area of the silicon substrate l was observed.
When the nitrogen content was less than 0%, alloy bits were present due to alloying of the silicon substrate and the aluminum layer, whereas when the nitrogen content was 30% or more, no alloy bits were present. Therefore, it was found that an amorphous alloy film containing 30% or more of nitrogen has higher barrier properties. Therefore, considering that the film becomes completely amorphous when it contains 30% or more nitrogen as mentioned in (1) above, it is proven that an amorphous alloy film containing 30% or more nitrogen becomes a completely amorphous film and has a high barrier effect. It was done. After heat treatment at 550°C for 130 minutes, one film with less than 30% nitrogen increased the junction leakage current due to alloy bits and the contact resistance, while the film with more than 30% nitrogen increased even after heat treatment. This is also supported by the fact that neither an increase in junction leakage current nor an increase in contact resistance was observed. For the above reasons, the Ta-Ti-
It has been found that when the N amorphous alloy film contains 30% or more of nitrogen, it becomes a completely amorphous film and is highly effective in preventing grain boundary diffusion. In this way, according to this embodiment, even with a thickness of about 500 Å, which is thinner than the conventional method, the angle of 550°
It becomes possible to form a thin barrier layer that can prevent grain boundary diffusion against C heat treatment.
尚、本実施例では非晶質膜７にＴａ−Ｔｉ−Ｎアモルフ
ァス合金膜を用いたが、これに他の元素を付は加えた非
晶質膜でもよい。また、非晶質膜はこれに限定されず他
のアモルファス合金膜を用いてもよい。例えば、Ｚｒ（
ジルコニウム）−Ｔｉ−Ｎ等が掲げられる。但し、その
場合、本実施例のように塩素でエツチング可能な遷移金
属と窒素を含んだ材料がよい、なぜならば、窒素を含め
れば先に述べたようにアルミニウムとの反応を抑えられ
るし、アルミニウムのドライエツチングプロセスとも両
立しうるからである。また、窒素を入れることにより遷
移金属とアモルファスを形成し易いからである。しかし
、一つの遷移金属と窒素、例えばＴｉＮ等は窒化物にな
ってしまい組成の制御が難しくアモルファスを形成しに
くい。従って、遷移金属を複数にしＴａ−Ｔｉ−Ｎのよ
うに３元系にすることによりアモルファスが比較的容易
にでき、アルミニウムのドライエツチングプロセスとも
両立し、かつ従来よりも薄いバリアー層を形成できる。In this embodiment, a Ta-Ti-N amorphous alloy film is used as the amorphous film 7, but an amorphous film containing other elements may also be used. Further, the amorphous film is not limited to this, and other amorphous alloy films may be used. For example, Zr(
zirconium)-Ti-N, etc. However, in that case, it is better to use a material containing nitrogen and a transition metal that can be etched with chlorine, as in this example, because containing nitrogen can suppress the reaction with aluminum, and This is because it is compatible with the dry etching process. This is also because adding nitrogen tends to form an amorphous state with a transition metal. However, one transition metal and nitrogen, such as TiN, become a nitride, making it difficult to control the composition and making it difficult to form an amorphous state. Therefore, by using a plurality of transition metals and forming a ternary system such as Ta-Ti-N, an amorphous state can be formed relatively easily, it is compatible with the dry etching process of aluminum, and it is possible to form a barrier layer thinner than before.
以上、説明したように本発明によれば従来より薄くバリ
アー層を形成しても接合部リーク電流の増加及びコンタ
クト抵抗の増加を防止できるのでＬＳＩ多層配線の歩留
り向上とその信頼性の向上に寄与するところが大きい。As explained above, according to the present invention, an increase in junction leakage current and an increase in contact resistance can be prevented even if the barrier layer is formed thinner than before, contributing to an improvement in the yield and reliability of LSI multilayer wiring. There's a lot to do.
第１図は、本発明による半導体集積回路装置の要部断面
図、第２図は従来技術による半導体集積回路装置の要部
断面図、第３図はＸ線回折法の結果を示すチャート図で
ある。
図中、
ｌ：半導体基板
２ 不純物拡散領域
３：絶縁膜
４、第１の導電層
５：バリアー層
６：第２の導電層（配ｖＡ）
７：非晶質膜
二柱状晶組織
本発明１：よう牛導捧訃貴俳様置膚鈴島滅寥 １
図FIG. 1 is a sectional view of a main part of a semiconductor integrated circuit device according to the present invention, FIG. 2 is a sectional view of a main part of a semiconductor integrated circuit device according to the prior art, and FIG. 3 is a chart showing the results of an X-ray diffraction method. be. In the figure, l: semiconductor substrate 2 impurity diffusion region 3: insulating film 4, first conductive layer 5: barrier layer 6: second conductive layer (distribution vA) 7: amorphous film bicolumnar crystal structure Present invention 1 ：Yōgyūdō dedicated Kihai-sama Okada Suzushima destruction 1
figure
Claims (1)
体装置において、該半導体基板と該導電層との間に該半
導体基板と該導電層の相互拡散を抑えかつ導電性を有す
る非晶質膜を具備してなることを特徴とする半導体装置
。 ２、前記非晶質膜が窒素を含んだ非晶質合金膜であるこ
とを特徴とする請求項１記載の半導体装置。 ３、半導体基板と電気的に接続する導電層を備えた半導
体装置において、 半導体基板上に該半導体基板と該導電層間の相互拡散を
抑えかつ導電性を有する非晶質膜を形成する工程と、 該非晶質膜上に該導電層を形成する工程とを含むことを
特徴とする半導体装置の製造方法。[Claims] 1. In a semiconductor device including a conductive layer electrically connected to a semiconductor substrate, there is provided a structure between the semiconductor substrate and the conductive layer that suppresses mutual diffusion between the semiconductor substrate and the conductive layer and conducts electricity. 1. A semiconductor device comprising an amorphous film having an amorphous property. 2. The semiconductor device according to claim 1, wherein the amorphous film is an amorphous alloy film containing nitrogen. 3. In a semiconductor device including a conductive layer electrically connected to a semiconductor substrate, forming an amorphous film on the semiconductor substrate that suppresses interdiffusion between the semiconductor substrate and the conductive layer and has conductivity; A method for manufacturing a semiconductor device, comprising the step of forming the conductive layer on the amorphous film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28131589A JPH03142883A (en) | 1989-10-27 | 1989-10-27 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28131589A JPH03142883A (en) | 1989-10-27 | 1989-10-27 | Semiconductor device and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03142883A true JPH03142883A (en) | 1991-06-18 |
Family
ID=17637384
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28131589A Pending JPH03142883A (en) | 1989-10-27 | 1989-10-27 | Semiconductor device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03142883A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1999048154A1 (en) * | 1998-03-13 | 1999-09-23 | Siemens Aktiengesellschaft | Capacitor in an integrated circuit |
| KR100351450B1 (en) * | 1999-12-30 | 2002-09-09 | 주식회사 하이닉스반도체 | Non-volatile memory device and method for fabricating the same |
| WO2002079546A1 (en) * | 2001-03-29 | 2002-10-10 | Honeywell International Inc. | Methods for electrolytically forming materials; and mixed metal materials |
| JP2007027392A (en) * | 2005-07-15 | 2007-02-01 | Denso Corp | Semiconductor device and its manufacturing method |
| JP2010123586A (en) * | 2008-11-17 | 2010-06-03 | Nec Electronics Corp | Semiconductor device, and method of manufacturing the same |
-
1989
- 1989-10-27 JP JP28131589A patent/JPH03142883A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1999048154A1 (en) * | 1998-03-13 | 1999-09-23 | Siemens Aktiengesellschaft | Capacitor in an integrated circuit |
| KR100351450B1 (en) * | 1999-12-30 | 2002-09-09 | 주식회사 하이닉스반도체 | Non-volatile memory device and method for fabricating the same |
| WO2002079546A1 (en) * | 2001-03-29 | 2002-10-10 | Honeywell International Inc. | Methods for electrolytically forming materials; and mixed metal materials |
| US6827828B2 (en) * | 2001-03-29 | 2004-12-07 | Honeywell International Inc. | Mixed metal materials |
| US7252751B2 (en) | 2001-03-29 | 2007-08-07 | Honeywell International Inc. | Methods for electrically forming materials |
| JP2007027392A (en) * | 2005-07-15 | 2007-02-01 | Denso Corp | Semiconductor device and its manufacturing method |
| JP2010123586A (en) * | 2008-11-17 | 2010-06-03 | Nec Electronics Corp | Semiconductor device, and method of manufacturing the same |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3704427B2 (en) | Method for forming copper metal wiring of semiconductor device | |
| KR910007108B1 (en) | Intergrate semiconductor circuit comprising at least two metallization levels composed of aluminium or aluminium compounds and a method for the manufacture of same | |
| KR0179822B1 (en) | Interconnections structure of semiconductor device and method for manufacturing thereof | |
| KR0152370B1 (en) | Semiconductor device having an interconnection of a laminate structure and a method for manufacturing the same | |
| CA1306072C (en) | Refractory metal - titanium nitride conductive structures and processes for forming the same | |
| JP2006210511A (en) | Semiconductor device | |
| JP4729661B2 (en) | Aluminum layer free from hillocks and method for forming the same | |
| JPS58500680A (en) | Semiconductor device with low resistance synthetic metal conductor and method for manufacturing the same | |
| JPS61133646A (en) | Manufacture of semiconductor device | |
| JPH03142883A (en) | Semiconductor device and manufacture thereof | |
| JPH09283624A (en) | Manufacture of semiconductor device | |
| JPH10209156A (en) | Semiconductor device and its manufacture | |
| JPH0193149A (en) | Semiconductor device | |
| JPH06204218A (en) | Manufacturing method of semiconductor device | |
| JP4221737B2 (en) | Metal wiring manufacturing method | |
| JPH11102877A (en) | Conversion method of nitride metal, and manufacture of semiconductor device | |
| JP2003309082A (en) | Structure of semiconductor device | |
| JPH11233517A (en) | Copper wiring in semiconductor devices | |
| JP4006720B2 (en) | Semiconductor device and manufacturing method thereof | |
| JPH1154507A (en) | Manufacture of semiconductor device | |
| JP2998454B2 (en) | Method for manufacturing semiconductor device | |
| JPS63129662A (en) | Semiconductor device | |
| JPH0399471A (en) | Semiconductor device | |
| JPS61135156A (en) | Semiconductor device and manufacture thereof | |
| JPH04324636A (en) | Semiconductor device and its manufacture |