JPH0314252B2 - - Google Patents
Info
- Publication number
- JPH0314252B2 JPH0314252B2 JP59021238A JP2123884A JPH0314252B2 JP H0314252 B2 JPH0314252 B2 JP H0314252B2 JP 59021238 A JP59021238 A JP 59021238A JP 2123884 A JP2123884 A JP 2123884A JP H0314252 B2 JPH0314252 B2 JP H0314252B2
- Authority
- JP
- Japan
- Prior art keywords
- crystal
- timing signal
- nrz
- signal
- differential amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000013078 crystal Substances 0.000 claims description 24
- 230000001360 synchronised effect Effects 0.000 claims description 17
- 230000010355 oscillation Effects 0.000 claims description 14
- 239000003990 capacitor Substances 0.000 claims description 13
- 238000001514 detection method Methods 0.000 claims description 12
- 238000000605 extraction Methods 0.000 claims description 7
- 230000005540 biological transmission Effects 0.000 claims description 4
- 239000000284 extract Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 230000002238 attenuated effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/30—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator
- H03B5/32—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator
- H03B5/36—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator active element in amplifier being semiconductor device
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Description
【発明の詳細な説明】
(イ) 発明の利用分野
この発明は、データ伝送装置の受信回路等に使
用される水晶同期発振器を用いたタイミング信号
抽出回路に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Field of Application of the Invention The present invention relates to a timing signal extraction circuit using a crystal synchronous oscillator used in a receiving circuit of a data transmission device.
(ロ) 先行技術
一般に、伝送符号形式としてNRZ（Non
Return to Zero）信号を用いるデイジタル通信
において、受信データの識別、あるいは再生中断
を行うためにビツト周波数と位相に同期したタイ
ミング信号が必要である。このタイミング信号
は、一般に外部から供給されないので受信データ
を信号処理することによつてタイミング信号を抽
出している。そして、従来、タイミング信号抽出
には位相同期発振器としてタンク回路、あるいは
PLL（Phase−Locked Loop）回路が使用されて
いる。(b) Prior art In general, NRZ (Non
In digital communications using Return to Zero signals, a timing signal synchronized with the bit frequency and phase is required to identify received data or interrupt playback. Since this timing signal is generally not supplied from the outside, the timing signal is extracted by signal processing the received data. Conventionally, timing signal extraction uses a tank circuit or a phase-locked oscillator.
A PLL (Phase-Locked Loop) circuit is used.
(ハ) 問題点
前記タンク回路においては、NRZ受信データ
の変化点検出パルスをタンク回路に入力し、この
パルスにより所定周波数の減衰発振信号を出力さ
せてタイミング信号としている。ところで、伝送
符号形式としてNRZ信号を使用しているため、
ビツト符号における「０」又は「１」が何回か連
続した信号の場合、この間NRZ受信データの変
化点は存在しないから、前記減衰発振信号の出力
は減衰して小さくなり、タイミング信号として使
用できない場合がある。この減衰発振はタンク回
路のＱ値に大きく依存するもので、高周波になれ
ばなるほど大きいＱ値を得ることが困難になり、
高速データ通信用としては製造が困難になる。さ
らに、タンク回路は温度特性が良好でない欠点が
ある。(C) Problem In the tank circuit, a change point detection pulse of NRZ received data is input to the tank circuit, and this pulse outputs a damped oscillation signal of a predetermined frequency as a timing signal. By the way, since the NRZ signal is used as the transmission code format,
In the case of a signal in which the bit code is "0" or "1" several times in succession, there is no changing point in the NRZ received data during this period, so the output of the damped oscillation signal is attenuated and becomes small, and cannot be used as a timing signal. There are cases. This damped oscillation is highly dependent on the Q value of the tank circuit, and the higher the frequency, the more difficult it becomes to obtain a large Q value.
This makes manufacturing difficult for high-speed data communications. Furthermore, tank circuits have the disadvantage of poor temperature characteristics.
一方、タイミング信号抽出回路としてPLL回
路を用いた場合には、たとえNRZ受信データ変
化点検出パルスが少なくてもタイミング信号を抽
出することができるものの、NRZ受信データ変
化点検出パルスが初めて入力されてからビツト同
期したタイミング信号が抽出されるまでに何回か
の変化点検出パルスが必要なため、タイミング信
号抽出に時間がかかる欠点がある。さらに、
PLL回路は位相比較器を用いており、この位相
比較器は高速動作が困難なため、高速通信用受信
回路として使用できにくい欠点があつた。 On the other hand, when a PLL circuit is used as the timing signal extraction circuit, the timing signal can be extracted even if the number of NRZ reception data change point detection pulses is small. Since several change point detection pulses are required before a bit-synchronized timing signal is extracted from the timing signal, there is a drawback that it takes time to extract the timing signal. moreover,
The PLL circuit uses a phase comparator, which has the disadvantage of being difficult to operate at high speed, making it difficult to use as a receiving circuit for high-speed communications.
(ニ) 目的
この発明は前記事情に基づいてなされたもの
で、その目的とするところは、NRZ受信データ
変化点検出パルスが入力されてからビツト同期し
たタイミング信号の出力される時間が短かく、し
かもNRZ受信データ変化点検出パルスが次に入
力する時間が長くても前記タイミング信号が継続
して使用でき、高周波において安定した発振が得
られる水晶同期発振器を用いたタイミング信号抽
出回路を提供することである。(D) Purpose This invention was made based on the above-mentioned circumstances, and its purpose is to shorten the time from when the NRZ reception data change point detection pulse is input to output the bit-synchronized timing signal. Moreover, even if it takes a long time for the next input of the NRZ reception data change point detection pulse, the timing signal can be continuously used, and stable oscillation can be obtained at high frequencies. To provide a timing signal extraction circuit using a crystal synchronous oscillator. It is.
(ホ) 実施例
以下、この発明の一実施例につき第１図および
第２図に基づいて説明する。第１図は水晶同期発
振器の回路構成図を示し、同図中１は差動増幅器
で、この逆相入力端にはNRZ受信データ変化点
検出パルスが入力され、またこの逆相入力は抵抗
２を介して差動増幅器１の参照電圧VBBに接続さ
れている。差動増幅器１の逆相出力端にはコイル
３、コンデンサ４、抵抗５ａの各一端が接続さ
れ、コンデンサ４の他端は接地されている。前記
コイル３の他端には固有発振周波数を有する水晶
振動子５とコンデンサ６の一端が接続され、この
各他端は前記抵抗５ａ、コンデンサ７および差動
増幅器１の同相入力端に接続され、コンデンサ７
の他端は接地されている。ここで、差動増幅器
１、コンデンサ４、コンデンサ７および水晶振動
子５によつてコルピツツ型水晶発振器が構成され
ている。水晶振動子５に直列にコイル３を、並列
にコンデンサ６を接続した理由は、NRZ受信デ
ータにビツト同期したタイミング信号を抽出する
ことのできるNRZ受信データのビツト周波数範
囲、即ちキヤプチヤレンジを広げるためである。
さらに、コンデンサ６は温度特性の改善にも良好
である。また、コンデンサ６の容量を変えること
により水晶同期発振器の発振周波数を変えること
ができる。前述の構成によつて差動増幅器１の逆
相出力はコイル３、水晶振動子５、コンデンサ６
を介し、また抵抗５ａを介して同相入力へと帰還
される。差動増幅器１の同相出力端からはタイミ
ング信号が抽出される。(E) Embodiment Hereinafter, an embodiment of the present invention will be described based on FIGS. 1 and 2. Figure 1 shows a circuit configuration diagram of a crystal synchronous oscillator. In the figure, 1 is a differential amplifier, the NRZ reception data change point detection pulse is input to this negative phase input terminal, and this negative phase input is connected to a resistor 2. It is connected to the reference voltage V BB of the differential amplifier 1 via. One end of each of a coil 3, a capacitor 4, and a resistor 5a is connected to the negative phase output end of the differential amplifier 1, and the other end of the capacitor 4 is grounded. A crystal resonator 5 having a natural oscillation frequency and one end of a capacitor 6 are connected to the other end of the coil 3, and each other end is connected to the resistor 5a, the capacitor 7, and the common-mode input terminal of the differential amplifier 1, capacitor 7
The other end is grounded. Here, the differential amplifier 1, the capacitor 4, the capacitor 7, and the crystal resonator 5 constitute a Colpitts type crystal oscillator. The reason for connecting the coil 3 in series and the capacitor 6 in parallel to the crystal oscillator 5 is to widen the bit frequency range of the NRZ received data, that is, the capture range, from which a timing signal that is bit synchronized with the NRZ received data can be extracted. be.
Furthermore, the capacitor 6 is also good in improving temperature characteristics. Further, by changing the capacitance of the capacitor 6, the oscillation frequency of the crystal synchronous oscillator can be changed. With the above configuration, the negative phase output of the differential amplifier 1 is provided by the coil 3, the crystal oscillator 5, and the capacitor 6.
and is fed back to the common mode input via the resistor 5a. A timing signal is extracted from the common mode output terminal of the differential amplifier 1.
前記差動増幅器１の逆相入力にNRZ受信デー
タ変化点検出パルスが入力して無いとすると、水
晶同期発振器の発振動作により差動増幅器１の同
相出力からは第２図Ａに示すように発信出力信号
が得られる。このとき、第２図Ｂに示すように、
差動増幅器１の逆相入力端にNRZ受信データ変
化点検出のパルスが入力したとすると、１発目の
パルスa1の差動増幅器１の逆相入力と前記発信出
力信号の同相入力の差が増幅されて差動増幅器１
の同相出力端から第２図Ｃの信号b1に示すように
出力される。これと同時に、差動増幅器１の逆相
出力端からは信号b1の反転信号が出力され、コイ
ル３、水晶振動子５に入力され、これにより水晶
振動子５の発振出力の位相は反転した記号b1の立
上がりに合わされる。この結果、差動増幅器１の
同相出力端からは信号b1の出力以降、パルスa1に
同期した発振出力がタイミング信号として抽出さ
れる。２発目、３発目のパルスa2，a3がパルスa1
とビツト同期しているとすると、信号b1の出力以
降の前記タイミング信号もパルスa2，a3と第２図
Ｃに示すようにビツト同期することになる。前記
パルスa3がパルスa1と同期して無いと仮定する
と、前述と同様にして差動増幅器１の同相出力端
から、パルスa3に同期したタイミング信号がパル
スa3の入力以降新たに抽出される。ここで第２図
Ｂで、NRZ受信データ変化点検出パルス幅は、
第２図Ａの発振出力の周期の半分となつている
が、実際には、NRZ受信データ変化点検出パル
スのパルス幅は発振出力の周期の２分の１より小
さければよい。 Assuming that the NRZ reception data change point detection pulse is not input to the negative phase input of the differential amplifier 1, the in-phase output of the differential amplifier 1 generates a signal as shown in Figure 2A due to the oscillation operation of the crystal synchronous oscillator. An output signal is obtained. At this time, as shown in Figure 2B,
Assuming that a pulse for detecting the change point of NRZ received data is input to the negative phase input terminal of the differential amplifier 1, the difference between the negative phase input of the differential amplifier 1 of the first pulse a1 and the in-phase input of the above-mentioned transmission output signal is is amplified and the differential amplifier 1
The signal b1 shown in FIG. 2C is outputted from the in-phase output terminal of. At the same time, an inverted signal of signal b1 is output from the negative phase output terminal of the differential amplifier 1 and inputted to the coil 3 and the crystal oscillator 5, thereby inverting the phase of the oscillation output of the crystal oscillator 5. It is aligned with the rising edge of symbol b 1 . As a result, from the in-phase output terminal of the differential amplifier 1, an oscillation output synchronized with the pulse a1 is extracted as a timing signal after the output of the signal b1 . The second and third pulses a 2 and a 3 are pulse a 1
If the timing signals after the output of the signal b 1 are also bit synchronized with the pulses a 2 and a 3 as shown in FIG. Assuming that the pulse a 3 is not synchronized with the pulse a 1 , a timing signal synchronized with the pulse a 3 is newly extracted from the in-phase output terminal of the differential amplifier 1 after the input of the pulse a 3 in the same manner as described above. be done. Here, in Figure 2B, the NRZ reception data change point detection pulse width is
Although it is half the period of the oscillation output in FIG. 2A, in reality, the pulse width of the NRZ received data change point detection pulse only needs to be smaller than one half of the period of the oscillation output.
(ヘ) 効果
以上説明したようにこの発明によれば差動増幅
器の逆相入力にNRZ受信データ変化点検出パル
スを入力することにより、NRZ受信データ変化
点パルスの位相に水晶同期発振器の発振出力を直
接合わせているから、NRZ信号が初めて受信さ
れてからタイミング信号が抽出されるまでの時間
がPLL回路を使用した場合よりも短かい。また、
水晶同期発振器は高周波において安定に発振動作
を行うので、高速データ通信用受信回路への適用
が製造上簡単にできる。また、水晶同期発振器の
Ｑ値が非常に大きいため、ビツト符号の「０」又
は「１」の値が連続してもその間、タイミング信
号は安定しているから、連続するビツト符号の許
容回数が大きい利点がある。さらに、水晶振動子
の使用により温度特性が良好である。(F) Effect As explained above, according to the present invention, by inputting the NRZ reception data change point detection pulse to the negative phase input of the differential amplifier, the oscillation output of the crystal synchronous oscillator is adjusted to the phase of the NRZ reception data change point pulse. Since the timing signals are directly matched, the time from when the NRZ signal is first received until the timing signal is extracted is shorter than when using a PLL circuit. Also,
Since the crystal synchronous oscillator performs stable oscillation at high frequencies, it can be easily manufactured to be applied to receiving circuits for high-speed data communications. In addition, since the Q value of the crystal synchronous oscillator is extremely large, the timing signal remains stable even if the value of ``0'' or ``1'' of the bit code continues, so the number of allowed consecutive bit codes is limited. There are big advantages. Furthermore, the temperature characteristics are good due to the use of a crystal resonator.
第１図はこの発明の一実施例を示す回路構成
図、第２図はこの発明の動作を説明するパルス波
形図である。
１……差動増幅器、３……コイル、４，６，７
……コンデンサ、５……水晶振動子。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a pulse waveform diagram illustrating the operation of the present invention. 1... Differential amplifier, 3... Coil, 4, 6, 7
...Capacitor, 5...Crystal oscillator.
Claims (1)
Zero）信号を用いるデータ伝送の受信回路のタ
イミング信号の抽出を行うものであつて、差動増
幅器の逆相出力から同相入力に水晶振動子を介し
て帰還する、コルピツツ型水晶発振において、前
記差動増幅器の逆相入力に前記NRZ受信データ
変化点検出パルス信号を導入して、前記差動増幅
器の同相出力から前記NRZ受信データ変化点検
出パルス信号に位相同期したタイミング信号を抽
出することを特徴とする水晶同期発振器によるタ
イミング抽出回路。 ２ 前記水晶振動子に直列にコイルを直列接続し
たことを特徴とする特許請求の範囲第１項記載の
水晶同期発振器によるタイミング信号抽出回路。 ３ 前記水晶振動子に直列にコイルを直列接続
し、さらに、並列にコンデンサを並列接続したこ
とを特徴とする特許請求の範囲第１項記載の水晶
同期発振器によるタイミング信号抽出回路。[Claims] 1. NRZ (Non Return to
In Colpitts-type crystal oscillation, which extracts the timing signal of a receiving circuit for data transmission using a zero) signal, the difference is The NRZ reception data change point detection pulse signal is introduced into the negative phase input of the differential amplifier, and a timing signal phase-synchronized with the NRZ reception data change point detection pulse signal is extracted from the in-phase output of the differential amplifier. A timing extraction circuit using a crystal synchronous oscillator. 2. A timing signal extraction circuit using a crystal synchronous oscillator according to claim 1, characterized in that a coil is connected in series with the crystal resonator. 3. A timing signal extraction circuit using a crystal synchronous oscillator according to claim 1, characterized in that a coil is connected in series to the crystal resonator, and a capacitor is further connected in parallel to the crystal resonator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59021238A JPS60165850A (en) | 1984-02-08 | 1984-02-08 | Timing signal extracting circuit by crystal synchronizing oscillator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59021238A JPS60165850A (en) | 1984-02-08 | 1984-02-08 | Timing signal extracting circuit by crystal synchronizing oscillator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60165850A JPS60165850A (en) | 1985-08-29 |
| JPH0314252B2 true JPH0314252B2 (en) | 1991-02-26 |
Family
ID=12049466
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59021238A Granted JPS60165850A (en) | 1984-02-08 | 1984-02-08 | Timing signal extracting circuit by crystal synchronizing oscillator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60165850A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63153933A (en) * | 1986-12-17 | 1988-06-27 | Sumitomo Electric Ind Ltd | Synchronous reproducing circuit |
| US7812682B2 (en) * | 2009-03-05 | 2010-10-12 | Nel Frequency Controls, Inc. | Crystal-based oscillator for use in synchronized system |
-
1984
- 1984-02-08 JP JP59021238A patent/JPS60165850A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60165850A (en) | 1985-08-29 |
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